Commit 4cfa7f10 authored by Kai Germaschewski's avatar Kai Germaschewski

ISDN/HiSax: Share xmit_ready_d()

Same as for the B-Channels. We need to make sure that this doesn't
race with a new frame arriving from the upper layer, which will be done
shortly by sharing the upper layer interface as well. Protection is
provided by card->lock, which is now always taken around the entire
interrupt - more coarse-grained than possible, but still better than
the global cli(), and correctness and simplicity first.
parent 9dafbbf7
......@@ -172,10 +172,7 @@ asuscom_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "ISDNLink: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
if (val)
......@@ -202,6 +199,7 @@ asuscom_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_MASK, 0x0);
writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK, 0x0);
writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0x0);
spin_unlock(&cs->lock);
}
static void
......
......@@ -106,10 +106,7 @@ avm_a1_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val, sval;
if (!cs) {
printk(KERN_WARNING "AVM A1: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
while (((sval = bytein(cs->hw.avm.cfg_reg)) & 0xf) != 0x7) {
if (!(sval & AVM_A1_STAT_TIMER)) {
byteout(cs->hw.avm.cfg_reg, 0x1E);
......@@ -133,6 +130,7 @@ avm_a1_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.avm.isac, ISAC_MASK, 0x0);
writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0x0);
writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
inline static void
......
......@@ -179,10 +179,7 @@ avm_a1p_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val, sval;
if (!cs) {
printk(KERN_WARNING "AVM A1 PCMCIA: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
while ((sval = (~bytein(cs->hw.avm.cfg_reg+ASL0_OFFSET) & ASL0_R_IRQPENDING))) {
if (cs->debug & L1_DEB_INTSTAT)
debugl1(cs, "avm IntStatus %x", sval);
......@@ -203,6 +200,7 @@ avm_a1p_interrupt(int intno, void *dev_id, struct pt_regs *regs)
WriteISAC(cs, ISAC_MASK, 0x00);
WriteHSCX(cs, 0, HSCX_MASK, 0x00);
WriteHSCX(cs, 1, HSCX_MASK, 0x00);
spin_unlock(&cs->lock);
}
static int
......
......@@ -139,10 +139,7 @@ bkm_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char val = 0;
I20_REGISTER_FILE *pI20_Regs;
if (!cs) {
printk(KERN_WARNING "HiSax: Telekom A4T: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base);
/* ISDN interrupt pending? */
......@@ -169,6 +166,7 @@ bkm_interrupt(int intno, void *dev_id, struct pt_regs *regs)
/* Reenable ISDN interrupt */
pI20_Regs->i20IntCtrl |= intISDN;
}
spin_unlock(&cs->lock);
}
void
......
......@@ -153,13 +153,10 @@ bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char ista, val, icnt = 5;
if (!cs) {
printk(KERN_WARNING "HiSax: Scitel Quadro: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
ista = readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ISTA);
if (!(ista & 0x3f)) /* not this IPAC */
return;
goto unlock;
Start_IPAC:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
......@@ -196,6 +193,8 @@ bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
sct_quadro_subtypes[cs->subtyp]);
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK, 0xFF);
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK, 0xC0);
unlock:
spin_unlock(&cs->lock);
}
......
......@@ -307,10 +307,7 @@ diva_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char val, sval;
int cnt=5;
if (!cs) {
printk(KERN_WARNING "Diva: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) {
val = readreg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_ISTA + 0x40);
if (val)
......@@ -328,6 +325,7 @@ diva_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0x0);
writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0x0);
writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0x0);
spin_unlock(&cs->lock);
}
static void
......
......@@ -308,15 +308,12 @@ elsa_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char val;
int icnt=5;
if (!cs) {
printk(KERN_WARNING "Elsa: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
if ((cs->typ == ISDN_CTYPE_ELSA_PCMCIA) && (*cs->busy_flag == 1)) {
/* The card tends to generate interrupts while being removed
causing us to just crash the kernel. bad. */
printk(KERN_WARNING "Elsa: card not available!\n");
return;
goto unlock;
}
#if ARCOFI_USE
if (cs->hw.elsa.MFlag) {
......@@ -378,6 +375,8 @@ elsa_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_MASK, 0x0);
writereg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_MASK + 0x40, 0x0);
writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_MASK, 0x0);
unlock:
spin_unlock(&cs->lock);
}
static void
......
......@@ -259,10 +259,7 @@ gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char valisac, valhscx;
int count = 0;
if (!cs) {
printk(KERN_WARNING "Gazel: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
do {
valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
if (valhscx)
......@@ -279,6 +276,7 @@ gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
WriteISAC(cs, ISAC_MASK, 0x0);
WriteHSCX(cs, 0, HSCX_MASK, 0x0);
WriteHSCX(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
......@@ -916,16 +916,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
cs->tx_skb = NULL;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else {
debugl1(cs, "hfc_fill_dfifo irq blocked");
}
} else
sched_d_event(cs, D_XMTBUFREADY);
xmit_ready(cs);
}
afterXPR:
if (cs->hw.hfcD.int_s1 && count--) {
......@@ -1073,7 +1064,8 @@ init2bds0(struct IsdnCardState *cs)
cs->bcs[0].hw.hfc.send = init_send_hfcd(32);
if (!cs->bcs[1].hw.hfc.send)
cs->bcs[1].hw.hfc.send = init_send_hfcd(32);
cs->BC_Send_Data = &hfc_send_data;
cs->BC_Send_Data = hfc_send_data;
cs->DC_Send_Data = hfc_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
cs->bcs[0].BC_Close = close_2bs0;
......
......@@ -1068,16 +1068,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
cs->tx_skb = NULL;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else {
debugl1(cs, "hfcpci_fill_dfifo irq blocked");
}
} else
sched_d_event(cs, D_XMTBUFREADY);
xmit_ready_d(cs);
}
afterXPR:
if (cs->hw.hfcpci.int_s1 && count--) {
......@@ -1560,6 +1551,7 @@ inithfcpci(struct IsdnCardState *cs)
init_timer(&cs->dbusytimer);
INIT_WORK(&cs->work, hfcpci_bh, cs);
cs->BC_Send_Data = &hfcpci_send_data;
cs->DC_Send_Data = &hfcpci_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
cs->bcs[0].BC_Close = close_hfcpci;
......
......@@ -868,16 +868,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
cs->tx_skb = NULL;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcsx_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else {
debugl1(cs, "hfcsx_fill_dfifo irq blocked");
}
} else
sched_d_event(cs, D_XMTBUFREADY);
xmit_ready_d(cs);
}
afterXPR:
if (cs->hw.hfcsx.int_s1 && count--) {
......@@ -1349,6 +1340,7 @@ inithfcsx(struct IsdnCardState *cs)
init_timer(&cs->dbusytimer);
INIT_WORK(&cs->work, hfcsx_bh, cs);
cs->BC_Send_Data = &hfcsx_send_data;
cs->DC_Send_Data = &hfcsx_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
cs->bcs[0].BC_Close = close_hfcsx;
......
......@@ -925,6 +925,7 @@ struct IsdnCardState {
void (*BC_Send_Data) (struct BCState *);
int (*cardmsg) (struct IsdnCardState *, int, void *);
void (*setstack_d) (struct PStack *, struct IsdnCardState *);
void (*DC_Send_Data) (struct IsdnCardState *);
void (*DC_Close) (struct IsdnCardState *);
void (*irq_func) (int, void *, struct pt_regs *);
int (*auxcmd) (struct IsdnCardState *, isdn_ctrl *);
......
......@@ -237,11 +237,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
cs->tx_skb = NULL;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
icc_fill_fifo(cs);
} else
sched_d_event(cs, D_XMTBUFREADY);
xmit_ready_d(cs);
}
afterXPR:
if (val & 0x04) { /* CISQ */
......@@ -599,6 +595,7 @@ initicc(struct IsdnCardState *cs)
INIT_WORK(&cs->work, icc_bh, cs);
cs->setstack_d = setstack_icc;
cs->DC_Send_Data = icc_fill_fifo;
cs->DC_Close = DC_Close_icc;
cs->dc.icc.mon_tx = NULL;
cs->dc.icc.mon_rx = NULL;
......
......@@ -432,13 +432,7 @@ dch_int(struct IsdnCardState *cs)
cs->tx_cnt = 0;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
dch_fill_fifo(cs);
}
else {
sched_d_event(cs, D_XMTBUFREADY);
}
xmit_ready(cs);
}
afterXPR:
......@@ -472,7 +466,7 @@ dch_init(struct IsdnCardState *cs)
INIT_WORK(&cs->work, dch_bh, cs);
cs->setstack_d = dch_setstack;
cs->DC_Send_Data = dch_fill_fifo;
cs->dbusytimer.function = (void *) dbusy_timer_handler;
cs->dbusytimer.data = (long) cs;
init_timer(&cs->dbusytimer);
......
......@@ -22,7 +22,6 @@
#define DBUSY_TIMER_VALUE 80
#define ARCOFI_USE 1
static spinlock_t isac_lock = SPIN_LOCK_UNLOCKED;
static char *ISACVer[] __devinitdata =
{"2086/2186 V1.1", "2085 B1", "2085 B2",
......@@ -118,7 +117,6 @@ void
isac_empty_fifo(struct IsdnCardState *cs, int count)
{
u_char *ptr;
unsigned long flags;
if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
debugl1(cs, "isac_empty_fifo");
......@@ -133,10 +131,8 @@ isac_empty_fifo(struct IsdnCardState *cs, int count)
}
ptr = cs->rcvbuf + cs->rcvidx;
cs->rcvidx += count;
spin_lock_irqsave(&isac_lock, flags);
cs->readisacfifo(cs, ptr, count);
cs->writeisac(cs, ISAC_CMDR, 0x80);
spin_unlock_irqrestore(&isac_lock, flags);
if (cs->debug & L1_DEB_ISAC_FIFO) {
char *t = cs->dlog;
......@@ -151,13 +147,11 @@ isac_fill_fifo(struct IsdnCardState *cs)
{
int count, more;
unsigned char *p;
unsigned long flags;
p = xmit_fill_fifo_d(cs, 32, &count, &more);
if (!p)
return;
spin_lock_irqsave(&isac_lock, flags);
cs->writeisacfifo(cs, p, count);
cs->writeisac(cs, ISAC_CMDR, more ? 0x8 : 0xa);
if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
......@@ -167,7 +161,6 @@ isac_fill_fifo(struct IsdnCardState *cs)
init_timer(&cs->dbusytimer);
cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
add_timer(&cs->dbusytimer);
spin_unlock_irqrestore(&isac_lock, flags);
}
void
......@@ -176,7 +169,6 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
u_char exval, v1;
struct sk_buff *skb;
unsigned int count;
unsigned long flags;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC interrupt %x", val);
......@@ -203,7 +195,6 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
if (count == 0)
count = 32;
isac_empty_fifo(cs, count);
spin_lock_irqsave(&isac_lock, flags);
if ((count = cs->rcvidx) > 0) {
cs->rcvidx = 0;
if (!(skb = alloc_skb(count, GFP_ATOMIC)))
......@@ -213,7 +204,6 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
skb_queue_tail(&cs->rq, skb);
}
}
spin_unlock_irqrestore(&isac_lock, flags);
}
cs->rcvidx = 0;
sched_d_event(cs, D_RCVBUFREADY);
......@@ -241,11 +231,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
cs->tx_skb = NULL;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
isac_fill_fifo(cs);
} else
sched_d_event(cs, D_XMTBUFREADY);
xmit_ready_d(cs);
}
afterXPR:
if (val & 0x04) { /* CISQ */
......@@ -616,6 +602,7 @@ initisac(struct IsdnCardState *cs)
INIT_WORK(&cs->work, isac_bh, cs);
cs->setstack_d = setstack_isac;
cs->DC_Send_Data = isac_fill_fifo;
cs->DC_Close = DC_Close_isac;
cs->dc.isac.mon_tx = NULL;
cs->dc.isac.mon_rx = NULL;
......
......@@ -1143,7 +1143,6 @@ isar_int_main(struct IsdnCardState *cs)
struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
struct BCState *bcs;
spin_lock(&cs->lock);
get_irq_infos(cs, ireg);
switch (ireg->iis & ISAR_IIS_MSCMSD) {
case ISAR_IIS_RDATA:
......@@ -1229,7 +1228,6 @@ isar_int_main(struct IsdnCardState *cs)
ireg->iis, ireg->cmsb, ireg->clsb);
break;
}
spin_unlock(&cs->lock);
}
static void
......
......@@ -73,6 +73,19 @@ xmit_ready_b(struct BCState *bcs)
}
}
/* called with the card lock held */
static inline void
xmit_ready_d(struct IsdnCardState *cs)
{
cs->tx_skb = skb_dequeue(&cs->sq);
if (cs->tx_skb) {
cs->tx_cnt = 0;
cs->DC_Send_Data(cs);
} else {
sched_d_event(cs, D_XMTBUFREADY);
}
}
static inline void
xmit_data_req_b(struct BCState *bcs, struct sk_buff *skb)
{
......
......@@ -89,11 +89,7 @@ isurf_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char val;
int cnt = 5;
if (!cs) {
printk(KERN_WARNING "ISurf: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readb(cs->hw.isurf.isar + ISAR_IRQBIT);
Start_ISAR:
if (val & ISAR_IRQSTA)
......@@ -121,6 +117,7 @@ isurf_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writeb(0xFF, cs->hw.isurf.isac + ISAC_MASK);mb();
writeb(0, cs->hw.isurf.isac + ISAC_MASK);mb();
writeb(ISAR_IRQMSK, cs->hw.isurf.isar + ISAR_IRQBIT); mb();
spin_unlock(&cs->lock);
}
void
......
......@@ -141,10 +141,7 @@ ix1micro_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "IX1: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
if (val)
......@@ -171,6 +168,7 @@ ix1micro_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0);
writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0);
writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0);
spin_unlock(&cs->lock);
}
void
......
......@@ -170,7 +170,6 @@ jade_int_main(struct IsdnCardState *cs, u_char val, int jade)
struct BCState *bcs;
bcs = cs->bcs + jade;
spin_lock(&cs->lock);
if (val & jadeISR_RFO) {
/* handled with RDO */
val &= ~jadeISR_RFO;
......@@ -183,5 +182,4 @@ jade_int_main(struct IsdnCardState *cs, u_char val, int jade)
debugl1(cs, "JADE %c interrupt %x", 'A'+jade, val);
jade_interrupt(cs, val, jade);
}
spin_unlock(&cs->lock);
}
......@@ -137,10 +137,7 @@ mic_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "mic: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
if (val)
......@@ -167,6 +164,7 @@ mic_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_MASK, 0x0);
writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK, 0x0);
writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0x0);
spin_unlock(&cs->lock);
}
void
......
......@@ -147,11 +147,8 @@ niccy_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "Niccy: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
if (cs->subtyp == NICCY_PCI) {
int ival;
ival = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
......@@ -185,6 +182,7 @@ niccy_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40, 0);
spin_unlock(&cs->lock);
}
void
......
......@@ -156,10 +156,7 @@ s0box_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char val;
int count = 0;
if (!cs) {
printk(KERN_WARNING "Teles: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA);
Start_HSCX:
if (val)
......@@ -189,6 +186,7 @@ s0box_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_MASK, 0x0);
writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[0], HSCX_MASK, 0x0);
writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
void
......
......@@ -133,10 +133,7 @@ saphir_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "saphir: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
if (val)
......@@ -168,6 +165,7 @@ saphir_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_MASK, 0);
writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK, 0);
writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK + 0x40, 0);
spin_unlock(&cs->lock);
}
static void
......
......@@ -369,11 +369,7 @@ sedlbauer_interrupt_isar(int intno, void *dev_id, struct pt_regs *regs)
u_char val;
int cnt = 5;
if (!cs) {
printk(KERN_WARNING "Sedlbauer: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT);
Start_ISAR:
if (val & ISAR_IRQSTA)
......@@ -402,6 +398,7 @@ sedlbauer_interrupt_isar(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_MASK, 0xFF);
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_MASK, 0x0);
writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT, ISAR_IRQMSK);
spin_unlock(&cs->lock);
}
void
......
......@@ -104,10 +104,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "Sportster: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = READHSCX(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
......@@ -130,6 +127,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs)
}
/* get a new irq impulse if there any pending */
bytein(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ +1);
spin_unlock(&cs->lock);
}
void
......
......@@ -172,10 +172,7 @@ TeleInt_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "TeleInt: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA);
Start_ISAC:
if (val)
......@@ -188,6 +185,7 @@ TeleInt_interrupt(int intno, void *dev_id, struct pt_regs *regs)
}
writereg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_MASK, 0xFF);
writereg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_MASK, 0x0);
spin_unlock(&cs->lock);
}
static void
......
......@@ -150,10 +150,7 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char val;
int count = 0;
if (!cs) {
printk(KERN_WARNING "Teles0: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
Start_HSCX:
if (val)
......@@ -181,6 +178,7 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
void
......
......@@ -108,10 +108,7 @@ teles3_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char val;
int count = 0;
if (!cs) {
printk(KERN_WARNING "Teles: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA);
Start_HSCX:
if (val)
......@@ -141,6 +138,7 @@ teles3_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writereg(cs->hw.teles3.isac, ISAC_MASK, 0x0);
writereg(cs->hw.teles3.hscx[0], HSCX_MASK, 0x0);
writereg(cs->hw.teles3.hscx[1], HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
inline static void
......
......@@ -233,10 +233,7 @@ telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u_char val;
if (!cs) {
printk(KERN_WARNING "TelesPCI: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
if (val)
hscx_int_main(cs, val);
......@@ -252,6 +249,7 @@ telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
void
......
......@@ -369,11 +369,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs)
cs->tx_skb = NULL;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
W6692_fill_fifo(cs);
} else
sched_d_event(cs, D_XMTBUFREADY);
xmit_ready_d(cs);
}
afterXFR:
if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */
......@@ -946,6 +942,7 @@ setup_w6692(struct IsdnCard *card)
cs->BC_Read_Reg = &ReadW6692B;
cs->BC_Write_Reg = &WriteW6692B;
cs->BC_Send_Data = &W6692B_fill_fifo;
cs->DC_Send_Data = &W6692_fill_fifo;
cs->cardmsg = &w6692_card_msg;
cs->irq_func = &W6692_interrupt;
cs->irq_flags |= SA_SHIRQ;
......
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