Commit 4f6e4892 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Andy Gross

arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes

Add thermal zones, tsens and qfprom nodes
Acked-by: default avatarEduardo Valentin <edubezval@gmail.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 0f6625fd
......@@ -160,6 +160,49 @@ pmu {
interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
};
thermal-zones {
cpu-thermal0 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 4>;
trips {
cpu_alert0: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu-thermal1 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 3>;
trips {
cpu_alert1: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit1: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
......@@ -620,6 +663,27 @@ rng@22000 {
clocks = <&gcc GCC_PRNG_AHB_CLK>;
clock-names = "core";
};
qfprom: qfprom@5c000 {
compatible = "qcom,qfprom";
reg = <0x5c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
tsens_caldata: caldata@d0 {
reg = <0xd0 0x8>;
};
tsens_calsel: calsel@ec {
reg = <0xec 0x4>;
};
};
tsens: thermal-sensor@4a8000 {
compatible = "qcom,msm8916-tsens";
reg = <0x4a8000 0x2000>;
nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
nvmem-cell-names = "calib", "calib_sel";
#thermal-sensor-cells = <1>;
};
};
smd {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment