Commit 50a8835b authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Shawn Guo

ARM: dts: imx6sl: add baud clock and clock-names for ssi

Baud clock is used for bit clock generation in master mode. Ipg clock
is peripheral clock and peripheral access clock.
Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 935632e9
...@@ -231,7 +231,9 @@ ssi1: ssi@02028000 { ...@@ -231,7 +231,9 @@ ssi1: ssi@02028000 {
"fsl,imx51-ssi"; "fsl,imx51-ssi";
reg = <0x02028000 0x4000>; reg = <0x02028000 0x4000>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_SSI1>; clocks = <&clks IMX6SL_CLK_SSI1_IPG>,
<&clks IMX6SL_CLK_SSI1>;
clock-names = "ipg", "baud";
dmas = <&sdma 37 1 0>, dmas = <&sdma 37 1 0>,
<&sdma 38 1 0>; <&sdma 38 1 0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
...@@ -245,7 +247,9 @@ ssi2: ssi@0202c000 { ...@@ -245,7 +247,9 @@ ssi2: ssi@0202c000 {
"fsl,imx51-ssi"; "fsl,imx51-ssi";
reg = <0x0202c000 0x4000>; reg = <0x0202c000 0x4000>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_SSI2>; clocks = <&clks IMX6SL_CLK_SSI2_IPG>,
<&clks IMX6SL_CLK_SSI2>;
clock-names = "ipg", "baud";
dmas = <&sdma 41 1 0>, dmas = <&sdma 41 1 0>,
<&sdma 42 1 0>; <&sdma 42 1 0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
...@@ -259,7 +263,9 @@ ssi3: ssi@02030000 { ...@@ -259,7 +263,9 @@ ssi3: ssi@02030000 {
"fsl,imx51-ssi"; "fsl,imx51-ssi";
reg = <0x02030000 0x4000>; reg = <0x02030000 0x4000>;
interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_SSI3>; clocks = <&clks IMX6SL_CLK_SSI3_IPG>,
<&clks IMX6SL_CLK_SSI3>;
clock-names = "ipg", "baud";
dmas = <&sdma 45 1 0>, dmas = <&sdma 45 1 0>,
<&sdma 46 1 0>; <&sdma 46 1 0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
......
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