Commit 543bb255 authored by Stephen Warren's avatar Stephen Warren Committed by Mark Brown

spi: add ability to validate xfer->bits_per_word in SPI core

Allow SPI masters to define the set of bits_per_word values they support.
If they do this, then the SPI core will reject transfers that attempt to
use an unsupported bits_per_word value. This eliminates the need for each
SPI driver to implement this checking in most cases.
Signed-off-by: default avatarStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 5c725b34
...@@ -1377,6 +1377,14 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message) ...@@ -1377,6 +1377,14 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
xfer->bits_per_word = spi->bits_per_word; xfer->bits_per_word = spi->bits_per_word;
if (!xfer->speed_hz) if (!xfer->speed_hz)
xfer->speed_hz = spi->max_speed_hz; xfer->speed_hz = spi->max_speed_hz;
if (master->bits_per_word_mask) {
/* Only 32 bits fit in the mask */
if (xfer->bits_per_word > 32)
return -EINVAL;
if (!(master->bits_per_word_mask &
BIT(xfer->bits_per_word - 1)))
return -EINVAL;
}
} }
message->spi = spi; message->spi = spi;
......
...@@ -228,6 +228,11 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) ...@@ -228,6 +228,11 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
* every chipselect is connected to a slave. * every chipselect is connected to a slave.
* @dma_alignment: SPI controller constraint on DMA buffers alignment. * @dma_alignment: SPI controller constraint on DMA buffers alignment.
* @mode_bits: flags understood by this controller driver * @mode_bits: flags understood by this controller driver
* @bits_per_word_mask: A mask indicating which values of bits_per_word are
* supported by the driver. Bit n indicates that a bits_per_word n+1 is
* suported. If set, the SPI core will reject any transfer with an
* unsupported bits_per_word. If not set, this value is simply ignored,
* and it's up to the individual driver to perform any validation.
* @flags: other constraints relevant to this driver * @flags: other constraints relevant to this driver
* @bus_lock_spinlock: spinlock for SPI bus locking * @bus_lock_spinlock: spinlock for SPI bus locking
* @bus_lock_mutex: mutex for SPI bus locking * @bus_lock_mutex: mutex for SPI bus locking
...@@ -301,6 +306,9 @@ struct spi_master { ...@@ -301,6 +306,9 @@ struct spi_master {
/* spi_device.mode flags understood by this controller driver */ /* spi_device.mode flags understood by this controller driver */
u16 mode_bits; u16 mode_bits;
/* bitmask of supported bits_per_word for transfers */
u32 bits_per_word_mask;
/* other constraints relevant to this driver */ /* other constraints relevant to this driver */
u16 flags; u16 flags;
#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
......
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