powerpc/85xx: Update SRIO device tree nodes

Update all dts files that support SRIO controllers to match the new
fsl,srio device tree binding.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi

@@ -82,18 +82,19 @@ pcie@0 {
 };
 
 &rio {
+	compatible = "fsl,srio";
+	interrupts = <48 2 0 0>;
 	#address-cells = <2>;
 	#size-cells = <2>;
-	compatible = "fsl,mpc8568-rapidio", "fsl,rapidio-delta";
-	interrupts = <48 2 0 0 /* error     */
-		      49 2 0 0 /* bell_outb */
-		      50 2 0 0 /* bell_inb  */
-		      53 2 0 0 /* msg1_tx   */
-		      54 2 0 0 /* msg1_rx   */
-		      55 2 0 0 /* msg2_tx   */
-		      56 2 0 0 /* msg2_rx   */>;
-	sleep = <&pmc 0x00080000   /* controller */
-		 &pmc 0x00040000>; /* message unit */
+	fsl,srio-rmu-handle = <&rmu>;
+	sleep = <&pmc 0x00080000>;
+	ranges;
+
+	port1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <1>;
+	};
 };
 
 &soc {
@@ -178,6 +179,10 @@ crypto@30000 {
 	};
 
 /include/ "pq3-mpic.dtsi"
+/include/ "pq3-rmu-0.dtsi"
+	rmu@d3000 {
+		sleep = <&pmc 0x00040000>;
+	};
 
 	global-utilities@e0000 {
 		#address-cells = <1>;

arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi

@@ -70,17 +70,25 @@ pcie@0 {
 };
 
 &rio {
+	compatible = "fsl,srio";
+	interrupts = <48 2 0 0>;
 	#address-cells = <2>;
 	#size-cells = <2>;
-	compatible = "fsl,mpc8569-rapidio", "fsl,rapidio-delta";
-	interrupts = <48 2 0 0 /* error     */
-		      49 2 0 0 /* bell_outb */
-		      50 2 0 0 /* bell_inb  */
-		      53 2 0 0 /* msg1_tx   */
-		      54 2 0 0 /* msg1_rx   */
-		      55 2 0 0 /* msg2_tx   */
-		      56 2 0 0 /* msg2_rx   */>;
+	fsl,srio-rmu-handle = <&rmu>;
 	sleep = <&pmc 0x00080000>;
+	ranges;
+
+	port1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <1>;
+	};
+
+	port2 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <2>;
+	};
 };
 
 &soc {
@@ -159,6 +167,10 @@ crypto@30000 {
 	};
 
 /include/ "pq3-mpic.dtsi"
+/include/ "pq3-rmu-0.dtsi"
+	rmu@d3000 {
+		sleep = <&pmc 0x00040000>;
+	};
 
 	global-utilities@e0000 {
 		#address-cells = <1>;

arch/powerpc/boot/dts/fsl/p2041si-post.dtsi

@@ -120,6 +120,26 @@ pcie@0 {
 	};
 };
 
+&rio {
+	compatible = "fsl,srio";
+	interrupts = <16 2 1 11>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	port1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <1>;
+	};
+
+	port2 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <2>;
+	};
+};
+
 &dcsr {
 	#address-cells = <1>;
 	#size-cells = <1>;

arch/powerpc/boot/dts/fsl/p3041si-post.dtsi

@@ -147,6 +147,26 @@ pcie@0 {
 	};
 };
 
+&rio {
+	compatible = "fsl,srio";
+	interrupts = <16 2 1 11>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	port1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <1>;
+	};
+
+	port2 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <2>;
+	};
+};
+
 &dcsr {
 	#address-cells = <1>;
 	#size-cells = <1>;

arch/powerpc/boot/dts/fsl/p4080si-post.dtsi

@@ -121,17 +121,24 @@ pcie@0 {
 };
 
 &rio {
+	compatible = "fsl,srio";
+	interrupts = <16 2 1 11>;
 	#address-cells = <2>;
 	#size-cells = <2>;
-	compatible = "fsl,rapidio-delta";
-	interrupts = <
-		16 2 1 11 /* err_irq */
-		56 2 0 0  /* bell_outb_irq */
-		57 2 0 0  /* bell_inb_irq */
-		60 2 0 0  /* msg1_tx_irq */
-		61 2 0 0  /* msg1_rx_irq */
-		62 2 0 0  /* msg2_tx_irq */
-		63 2 0 0>; /* msg2_rx_irq */
+	fsl,srio-rmu-handle = <&rmu>;
+	ranges;
+
+	port1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <1>;
+	};
+
+	port2 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <2>;
+	};
 };
 
 &dcsr {
@@ -280,6 +287,7 @@ iommu@20000 {
 			16 2 1 30>;
 	};
 
+/include/ "qoriq-rmu-0.dtsi"
 /include/ "qoriq-mpic.dtsi"
 
 	guts: global-utilities@e0000 {

arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi

@@ -69,8 +69,6 @@ aliases {
 		rtic_c = &rtic_c;
 		rtic_d = &rtic_d;
 		sec_mon = &sec_mon;
-
-		rio0 = &rapidio0;
 	};
 
 	cpus {

arch/powerpc/boot/dts/fsl/p5020si-post.dtsi

@@ -147,6 +147,26 @@ pcie@0 {
 	};
 };
 
+&rio {
+	compatible = "fsl,srio";
+	interrupts = <16 2 1 11>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	port1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <1>;
+	};
+
+	port2 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <2>;
+	};
+};
+
 &dcsr {
 	#address-cells = <1>;
 	#size-cells = <1>;

arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi

+/*
+ * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+rmu: rmu@d3000 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,srio-rmu";
+	reg = <0xd3000 0x500>;
+	ranges = <0x0 0xd3000 0x500>;
+
+	message-unit@0 {
+		compatible = "fsl,srio-msg-unit";
+		reg = <0x0 0x100>;
+		interrupts = <
+			53 2 0 0 /* msg1_tx_irq */
+			54 2 0 0>;/* msg1_rx_irq */
+	};
+	message-unit@100 {
+		compatible = "fsl,srio-msg-unit";
+		reg = <0x100 0x100>;
+		interrupts = <
+			55 2 0 0  /* msg2_tx_irq */
+			56 2 0 0>;/* msg2_rx_irq */
+	};
+	doorbell-unit@400 {
+		compatible = "fsl,srio-dbell-unit";
+		reg = <0x400 0x80>;
+		interrupts = <
+			49 2 0 0  /* bell_outb_irq */
+			50 2 0 0>;/* bell_inb_irq */
+	};
+	port-write-unit@4e0 {
+		compatible = "fsl,srio-port-write-unit";
+		reg = <0x4e0 0x20>;
+		interrupts = <48 2 0 0>;
+	};
+};

arch/powerpc/boot/dts/mpc8568mds.dts

@@ -297,7 +297,9 @@ pcie@0 {
 
 	rio: rapidio@e00c00000 {
 		reg = <0x0 0xe00c0000 0x0 0x20000>;
-		ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+		port1 {
+			ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+		};
 	};
 
 	leds {

arch/powerpc/boot/dts/mpc8569mds.dts

@@ -440,7 +440,12 @@ pcie@0 {
 
 	rio: rapidio@e00c00000 {
 		reg = <0x0 0xe00c0000 0x0 0x20000>;
-		ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+		port1 {
+			ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+		};
+		port2 {
+			status = "disabled";
+		};
 	};
 };
 

arch/powerpc/boot/dts/mpc8641_hpcn.dts

@@ -26,13 +26,6 @@ aliases {
 		serial1 = &serial1;
 		pci0 = &pci0;
 		pci1 = &pci1;
-/*
- * Only one of Rapid IO or PCI can be present due to HW limitations and
- * due to the fact that the 2 now share address space in the new memory
- * map.  The most likely case is that we have PCI, so comment out the
- * rapidio node.  Leave it here for reference.
- */
-		/* rapidio0 = &rapidio0; */
 	};
 
 	cpus {
@@ -361,6 +354,41 @@ mpic: pic@40000 {
 			device_type = "open-pic";
 		};
 
+		rmu: rmu@d3000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,srio-rmu";
+			reg = <0xd3000 0x500>;
+			ranges = <0x0 0xd3000 0x500>;
+
+			message-unit@0 {
+				compatible = "fsl,srio-msg-unit";
+				reg = <0x0 0x100>;
+				interrupts = <
+					53 2 /* msg1_tx_irq */
+					54 2>;/* msg1_rx_irq */
+			};
+			message-unit@100 {
+				compatible = "fsl,srio-msg-unit";
+				reg = <0x100 0x100>;
+				interrupts = <
+					55 2  /* msg2_tx_irq */
+					56 2>;/* msg2_rx_irq */
+			};
+			doorbell-unit@400 {
+				compatible = "fsl,srio-dbell-unit";
+				reg = <0x400 0x80>;
+				interrupts = <
+					49 2  /* bell_outb_irq */
+					50 2>;/* bell_inb_irq */
+			};
+			port-write-unit@4e0 {
+				compatible = "fsl,srio-port-write-unit";
+				reg = <0x4e0 0x20>;
+				interrupts = <48 2>;
+			};
+		};
+
 		global-utilities@e0000 {
 			compatible = "fsl,mpc8641-guts";
 			reg = <0xe0000 0x1000>;
@@ -612,16 +640,27 @@ pcie@0 {
 		};
 	};
 /*
-	rapidio0: rapidio@ffec0000 {
+ * Only one of Rapid IO or PCI can be present due to HW limitations and
+ * due to the fact that the 2 now share address space in the new memory
+ * map.  The most likely case is that we have PCI, so comment out the
+ * rapidio node.  Leave it here for reference.
+
+	rapidio@ffec0000 {
+		reg = <0xffec0000 0x11000>;
+		compatible = "fsl,srio";
+		interrupt-parent = <&mpic>;
+		interrupts = <48 2>;
 		#address-cells = <2>;
 		#size-cells = <2>;
-		compatible = "fsl,rapidio-delta";
-		reg = <0xffec0000 0x20000>;
-		ranges = <0 0 0x80000000 0 0x20000000>;
-		interrupt-parent = <&mpic>;
-		// err_irq bell_outb_irq bell_inb_irq
-		//	msg1_tx_irq msg1_rx_irq	msg2_tx_irq msg2_rx_irq
-		interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
+		fsl,srio-rmu-handle = <&rmu>;
+		ranges;
+
+		port1 {
+			#address-cells = <2>;
+			#size-cells = <2>;
+			cell-index = <1>;
+			ranges = <0 0 0x80000000 0 0x20000000>;
+		};
 	};
 */
 

arch/powerpc/boot/dts/p2041rdb.dts

@@ -108,6 +108,17 @@ usb1: usb@211000 {
 		};
 	};
 
+	rio: rapidio@ffe0c0000 {
+		reg = <0xf 0xfe0c0000 0 0x11000>;
+
+		port1 {
+			ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+		};
+		port2 {
+			ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+		};
+	};
+
 	lbc: localbus@ffe124000 {
 		reg = <0xf 0xfe124000 0 0x1000>;
 		ranges = <0 0 0xf 0xe8000000 0x08000000>;

arch/powerpc/boot/dts/p3041ds.dts

@@ -101,6 +101,17 @@ rtc@68 {
 		};
 	};
 
+	rio: rapidio@ffe0c0000 {
+		reg = <0xf 0xfe0c0000 0 0x11000>;
+
+		port1 {
+			ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+		};
+		port2 {
+			ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+		};
+	};
+
 	lbc: localbus@ffe124000 {
 		reg = <0xf 0xfe124000 0 0x1000>;
 		ranges = <0 0 0xf 0xe8000000 0x08000000

arch/powerpc/boot/dts/p4080ds.dts

@@ -108,9 +108,15 @@ usb1: usb@211000 {
 		};
 	};
 
-	rio: rapidio0: rapidio@ffe0c0000 {
-		reg = <0xf 0xfe0c0000 0 0x20000>;
-		ranges = <0 0 0xc 0x20000000 0 0x01000000>;
+	rio: rapidio@ffe0c0000 {
+		reg = <0xf 0xfe0c0000 0 0x11000>;
+
+		port1 {
+			ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+		};
+		port2 {
+			ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+		};
 	};
 
 	lbc: localbus@ffe124000 {

arch/powerpc/boot/dts/p5020ds.dts

@@ -101,6 +101,17 @@ rtc@68 {
 		};
 	};
 
+	rio: rapidio@ffe0c0000 {
+		reg = <0xf 0xfe0c0000 0 0x11000>;
+
+		port1 {
+			ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+		};
+		port2 {
+			ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+		};
+	};
+
 	lbc: localbus@ffe124000 {
 		reg = <0xf 0xfe124000 0 0x1000>;
 		ranges = <0 0 0xf 0xe8000000 0x08000000