Commit 59832556 authored by Tomasz Figa's avatar Tomasz Figa Committed by Kukjin Kim

Documentation: devicetree: Update Exynos MCT bindings description

This patch updates description of device tree bindings for Exynos MCT
(multicore timers). Namely:
 - added note about simplified specification of local timer interrupts,
   when using single per-processor interrupt for all local timers,
 - changed first example that was incorrectly suggesting that global
   timer interrupts are optional,
 - simplified example interrupt map,
 - added example showing simplified local timer interrupt specification.
Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 022cf308
...@@ -31,38 +31,58 @@ Required properties: ...@@ -31,38 +31,58 @@ Required properties:
7: .. 7: ..
i: Local Timer Interrupt n i: Local Timer Interrupt n
Example 1: In this example, the system uses only the first global timer For MCT block that uses a per-processor interrupt for local timers, such
interrupt generated by MCT and the remaining three global timer as ones compatible with "samsung,exynos4412-mct", only one local timer
interrupts are unused. Two local timer interrupts have been interrupt might be specified, meaning that all local timers use the same
specified. per processor interrupt.
Example 1: In this example, the IP contains two local timers, using separate
interrupts, so two local timer interrupts have been specified,
in addition to four global timer interrupts.
mct@10050000 { mct@10050000 {
compatible = "samsung,exynos4210-mct"; compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>; reg = <0x10050000 0x800>;
interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
<0 42 0>, <0 48 0>; <0 42 0>, <0 48 0>;
}; };
Example 2: In this example, the MCT global and local timer interrupts are Example 2: In this example, the timer interrupts are connected to two separate
connected to two separate interrupt controllers. Hence, an interrupt controllers. Hence, an interrupt-map is created to map
interrupt-map is created to map the interrupts to the respective the interrupts to the respective interrupt controllers.
interrupt controllers.
mct@101C0000 { mct@101C0000 {
compatible = "samsung,exynos4210-mct"; compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>; reg = <0x101C0000 0x800>;
interrupt-controller;
#interrups-cells = <2>;
interrupt-parent = <&mct_map>; interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>, interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
<4 0>, <5 0>;
mct_map: mct-map { mct_map: mct-map {
#interrupt-cells = <2>; #interrupt-cells = <1>;
#address-cells = <0>; #address-cells = <0>;
#size-cells = <0>; #size-cells = <0>;
interrupt-map = <0x0 0 &combiner 23 3>, interrupt-map = <0 &gic 0 57 0>,
<0x4 0 &gic 0 120 0>, <1 &gic 0 69 0>,
<0x5 0 &gic 0 121 0>; <2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 0 42 0>,
<5 &gic 0 48 0>;
}; };
}; };
Example 3: In this example, the IP contains four local timers, but using
a per-processor interrupt to handle them. Either all the local
timer interrupts can be specified, with the same interrupt specifier
value or just the first one.
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
/* Both ways are possible in this case. Either: */
interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
<0 42 0>;
/* or: */
interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
<0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
};
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