Commit 5db40d7b authored by Simon Horman's avatar Simon Horman

ARM: dts: r7s72100: sort subnodes of root node

Sort the subnodes of the soc node to improve maintainability.
The sort has been done alphabetically with the node name as the key.

This patch should not introduce any functional change.
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 6f9fe6a6
......@@ -30,43 +30,45 @@ aliases {
spi4 = &spi4;
};
/* External clocks */
extal_clk: extal {
/* Fixed factor clocks */
b_clk: b {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <3>;
};
usb_x1_clk: usb_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
rtc_x1_clk: rtc_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 32678 */
clock-frequency = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
clock-frequency = <400000000>;
clocks = <&cpg_clocks R7S72100_CLK_I>;
next-level-cache = <&L2>;
};
};
rtc_x3_clk: rtc_x3 {
/* External clocks */
extal_clk: extal {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 4000000 */
/* If clk present, value must be set by board */
clock-frequency = <0>;
};
/* Fixed factor clocks */
b_clk: b {
p0_clk: p0 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <3>;
clock-div = <12>;
};
p1_clk: p1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
......@@ -74,26 +76,19 @@ p1_clk: p1 {
clock-mult = <1>;
clock-div = <6>;
};
p0_clk: p0 {
rtc_x1_clk: rtc_x1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <12>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 32678 */
clock-frequency = <0>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
clock-frequency = <400000000>;
clocks = <&cpg_clocks R7S72100_CLK_I>;
next-level-cache = <&L2>;
};
rtc_x3_clk: rtc_x3 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board to 4000000 */
clock-frequency = <0>;
};
soc {
......@@ -689,4 +684,11 @@ GIC_SPI 277 IRQ_TYPE_EDGE_RISING
status = "disabled";
};
};
usb_x1_clk: usb_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
};
};
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment