Commit 5db6b777 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Staging: add sxg network driver

This is the first rough cut at a driver for the Alacritech SLIC
Technology Non-Accelerated 10Gbe network driver

TODO:
  - lindent the code
  - remove typedefs
  - remove wrappers
  - checkpatch.pl cleanups
  - new functionality that the card needs

Cc: Christopher Harrer <charrer@alacritech.com>
Cc: Michael Miles <mmiles@alacritech.com>
Cc: Christopher Harrer <charrer@alacritech.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 4d6f6af8
......@@ -27,4 +27,6 @@ source "drivers/staging/et131x/Kconfig"
source "drivers/staging/slicoss/Kconfig"
source "drivers/staging/sxg/Kconfig"
endif # STAGING
......@@ -2,3 +2,4 @@
obj-$(CONFIG_ET131X) += et131x/
obj-$(CONFIG_SLICOSS) += slicoss/
obj-$(CONFIG_SXG) += sxg/
config SXG
tristate "Alacritech SLIC Technology Non-Accelerated 10Gbe support"
depends on PCI && NETDEV_10000
default n
help
This driver supports the Alacritech SLIC Technology Non-Accelerated
10Gbe network cards.
To compile this driver as a module, choose
M here: the module will be called sxg.
obj-$(CONFIG_SXG) += sxg.o
This is the rough cut at a driver for the Alacritech SLIC Technology
Non-Accelerated 10Gbe network driver.
TODO:
- lindent the code
- remove typedefs
- remove wrappers
- checkpatch.pl cleanups
- new functionality that the card needs
Please send patches to:
Greg Kroah-Hartman <gregkh@suse.de>
for any cleanups that you do to this driver.
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/**************************************************************************
*
* Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: sxg_os.h
*
* These are the Linux-specific definitions required for the SLICOSS
* driver, which should allow for greater portability to other OSes.
*/
#ifndef _SLIC_OS_SPECIFIC_H_
#define _SLIC_OS_SPECIFIC_H_
#define FALSE (0)
#define TRUE (1)
typedef struct _LIST_ENTRY {
struct _LIST_ENTRY *nle_flink;
struct _LIST_ENTRY *nle_blink;
} list_entry, LIST_ENTRY, *PLIST_ENTRY;
#define InitializeListHead(l) \
(l)->nle_flink = (l)->nle_blink = (l)
#define IsListEmpty(h) \
((h)->nle_flink == (h))
#define RemoveEntryList(e) \
do { \
list_entry *b; \
list_entry *f; \
\
f = (e)->nle_flink; \
b = (e)->nle_blink; \
b->nle_flink = f; \
f->nle_blink = b; \
} while (0)
/* These two have to be inlined since they return things. */
static __inline PLIST_ENTRY
RemoveHeadList(list_entry *l)
{
list_entry *f;
list_entry *e;
e = l->nle_flink;
f = e->nle_flink;
l->nle_flink = f;
f->nle_blink = l;
return (e);
}
static __inline PLIST_ENTRY
RemoveTailList(list_entry *l)
{
list_entry *b;
list_entry *e;
e = l->nle_blink;
b = e->nle_blink;
l->nle_blink = b;
b->nle_flink = l;
return (e);
}
#define InsertTailList(l, e) \
do { \
list_entry *b; \
\
b = (l)->nle_blink; \
(e)->nle_flink = (l); \
(e)->nle_blink = b; \
b->nle_flink = (e); \
(l)->nle_blink = (e); \
} while (0)
#define InsertHeadList(l, e) \
do { \
list_entry *f; \
\
f = (l)->nle_flink; \
(e)->nle_flink = f; \
(e)->nle_blink = l; \
f->nle_blink = (e); \
(l)->nle_flink = (e); \
} while (0)
#define ATK_DEBUG 1
#if ATK_DEBUG
#define SLIC_TIMESTAMP(value) { \
struct timeval timev; \
do_gettimeofday(&timev); \
value = timev.tv_sec*1000000 + timev.tv_usec; \
}
#else
#define SLIC_TIMESTAMP(value)
#endif
/****************** SXG DEFINES *****************************************/
#ifdef ATKDBG
#define SXG_TIMESTAMP(value) { \
struct timeval timev; \
do_gettimeofday(&timev); \
value = timev.tv_sec*1000000 + timev.tv_usec; \
}
#else
#define SXG_TIMESTAMP(value)
#endif
#define WRITE_REG(reg,value,flush) sxg_reg32_write((&reg), (value), (flush))
#define WRITE_REG64(a,reg,value,cpu) sxg_reg64_write((a),(&reg),(value),(cpu))
#define READ_REG(reg,value) (value) = readl((void __iomem *)(&reg))
#endif /* _SLIC_OS_SPECIFIC_H_ */
/**************************************************************************
*
* Copyright © 2000-2008 Alacritech, Inc. All rights reserved.
*
* $Id: sxgdbg.h,v 1.1 2008/06/27 12:49:28 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: sxgdbg.h
*
* All debug and assertion-based definitions and macros are included
* in this file for the SXGOSS driver.
*/
#ifndef _SXG_DEBUG_H_
#define _SXG_DEBUG_H_
#define ATKDBG 1
#define ATK_TRACE_ENABLED 1
#define DBG_ERROR(n, args...) printk(KERN_EMERG n, ##args)
#ifdef ASSERT
#undef ASSERT
#endif
#ifdef SXG_ASSERT_ENABLED
#ifndef ASSERT
#define ASSERT(a) \
{ \
if (!(a)) { \
DBG_ERROR("ASSERT() Failure: file %s, function %s line %d\n",\
__FILE__, __FUNCTION__, __LINE__); \
} \
}
#endif
#else
#ifndef ASSERT
#define ASSERT(a)
#endif
#endif /* SXG_ASSERT_ENABLED */
#ifdef ATKDBG
/*
* Global for timer granularity; every driver must have an instance
* of this initialized to 0
*/
extern ulong ATKTimerDiv;
/*
* trace_entry_t -
*
* This structure defines an entry in the trace buffer. The
* first few fields mean the same from entry to entry, while
* the meaning of last several fields change to suit the
* needs of the trace entry. Typically they are function call
* parameters.
*/
typedef struct _trace_entry_s {
char name[8]; /* 8 character name - like 's'i'm'b'a'r'c'v' */
u32 time; /* Current clock tic */
unsigned char cpu; /* Current CPU */
unsigned char irql; /* Current IRQL */
unsigned char driver; /* The driver which added the trace call */
unsigned char pad2; /* pad to 4 byte boundary - will probably get used */
u32 arg1; /* Caller arg1 */
u32 arg2; /* Caller arg2 */
u32 arg3; /* Caller arg3 */
u32 arg4; /* Caller arg4 */
} trace_entry_t, *ptrace_entry_t;
/*
* Driver types for driver field in trace_entry_t
*/
#define TRACE_SXG 1
#define TRACE_VPCI 2
#define TRACE_SLIC 3
#define TRACE_ENTRIES 1024
typedef struct _sxg_trace_buffer_t
{
unsigned int size; /* aid for windbg extension */
unsigned int in; /* Where to add */
unsigned int level; /* Current Trace level */
spinlock_t lock; /* For MP tracing */
trace_entry_t entries[TRACE_ENTRIES];/* The circular buffer */
} sxg_trace_buffer_t;
/*
* The trace levels
*
* XXX At the moment I am only defining critical, important, and noisy.
* I am leaving room for more if anyone wants them.
*/
#define TRACE_NONE 0 /* For trace level - if no tracing wanted */
#define TRACE_CRITICAL 1 /* minimal tracing - only critical stuff */
#define TRACE_IMPORTANT 5 /* more tracing - anything important */
#define TRACE_NOISY 10 /* Everything in the world */
/**********************************************************************
*
* The macros themselves -
*
*********************************************************************/
#if ATK_TRACE_ENABLED
#define SXG_TRACE_INIT(buffer, tlevel) \
{ \
memset((buffer), 0, sizeof(sxg_trace_buffer_t)); \
(buffer)->level = (tlevel); \
(buffer)->size = TRACE_ENTRIES; \
spin_lock_init(&(buffer)->lock); \
}
#else
#define SXG_TRACE_INIT(buffer, tlevel)
#endif
/*
* The trace macro. This is active only if ATK_TRACE_ENABLED is set.
*/
#if ATK_TRACE_ENABLED
#define SXG_TRACE(tdriver, buffer, tlevel, tname, a1, a2, a3, a4) { \
if ((buffer) && ((buffer)->level >= (tlevel))) { \
unsigned int trace_irql = 0; /* ?????? FIX THIS */ \
unsigned int trace_len; \
ptrace_entry_t trace_entry; \
struct timeval timev; \
\
spin_lock(&(buffer)->lock); \
trace_entry = &(buffer)->entries[(buffer)->in]; \
do_gettimeofday(&timev); \
\
memset(trace_entry->name, 0, 8); \
trace_len = strlen(tname); \
trace_len = trace_len > 8 ? 8 : trace_len; \
memcpy(trace_entry->name, (tname), trace_len); \
trace_entry->time = timev.tv_usec; \
trace_entry->cpu = (unsigned char)(smp_processor_id() & 0xFF); \
trace_entry->driver = (tdriver); \
trace_entry->irql = trace_irql; \
trace_entry->arg1 = (ulong)(a1); \
trace_entry->arg2 = (ulong)(a2); \
trace_entry->arg3 = (ulong)(a3); \
trace_entry->arg4 = (ulong)(a4); \
\
(buffer)->in++; \
if ((buffer)->in == TRACE_ENTRIES) \
(buffer)->in = 0; \
\
spin_unlock(&(buffer)->lock); \
} \
}
#else
#define SXG_TRACE(tdriver, buffer, tlevel, tname, a1, a2, a3, a4)
#endif
#endif
#endif /* _SXG_DEBUG_H_ */
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/*
* Copyright (C) 1997-2008 Alacritech, Inc. All rights reserved
*
* sxgphycode.h:
*
* This file PHY microcode and register initialization data.
*/
/**********************************************************************
* PHY Microcode
*
* The following contains both PHY microcode and PHY register
* initialization data. It is specific to both the PHY and the
* type of transceiver.
*
**********************************************************************/
/*
* Download for AEL2005C PHY with SR/LR transceiver (10GBASE-SR or 10GBASE-LR)
*/
static PHY_UCODE PhyUcode[] = {
/*
* NOTE: An address of 0 is a special case. When the download routine
* sees an address of 0, it does not write to the PHY. Instead, it
* delays the download. The length of the delay (in ms) is given in
* the data field.
*
* Delays are required at certain points.
*/
/*
* Platform-specific MDIO Patches:
* (include patches for 10G RX polarity flip, 50Mhz Synth, etc)
*/
/* Addr, Data */
{0xc017, 0xfeb0}, /* flip RX_LOS polarity (mandatory */
/* patch for SFP+ applications) */
{0xC001, 0x0428}, /* flip RX serial polarity */
{0xc013, 0xf341}, /* invert lxmit clock (mandatory patch) */
{0xc210, 0x8000}, /* reset datapath (mandatory patch) */
{0xc210, 0x8100}, /* reset datapath (mandatory patch) */
{0xc210, 0x8000}, /* reset datapath (mandatory patch) */
{0xc210, 0x0000}, /* reset datapath (mandatory patch) */
{0x0000, 0x0032}, /* wait for 50ms for datapath reset to */
/* complete. (mandatory patch) */
/* Configure the LED's */
{0xc214, 0x0099}, /* configure the LED drivers */
{0xc216, 0x5f5f}, /* configure the Activity LED */
{0xc217, 0x33ff}, /* configure the Link LED */
/* Transceiver-specific MDIO Patches: */
{0xc010, 0x448a}, /* (bit 14) mask out high BER input from the */
/* LOS signal in 1.000A */
/* (mandatory patch for SR code)*/
{0xc003, 0x0181}, /* (bit 7) enable the CDR inc setting in */
/* 1.C005 (mandatory patch for SR code) */
/* Transceiver-specific Microcontroller Initialization: */
{0xc04a, 0x5200}, /* activate microcontroller and pause */
{0x0000, 0x0032}, /* wait 50ms for microcontroller before */
/* writing in code. */
/* code block starts here: */
{0xcc00, 0x2009},
{0xcc01, 0x3009},
{0xcc02, 0x27ff},
{0xcc03, 0x300f},
{0xcc04, 0x200c},
{0xcc05, 0x300c},
{0xcc06, 0x20c4},
{0xcc07, 0x3c04},
{0xcc08, 0x6437},
{0xcc09, 0x20c4},
{0xcc0a, 0x3c04},
{0xcc0b, 0x6437},
{0xcc0c, 0x25c4},
{0xcc0d, 0x3c54},
{0xcc0e, 0x6724},
{0xcc0f, 0x25c4},
{0xcc10, 0x3c54},
{0xcc11, 0x6724},
{0xcc12, 0x2042},
{0xcc13, 0x3012},
{0xcc14, 0x1002},
{0xcc15, 0x2482},
{0xcc16, 0x3012},
{0xcc17, 0x1002},
{0xcc18, 0x2a32},
{0xcc19, 0x3002},
{0xcc1a, 0x1002},
{0xcc1b, 0x200d},
{0xcc1c, 0x304d},
{0xcc1d, 0x2862},
{0xcc1e, 0x3012},
{0xcc1f, 0x1002},
{0xcc20, 0x2982},
{0xcc21, 0x3002},
{0xcc22, 0x1002},
{0xcc23, 0x628f},
{0xcc24, 0x20a4},
{0xcc25, 0x3004},
{0xcc26, 0x6438},
{0xcc27, 0x20a4},
{0xcc28, 0x3004},
{0xcc29, 0x6438},
{0xcc2a, 0x2015},
{0xcc2b, 0x3005},
{0xcc2c, 0x5853},
{0xcc2d, 0x2bd2},
{0xcc2e, 0x3002},
{0xcc2f, 0x1342},
{0xcc30, 0x200c},
{0xcc31, 0x300c},
{0xcc32, 0x2ff7},
{0xcc33, 0x30f7},
{0xcc34, 0x20c4},
{0xcc35, 0x3c04},
{0xcc36, 0x6724},
{0xcc37, 0x20c4},
{0xcc38, 0x3c04},
{0xcc39, 0x6724},
{0xcc3a, 0x2d32},
{0xcc3b, 0x3002},
{0xcc3c, 0x1002},
{0xcc3d, 0x2008},
{0xcc3e, 0x3008},
{0xcc3f, 0x5c83},
{0xcc40, 0x2d52},
{0xcc41, 0x3002},
{0xcc42, 0x1352},
{0xcc43, 0x2008},
{0xcc44, 0x3008},
{0xcc45, 0x5c83},
{0xcc46, 0x2d32},
{0xcc47, 0x3002},
{0xcc48, 0x1352},
{0xcc49, 0x201c},
{0xcc4a, 0x300c},
{0xcc4b, 0x200d},
{0xcc4c, 0x310d},
{0xcc4d, 0x2862},
{0xcc4e, 0x3012},
{0xcc4f, 0x1002},
{0xcc50, 0x2ed2},
{0xcc51, 0x3002},
{0xcc52, 0x1342},
{0xcc53, 0x6f72},
{0xcc54, 0x1002},
{0xcc55, 0x628f},
{0xcc56, 0x2514},
{0xcc57, 0x3c64},
{0xcc58, 0x6436},
{0xcc59, 0x2514},
{0xcc5a, 0x3c64},
{0xcc5b, 0x6436},
{0xcc5c, 0x2fa4},
{0xcc5d, 0x3cd4},
{0xcc5e, 0x6624},
{0xcc5f, 0x2fa4},
{0xcc60, 0x3cd4},
{0xcc61, 0x6624},
{0xcc62, 0x2f45},
{0xcc63, 0x3015},
{0xcc64, 0x5653},
{0xcc65, 0x2eb2},
{0xcc66, 0x3002},
{0xcc67, 0x13d2},
{0xcc68, 0x2ed2},
{0xcc69, 0x3002},
{0xcc6a, 0x1002},
{0xcc6b, 0x6f72},
{0xcc6c, 0x1002},
{0xcc6d, 0x628f},
{0xcc6e, 0x2602},
{0xcc6f, 0x3012},
{0xcc70, 0x1002},
{0xcc71, 0x200d},
{0xcc72, 0x320d},
{0xcc73, 0x2862},
{0xcc74, 0x3012},
{0xcc75, 0x1002},
{0xcc76, 0x25c4},
{0xcc77, 0x3c54},
{0xcc78, 0x6437},
{0xcc79, 0x25c4},
{0xcc7a, 0x3c54},
{0xcc7b, 0x6437},
{0xcc7c, 0x20c4},
{0xcc7d, 0x3c04},
{0xcc7e, 0x6724},
{0xcc7f, 0x20c4},
{0xcc80, 0x3c04},
{0xcc81, 0x6724},
{0xcc82, 0x6f72},
{0xcc83, 0x1002},
{0xcc84, 0x628f},
{0xcc85, 0x26f2},
{0xcc86, 0x3012},
{0xcc87, 0x1002},
{0xcc88, 0xc503},
{0xcc89, 0xd5d5},
{0xcc8a, 0xc600},
{0xcc8b, 0x2a6d},
{0xcc8c, 0xc601},
{0xcc8d, 0x2a4c},
{0xcc8e, 0xc602},
{0xcc8f, 0x0111},
{0xcc90, 0xc60c},
{0xcc91, 0x5900},
{0xcc92, 0xc710},
{0xcc93, 0x0700},
{0xcc94, 0xc718},
{0xcc95, 0x0700},
{0xcc96, 0xc720},
{0xcc97, 0x4700},
{0xcc98, 0xc801},
{0xcc99, 0x7f50},
{0xcc9a, 0xc802},
{0xcc9b, 0x7760},
{0xcc9c, 0xc803},
{0xcc9d, 0x7fce},
{0xcc9e, 0xc804},
{0xcc9f, 0x5700},
{0xcca0, 0xc805},
{0xcca1, 0x5f11},
{0xcca2, 0xc806},
{0xcca3, 0x4751},
{0xcca4, 0xc807},
{0xcca5, 0x57e1},
{0xcca6, 0xc808},
{0xcca7, 0x2700},
{0xcca8, 0xc809},
{0xcca9, 0x0000},
{0xccaa, 0xc821},
{0xccab, 0x0002},
{0xccac, 0xc822},
{0xccad, 0x0014},
{0xccae, 0xc832},
{0xccaf, 0x1186},
{0xccb0, 0xc847},
{0xccb1, 0x1e02},
{0xccb2, 0xc013},
{0xccb3, 0xf341},
{0xccb4, 0xc01a},
{0xccb5, 0x0446},
{0xccb6, 0xc024},
{0xccb7, 0x1000},
{0xccb8, 0xc025},
{0xccb9, 0x0a00},
{0xccba, 0xc026},
{0xccbb, 0x0c0c},
{0xccbc, 0xc027},
{0xccbd, 0x0c0c},
{0xccbe, 0xc029},
{0xccbf, 0x00a0},
{0xccc0, 0xc030},
{0xccc1, 0x0a00},
{0xccc2, 0xc03c},
{0xccc3, 0x001c},
{0xccc4, 0xc005},
{0xccc5, 0x7a06},
{0xccc6, 0x0000},
{0xccc7, 0x0000},
{0xccc8, 0x628f},
{0xccc9, 0x26f2},
{0xccca, 0x3012},
{0xcccb, 0x1002},
{0xcccc, 0xc620},
{0xcccd, 0x0000},
{0xccce, 0xc621},
{0xcccf, 0x003f},
{0xccd0, 0xc622},
{0xccd1, 0x0000},
{0xccd2, 0xc623},
{0xccd3, 0x0000},
{0xccd4, 0xc624},
{0xccd5, 0x0000},
{0xccd6, 0xc625},
{0xccd7, 0x0000},
{0xccd8, 0xc627},
{0xccd9, 0x0000},
{0xccda, 0xc628},
{0xccdb, 0x0000},
{0xccdc, 0xc62c},
{0xccdd, 0x0000},
{0xccde, 0x0000},
{0xccdf, 0x0000},
{0xcce0, 0x628f},
{0xcce1, 0xd019},
{0xcce2, 0x26f2},
{0xcce3, 0x3012},
{0xcce4, 0x1002},
{0xcce5, 0xc210},
{0xcce6, 0x8000},
{0xcce7, 0xc210},
{0xcce8, 0x8010},
{0xcce9, 0xc210},
{0xccea, 0x8000},
{0xcceb, 0xc210},
{0xccec, 0x0000},
{0xcced, 0x0000},
{0xccee, 0x0000},
{0xccef, 0x8221},
{0xccf0, 0x2752},
{0xccf1, 0x3012},
{0xccf2, 0x1002},
{0xccf3, 0x6f72},
{0xccf4, 0x1002},
{0xccf5, 0x2806},
{0xccf6, 0x3006},
{0xccf7, 0x2007},
{0xccf8, 0x3cc7},
{0xccf9, 0xe161},
{0xccfa, 0xc171},
{0xccfb, 0x6134},
{0xccfc, 0x6135},
{0xccfd, 0x5453},
{0xccfe, 0x2858},
{0xccff, 0x3018},
{0xcd00, 0x1348},
{0xcd01, 0x6524},
{0xcd02, 0x27b8},
{0xcd03, 0x3018},
{0xcd04, 0x1008},
{0xcd05, 0x1002},
{0xcd06, 0x628f},
{0xcd07, 0x5dd3},
{0xcd08, 0x2906},
{0xcd09, 0x3016},
{0xcd0a, 0x1306},
{0xcd0b, 0x2ff7},
{0xcd0c, 0x30f7},
{0xcd0d, 0x60b7},
{0xcd0e, 0xdffd},
{0xcd0f, 0x0008},
{0xcd10, 0x6f72},
{0xcd11, 0x1002},
{0xcd12, 0x0000},
{0xcdff, 0x0a01},
/* end of code block */
/* Unpause the microcontroller to start program */
{0xca00, 0x0080},
{0xca12, 0x0000},
{0x0000, 0x000A}, /* wait 10ms just to be safe */
{0xffff, 0xffff} /* table terminator */
};
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