Commit 5e3465f6 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman

ARM64: dts: meson-gx: consistently use the GIC_SPI and IRQ type macros

the mailbox and ethmac nodes used the magic number "0" instead of the
GIC_SPI preprocessor macro. Additionally the ethmac used the magic
number "1" instead of IRQ_TYPE_EDGE_RISING.
Fix this to make the .dtsi easier to read.
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 5771a8c0
......@@ -437,9 +437,9 @@ hiubus: hiubus@c883c000 {
mailbox: mailbox@404 {
compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
reg = <0 0x404 0 0x4c>;
interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
<0 209 IRQ_TYPE_EDGE_RISING>,
<0 210 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
#mbox-cells = <1>;
};
};
......@@ -448,7 +448,7 @@ ethmac: ethernet@c9410000 {
compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
reg = <0x0 0xc9410000 0x0 0x10000
0x0 0xc8834540 0x0 0x4>;
interrupts = <0 8 1>;
interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "macirq";
status = "disabled";
};
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment