Commit 62240a88 authored by Rob Herring's avatar Rob Herring Committed by Lorenzo Pieralisi

PCI: rockchip: Drop storing driver private outbound resource data

The Rockchip host bridge driver doesn't need to store outboard resources
in its private struct as they are already stored in struct
pci_host_bridge.
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
parent 5c1306a0
......@@ -806,19 +806,28 @@ static int rockchip_pcie_prog_ib_atu(struct rockchip_pcie *rockchip,
static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
{
struct device *dev = rockchip->dev;
struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rockchip);
struct resource_entry *entry;
u64 pci_addr, size;
int offset;
int err;
int reg_no;
rockchip_pcie_cfg_configuration_accesses(rockchip,
AXI_WRAPPER_TYPE0_CFG);
entry = resource_list_first_type(&bridge->windows, IORESOURCE_MEM);
if (!entry)
return -ENODEV;
size = resource_size(entry->res);
pci_addr = entry->res->start - entry->offset;
rockchip->msg_bus_addr = pci_addr;
for (reg_no = 0; reg_no < (rockchip->mem_size >> 20); reg_no++) {
for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
err = rockchip_pcie_prog_ob_atu(rockchip, reg_no + 1,
AXI_WRAPPER_MEM_WRITE,
20 - 1,
rockchip->mem_bus_addr +
(reg_no << 20),
pci_addr + (reg_no << 20),
0);
if (err) {
dev_err(dev, "program RC mem outbound ATU failed\n");
......@@ -832,14 +841,20 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
return err;
}
offset = rockchip->mem_size >> 20;
for (reg_no = 0; reg_no < (rockchip->io_size >> 20); reg_no++) {
entry = resource_list_first_type(&bridge->windows, IORESOURCE_IO);
if (!entry)
return -ENODEV;
size = resource_size(entry->res);
pci_addr = entry->res->start - entry->offset;
offset = size >> 20;
for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
err = rockchip_pcie_prog_ob_atu(rockchip,
reg_no + 1 + offset,
AXI_WRAPPER_IO_WRITE,
20 - 1,
rockchip->io_bus_addr +
(reg_no << 20),
pci_addr + (reg_no << 20),
0);
if (err) {
dev_err(dev, "program RC io outbound ATU failed\n");
......@@ -852,8 +867,7 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
AXI_WRAPPER_NOR_MSG,
20 - 1, 0, 0);
rockchip->msg_bus_addr = rockchip->mem_bus_addr +
((reg_no + offset) << 20);
rockchip->msg_bus_addr += ((reg_no + offset) << 20);
return err;
}
......@@ -951,7 +965,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
struct pci_bus *bus, *child;
struct pci_host_bridge *bridge;
struct resource *bus_res;
struct resource_entry *win;
int err;
if (!dev->of_node)
......@@ -997,27 +1010,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
rockchip->root_bus_nr = bus_res->start;
/* Get the I/O and memory ranges from DT */
resource_list_for_each_entry(win, &bridge->windows) {
switch (resource_type(win->res)) {
case IORESOURCE_IO:
io = win->res;
io->name = "I/O";
rockchip->io_size = resource_size(io);
rockchip->io_bus_addr = io->start - win->offset;
rockchip->io = io;
break;
case IORESOURCE_MEM:
mem = win->res;
mem->name = "MEM";
rockchip->mem_size = resource_size(mem);
rockchip->mem_bus_addr = mem->start - win->offset;
break;
default:
continue;
}
}
err = rockchip_pcie_cfg_atu(rockchip);
if (err)
goto err_remove_irq_domain;
......
......@@ -304,13 +304,8 @@ struct rockchip_pcie {
struct irq_domain *irq_domain;
int offset;
struct pci_bus *root_bus;
struct resource *io;
phys_addr_t io_bus_addr;
u32 io_size;
void __iomem *msg_region;
u32 mem_size;
phys_addr_t msg_bus_addr;
phys_addr_t mem_bus_addr;
bool is_rc;
struct resource *mem_res;
};
......
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