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Commit 6abdf8d1 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5410/exynos542x 

Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
generates an error:
	genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)

The GIC requires shared interrupts to be edge rising or level high.
Platform declares support for both.  Arbitrarily choose level high
everywhere hoping it will work on each platform.
Reported-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Reported-by: default avatarAlban Browaeys <alban.browaeys@gmail.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Tested-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: default avatarAlim Akhtar <alim.akhtar@samsung.com>
parent 27e64b27
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Showing with 69 additions and 69 deletions
arch/arm/boot/dts/exynos5410.dtsi
View file @ 6abdf8d1
......@@ -85,7 +85,7 @@ clock: clock-controller@10010000 {
tmu_cpu0: tmu@10060000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 65 0>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
......@@ -94,7 +94,7 @@ tmu_cpu0: tmu@10060000 {
tmu_cpu1: tmu@10064000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10064000 0x100>;
interrupts = <GIC_SPI 183 0>;
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
......@@ -103,7 +103,7 @@ tmu_cpu1: tmu@10064000 {
tmu_cpu2: tmu@10068000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10068000 0x100>;
interrupts = <GIC_SPI 184 0>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
......@@ -112,7 +112,7 @@ tmu_cpu2: tmu@10068000 {
tmu_cpu3: tmu@1006c000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x1006c000 0x100>;
interrupts = <GIC_SPI 185 0>;
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
......@@ -121,7 +121,7 @@ tmu_cpu3: tmu@1006c000 {
mmc_0: mmc@12200000 {
compatible = "samsung,exynos5250-dw-mshc";
reg = <0x12200000 0x1000>;
interrupts = <0 75 0>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
......@@ -133,7 +133,7 @@ mmc_0: mmc@12200000 {
mmc_1: mmc@12210000 {
compatible = "samsung,exynos5250-dw-mshc";
reg = <0x12210000 0x1000>;
interrupts = <0 76 0>;
interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
......@@ -145,7 +145,7 @@ mmc_1: mmc@12210000 {
mmc_2: mmc@12220000 {
compatible = "samsung,exynos5250-dw-mshc";
reg = <0x12220000 0x1000>;
interrupts = <0 77 0>;
interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
......@@ -157,31 +157,31 @@ mmc_2: mmc@12220000 {
pinctrl_0: pinctrl@13400000 {
compatible = "samsung,exynos5410-pinctrl";
reg = <0x13400000 0x1000>;
interrupts = <0 45 0>;
interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <0 32 0>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
};
};
pinctrl_1: pinctrl@14000000 {
compatible = "samsung,exynos5410-pinctrl";
reg = <0x14000000 0x1000>;
interrupts = <0 46 0>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_2: pinctrl@10d10000 {
compatible = "samsung,exynos5410-pinctrl";
reg = <0x10d10000 0x1000>;
interrupts = <0 50 0>;
interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_3: pinctrl@03860000 {
compatible = "samsung,exynos5410-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <0 47 0>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -329,7 +329,7 @@ &usbdrd3_1 {
};
&usbdrd_dwc3_1 {
interrupts = <GIC_SPI 200 0>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
};
&usbdrd_phy1 {
......
arch/arm/boot/dts/exynos5420.dtsi
View file @ 6abdf8d1
This diff is collapsed.
arch/arm/boot/dts/exynos54xx.dtsi
View file @ 6abdf8d1
......@@ -62,34 +62,34 @@ mct_map: mct-map {
<1 &combiner 23 4>,
<2 &combiner 25 2>,
<3 &combiner 25 3>,
<4 &gic 0 120 0>,
<5 &gic 0 121 0>,
<6 &gic 0 122 0>,
<7 &gic 0 123 0>,
<8 &gic 0 128 0>,
<9 &gic 0 129 0>,
<10 &gic 0 130 0>,
<11 &gic 0 131 0>;
<4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
<5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
<6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
<7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
<8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
<9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
<10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
<11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
};
};
watchdog: watchdog@101d0000 {
compatible = "samsung,exynos5420-wdt";
reg = <0x101d0000 0x100>;
interrupts = <0 42 0>;
interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
};
sss: sss@10830000 {
compatible = "samsung,exynos4210-secss";
reg = <0x10830000 0x300>;
interrupts = <0 112 0>;
interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
};
/* i2c_0-3 are defined in exynos5.dtsi */
hsi2c_4: i2c@12ca0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12ca0000 0x1000>;
interrupts = <0 60 0>;
interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
......@@ -98,7 +98,7 @@ hsi2c_4: i2c@12ca0000 {
hsi2c_5: i2c@12cb0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12cb0000 0x1000>;
interrupts = <0 61 0>;
interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
......@@ -107,7 +107,7 @@ hsi2c_5: i2c@12cb0000 {
hsi2c_6: i2c@12cc0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12cc0000 0x1000>;
interrupts = <0 62 0>;
interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
......@@ -116,7 +116,7 @@ hsi2c_6: i2c@12cc0000 {
hsi2c_7: i2c@12cd0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12cd0000 0x1000>;
interrupts = <0 63 0>;
interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
......@@ -131,7 +131,7 @@ usbdrd3_0: usb3-0 {
usbdrd_dwc3_0: dwc3@12000000 {
compatible = "snps,dwc3";
reg = <0x12000000 0x10000>;
interrupts = <0 72 0>;
interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
phy-names = "usb2-phy", "usb3-phy";
};
......@@ -166,7 +166,7 @@ usbdrd_phy1: phy@12500000 {
usbhost2: usb@12110000 {
compatible = "samsung,exynos4210-ehci";
reg = <0x12110000 0x100>;
interrupts = <0 71 0>;
interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -179,7 +179,7 @@ port@0 {
usbhost1: usb@12120000 {
compatible = "samsung,exynos4210-ohci";
reg = <0x12120000 0x100>;
interrupts = <0 71 0>;
interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
......
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