Commit 6c47660e authored by Amadeusz Sławiński's avatar Amadeusz Sławiński Committed by Mark Brown

ASoC: Intel: Use readq to read 64 bit registers

In order to fix issue described in:
"ASoC: Intel: sst: ipc command timeout"
https://patchwork.kernel.org/patch/11482829/

use readq function, which is meant to read 64 bit values from registers.
On 32 bit platforms it falls back to two readl calls.
Reported-by: default avatarBrent Lu <brent.lu@intel.com>
Signed-off-by: default avatarAmadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Tested-by: default avatarBrent Lu <brent.lu@intel.com>
Acked-by: default avatarCezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20200507133405.32251-2-amadeuszx.slawinski@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 6a5d6fd3
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/io.h> #include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/delay.h> #include <linux/delay.h>
#include "sst-dsp.h" #include "sst-dsp.h"
...@@ -34,16 +34,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read); ...@@ -34,16 +34,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read);
void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value) void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value)
{ {
memcpy_toio(addr + offset, &value, sizeof(value)); writeq(value, addr + offset);
} }
EXPORT_SYMBOL_GPL(sst_shim32_write64); EXPORT_SYMBOL_GPL(sst_shim32_write64);
u64 sst_shim32_read64(void __iomem *addr, u32 offset) u64 sst_shim32_read64(void __iomem *addr, u32 offset)
{ {
u64 val; return readq(addr + offset);
memcpy_fromio(&val, addr + offset, sizeof(val));
return val;
} }
EXPORT_SYMBOL_GPL(sst_shim32_read64); EXPORT_SYMBOL_GPL(sst_shim32_read64);
......
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