Commit 6d6776e1 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'mvebu-dt64-4.14-2' of git://git.infradead.org/linux-mvebu into next/dt64

Pull "mvebu dt64 for 4.14 (part 2)" from Gregory CLEMENT:

- Enable uSD on ESPRESSObin (Armada 37xx based board)
- Add NAND support on Armada 7K/8K SoCs
- Enable USB host on Armada-7040-DB and Armada-8040-DB boards

* tag 'mvebu-dt64-4.14-2' of git://git.infradead.org/linux-mvebu:
  ARM64: dts: marvell: enable USB host on Armada-8040-DB
  ARM64: dts: marvell: enable USB host on Armada-7040-DB
  ARM64: dts: marvell: add NAND support on the CP110
  ARM64: dts: marvell: armada-37xx: Enable uSD on ESPRESSObin
  arm64: dts: marvell: Fully re-order nodes in Marvell CP110 dtsi files
parents 6b5fc336 0ea62502
......@@ -45,6 +45,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "armada-372x.dtsi"
/ {
......@@ -59,6 +60,20 @@ memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
vcc_sd_reg1: regulator {
compatible = "regulator-gpio";
regulator-name = "vcc_sd1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <1800000 0x1
3300000 0x0>;
enable-active-high;
};
};
/* J9 */
......@@ -71,6 +86,16 @@ &sata {
status = "okay";
};
/* J1 */
&sdhci1 {
wp-inverted;
bus-width = <4>;
cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
marvell,pad-type = "sd";
vqmmc-supply = <&vcc_sd_reg1>;
status = "okay";
};
/* Exported on the micro USB connector J5 through an FTDI */
&uart0 {
status = "okay";
......
......@@ -44,6 +44,7 @@
* Device Tree file for Marvell Armada 7040 Development board platform
*/
#include <dt-bindings/gpio/gpio.h>
#include "armada-7040.dtsi"
/ {
......@@ -59,6 +60,34 @@ memory@00000000 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb3h0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
};
cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb3h1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
};
cpm_usb3_0_phy: cpm-usb3-0-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cpm_reg_usb3_0_vbus>;
};
cpm_usb3_1_phy: cpm-usb3-1-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cpm_reg_usb3_1_vbus>;
};
};
&i2c0 {
......@@ -105,6 +134,14 @@ &cpm_pcie2 {
&cpm_i2c0 {
status = "okay";
clock-frequency = <100000>;
expander0: pca9555@21 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
reg = <0x21>;
};
};
&cpm_spi1 {
......@@ -140,10 +177,12 @@ &cpm_sata0 {
};
&cpm_usb3_0 {
usb-phy = <&cpm_usb3_0_phy>;
status = "okay";
};
&cpm_usb3_1 {
usb-phy = <&cpm_usb3_1_phy>;
status = "okay";
};
......
......@@ -44,6 +44,7 @@
* Device Tree file for Marvell Armada 8040 Development board platform
*/
#include <dt-bindings/gpio/gpio.h>
#include "armada-8040.dtsi"
/ {
......@@ -59,6 +60,48 @@ memory@00000000 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus {
compatible = "regulator-fixed";
regulator-name = "cpm-usb3h0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
};
cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus {
compatible = "regulator-fixed";
regulator-name = "cpm-usb3h1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
};
cpm_usb3_0_phy: cpm-usb3-0-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cpm_reg_usb3_0_vbus>;
};
cpm_usb3_1_phy: cpm-usb3-1-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cpm_reg_usb3_1_vbus>;
};
cps_reg_usb3_0_vbus: cps-usb3-0-vbus {
compatible = "regulator-fixed";
regulator-name = "cps-usb3h0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
};
cps_usb3_0_phy: cps-usb3-0-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cps_reg_usb3_0_vbus>;
};
};
&i2c0 {
......@@ -107,6 +150,25 @@ &cpm_pcie2 {
&cpm_i2c0 {
status = "okay";
clock-frequency = <100000>;
/* U31 */
expander0: pca9555@21 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
reg = <0x21>;
};
/* U25 */
expander1: pca9555@25 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
reg = <0x25>;
};
};
/* CON4 on CP0 expansion */
......@@ -116,11 +178,13 @@ &cpm_sata0 {
/* CON9 on CP0 expansion */
&cpm_usb3_0 {
usb-phy = <&cpm_usb3_0_phy>;
status = "okay";
};
/* CON10 on CP0 expansion */
&cpm_usb3_1 {
usb-phy = <&cpm_usb3_1_phy>;
status = "okay";
};
......@@ -159,6 +223,7 @@ &cps_sata0 {
/* CON9 on CP1 expansion */
&cps_usb3_0 {
usb-phy = <&cps_usb3_0_phy>;
status = "okay";
};
......
......@@ -162,15 +162,6 @@ cpm_gpio2: gpio@140 {
};
};
cpm_sata0: sata@540000 {
compatible = "marvell,armada-8k-ahci",
"generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_clk 1 15>;
status = "disabled";
};
cpm_usb3_0: usb3@500000 {
compatible = "marvell,armada-8k-xhci",
"generic-xhci";
......@@ -191,6 +182,15 @@ cpm_usb3_1: usb3@510000 {
status = "disabled";
};
cpm_sata0: sata@540000 {
compatible = "marvell,armada-8k-ahci",
"generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_clk 1 15>;
status = "disabled";
};
cpm_xor0: xor@6a0000 {
compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
reg = <0x6a0000 0x1000>,
......@@ -249,6 +249,21 @@ cpm_i2c1: i2c@701100 {
status = "disabled";
};
cpm_nand: nand@720000 {
/*
* Due to the limiation of the pin available
* this controller is only usable on the CPM
* for A7K and on the CPS for A8K.
*/
compatible = "marvell,armada370-nand";
reg = <0x720000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_clk 1 2>;
status = "disabled";
};
cpm_trng: trng@760000 {
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
......
......@@ -163,15 +163,6 @@ cps_gpio2: gpio@140 {
};
cps_sata0: sata@540000 {
compatible = "marvell,armada-8k-ahci",
"generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_clk 1 15>;
status = "disabled";
};
cps_usb3_0: usb3@500000 {
compatible = "marvell,armada-8k-xhci",
"generic-xhci";
......@@ -192,6 +183,15 @@ cps_usb3_1: usb3@510000 {
status = "disabled";
};
cps_sata0: sata@540000 {
compatible = "marvell,armada-8k-ahci",
"generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_clk 1 15>;
status = "disabled";
};
cps_xor0: xor@6a0000 {
compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
reg = <0x6a0000 0x1000>,
......@@ -250,6 +250,21 @@ cps_i2c1: i2c@701100 {
status = "disabled";
};
cps_nand: nand@720000 {
/*
* Due to the limiation of the pin available
* this controller is only usable on the CPM
* for A7K and on the CPS for A8K.
*/
compatible = "marvell,armada370-nand";
reg = <0x720000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_clk 1 2>;
status = "disabled";
};
cps_trng: trng@760000 {
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
......
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