Commit 6e862995 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Paul Mundt

sh: Add support for Solution Engine SH7721 board

Add support for Solution Engine SH7721 board(MS7721RP01).
Signed-off-by: default avatarYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent d391c621
......@@ -372,6 +372,14 @@ config SH_7619_SOLUTION_ENGINE
Select 7619 SolutionEngine if configuring for a Hitachi SH7619
evaluation board.
config SH_7721_SOLUTION_ENGINE
bool "SolutionEngine7721"
select SOLUTION_ENGINE
depends on CPU_SUBTYPE_SH7721
help
Select 7721 SolutionEngine if configuring for a Hitachi SH7721
evaluation board.
config SH_7722_SOLUTION_ENGINE
bool "SolutionEngine7722"
select SOLUTION_ENGINE
......
......@@ -107,6 +107,7 @@ machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751
machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
machdir-$(CONFIG_SH_HP6XX) += hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
machdir-$(CONFIG_SH_MPC1211) += mpc1211
......
obj-y := setup.o irq.o
/*
* linux/arch/sh/boards/se/7721/irq.c
*
* Copyright (C) 2008 Renesas Solutions Corp.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/se7721.h>
enum {
UNUSED = 0,
/* board specific interrupt sources */
MRSHPC,
};
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(MRSHPC, MRSHPC_IRQ0),
};
static struct intc_prio_reg prio_registers[] __initdata = {
{ FPGA_ILSR6, 0, 8, 4, /* IRLMSK */
{ 0, MRSHPC } },
};
static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
NULL, NULL, prio_registers, NULL);
/*
* Initialize IRQ setting
*/
void __init init_se7721_IRQ(void)
{
/* PPCR */
ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118);
register_intc_controller(&intc_desc);
intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
}
/*
* linux/arch/sh/boards/se/7721/setup.c
*
* Copyright (C) 2008 Renesas Solutions Corp.
*
* Hitachi UL SolutionEngine 7721 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se7721.h>
#include <asm/io.h>
#include <asm/heartbeat.h>
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct heartbeat_data heartbeat_data = {
.bit_pos = heartbeat_bit_pos,
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
.regsize = 16,
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct resource cf_ide_resources[] = {
[0] = {
.start = PA_MRSHPC_IO + 0x1f0,
.end = PA_MRSHPC_IO + 0x1f0 + 8 ,
.flags = IORESOURCE_IO,
},
[1] = {
.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
.end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
.flags = IORESOURCE_IO,
},
[2] = {
.start = MRSHPC_IRQ0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
};
static struct platform_device *se7721_devices[] __initdata = {
&cf_ide_device,
&heartbeat_device
};
static int __init se7721_devices_setup(void)
{
return platform_add_devices(se7721_devices,
ARRAY_SIZE(se7721_devices));
}
device_initcall(se7721_devices_setup);
static void __init se7721_setup(char **cmdline_p)
{
/* for USB */
ctrl_outw(0x0000, 0xA405010C); /* PGCR */
ctrl_outw(0x0000, 0xA405010E); /* PHCR */
ctrl_outw(0x00AA, 0xA4050118); /* PPCR */
ctrl_outw(0x0000, 0xA4050124); /* PSELA */
}
/*
* The Machine Vector
*/
struct sh_machine_vector mv_se7721 __initmv = {
.mv_name = "Solution Engine 7721",
.mv_setup = se7721_setup,
.mv_nr_irqs = 109,
.mv_init_irq = init_se7721_IRQ,
};
This diff is collapsed.
......@@ -83,6 +83,8 @@ static int __init cf_init_default(void)
#include <asm/se.h>
#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
#include <asm/se7722.h>
#elif defined(CONFIG_SH_7721_SOLUTION_ENGINE)
#include <asm/se7721.h>
#endif
/*
......@@ -99,7 +101,9 @@ static int __init cf_init_default(void)
* 0xB0600000 : I/O
*/
#if defined(CONFIG_SH_SOLUTION_ENGINE) || defined(CONFIG_SH_7722_SOLUTION_ENGINE)
#if defined(CONFIG_SH_SOLUTION_ENGINE) || \
defined(CONFIG_SH_7722_SOLUTION_ENGINE) || \
defined(CONFIG_SH_7721_SOLUTION_ENGINE)
static int __init cf_init_se(void)
{
if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
......@@ -112,7 +116,7 @@ static int __init cf_init_se(void)
}
/*
* PC-Card window open
* PC-Card window open
* flag == COMMON/ATTRIBUTE/IO
*/
/* common window open */
......@@ -122,7 +126,7 @@ static int __init cf_init_se(void)
ctrl_outw(0x0b00, MRSHPC_MW0CR2);
else
/* common mode & bus width 16bit SWAP = 0*/
ctrl_outw(0x0300, MRSHPC_MW0CR2);
ctrl_outw(0x0300, MRSHPC_MW0CR2);
/* attribute window open */
ctrl_outw(0x8a85, MRSHPC_MW1CR1);
......@@ -155,10 +159,9 @@ static int __init cf_init_se(void)
int __init cf_init(void)
{
if( mach_is_se() || mach_is_7722se() ){
if (mach_is_se() || mach_is_7722se() || mach_is_7721se())
return cf_init_se();
}
return cf_init_default();
}
......
......@@ -21,6 +21,7 @@ HD64465 HD64465
7206SE SH_7206_SOLUTION_ENGINE
7343SE SH_7343_SOLUTION_ENGINE
7619SE SH_7619_SOLUTION_ENGINE
7721SE SH_7721_SOLUTION_ENGINE
7722SE SH_7722_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE
7780SE SH_7780_SOLUTION_ENGINE
......
/*
* Copyright (C) 2008 Renesas Solutions Corp.
*
* Hitachi UL SolutionEngine 7721 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#ifndef __ASM_SH_SE7721_H
#define __ASM_SH_SE7721_H
#include <asm/addrspace.h>
/* Box specific addresses. */
#define SE_AREA0_WIDTH 2 /* Area0: 32bit */
#define PA_ROM 0xa0000000 /* EPROM */
#define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
#define PA_FROM 0xa1000000 /* Flash-ROM */
#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
#define PA_EXT1 0xa4000000
#define PA_EXT1_SIZE 0x04000000
#define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */
#define PA_SDRAM_SIZE 0x04000000
#define PA_EXT4 0xb0000000
#define PA_EXT4_SIZE 0x04000000
#define PA_PERIPHERAL 0xB8000000
#define PA_PCIC PA_PERIPHERAL
#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0)
#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000)
#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000)
#define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000)
#define MRSHPC_OPTION (PA_MRSHPC + 6)
#define MRSHPC_CSR (PA_MRSHPC + 8)
#define MRSHPC_ISR (PA_MRSHPC + 10)
#define MRSHPC_ICR (PA_MRSHPC + 12)
#define MRSHPC_CPWCR (PA_MRSHPC + 14)
#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
#define MRSHPC_CDCR (PA_MRSHPC + 28)
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED 0xB6800000 /* 8bit LED */
#define PA_FPGA 0xB7000000 /* FPGA base address */
#define MRSHPC_IRQ0 10
#define FPGA_ILSR1 (PA_FPGA + 0x02)
#define FPGA_ILSR2 (PA_FPGA + 0x03)
#define FPGA_ILSR3 (PA_FPGA + 0x04)
#define FPGA_ILSR4 (PA_FPGA + 0x05)
#define FPGA_ILSR5 (PA_FPGA + 0x06)
#define FPGA_ILSR6 (PA_FPGA + 0x07)
#define FPGA_ILSR7 (PA_FPGA + 0x08)
#define FPGA_ILSR8 (PA_FPGA + 0x09)
void init_se7721_IRQ(void);
#define __IO_PREFIX se7721
#include <asm/io_generic.h>
#endif /* __ASM_SH_SE7721_H */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment