Commit 77c8d0d6 authored by Vineet Gupta's avatar Vineet Gupta

ARC: clockevent: DT based probe

 - timer frequency is derived from DT (no longer rely on top level
   DT "clock-frequency" probed early and exported by asm/clk.h)

 - TIMER0_IRQ need not be exported across arch code, confined to intc as
   it is property of same

 - Any failures in clockevent setup are considered pedantic and system
   panic()'s as there is no generic fallback (unlike clocksource where
   a jiffies based soft clocksource always exists)
Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 7ec9f34a
......@@ -12,15 +12,6 @@
#define NR_CPU_IRQS 32 /* number of interrupt lines of ARC770 CPU */
#define NR_IRQS 128 /* allow some CPU external IRQ handling */
/* Platform Independent IRQs */
#ifdef CONFIG_ISA_ARCOMPACT
#define TIMER0_IRQ 3
#define TIMER1_IRQ 4
#else
#define TIMER0_IRQ 16
#define TIMER1_IRQ 17
#endif
#include <linux/interrupt.h>
#include <asm-generic/irq.h>
......
......@@ -14,6 +14,8 @@
#include <linux/irqchip.h>
#include <asm/irq.h>
#define TIMER0_IRQ 3 /* Fixed by ISA */
/*
* Early Hardware specific Interrupt setup
* -Platform independent, needed for each CPU (not foldable into init_IRQ)
......
......@@ -30,19 +30,15 @@
*/
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/cpu.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <asm/irq.h>
#include <asm/arcregs.h>
#include <asm/clk.h>
#include <asm/mach_desc.h>
#include <asm/mcip.h>
......@@ -59,6 +55,30 @@
#define ARC_TIMER_MAX 0xFFFFFFFF
static unsigned long arc_timer_freq;
static int noinline arc_get_timer_clk(struct device_node *node)
{
struct clk *clk;
int ret;
clk = of_clk_get(node, 0);
if (IS_ERR(clk)) {
pr_err("timer missing clk");
return PTR_ERR(clk);
}
ret = clk_prepare_enable(clk);
if (ret) {
pr_err("Couldn't enable parent clk\n");
return ret;
}
arc_timer_freq = clk_get_rate(clk);
return 0;
}
/********** Clock Source Device *********/
#ifdef CONFIG_ARC_HAS_GFRC
......@@ -182,7 +202,7 @@ static struct clocksource arc_counter = {
/********** Clock Event Device *********/
static int arc_timer_irq = TIMER0_IRQ;
static int arc_timer_irq;
/*
* Arm the timer to interrupt after @cycles
......@@ -210,7 +230,7 @@ static int arc_clkevent_set_periodic(struct clock_event_device *dev)
* At X Hz, 1 sec = 1000ms -> X cycles;
* 10ms -> X / 100 cycles
*/
arc_timer_event_setup(arc_get_core_freq() / HZ);
arc_timer_event_setup(arc_timer_freq / HZ);
return 0;
}
......@@ -253,7 +273,7 @@ static int arc_timer_cpu_notify(struct notifier_block *self,
switch (action & ~CPU_TASKS_FROZEN) {
case CPU_STARTING:
clockevents_config_and_register(evt, arc_get_core_freq(),
clockevents_config_and_register(evt, arc_timer_freq,
0, ULONG_MAX);
enable_percpu_irq(arc_timer_irq, 0);
break;
......@@ -272,25 +292,35 @@ static struct notifier_block arc_timer_cpu_nb = {
/*
* clockevent setup for boot CPU
*/
static void __init arc_clockevent_setup(void)
static void __init arc_clockevent_setup(struct device_node *node)
{
struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
int ret;
register_cpu_notifier(&arc_timer_cpu_nb);
arc_timer_irq = irq_of_parse_and_map(node, 0);
if (arc_timer_irq <= 0)
panic("clockevent: missing irq");
ret = arc_get_timer_clk(node);
if (ret)
panic("clockevent: missing clk");
evt->irq = arc_timer_irq;
evt->cpumask = cpumask_of(smp_processor_id());
clockevents_config_and_register(evt, arc_get_core_freq(),
clockevents_config_and_register(evt, arc_timer_freq,
0, ARC_TIMER_MAX);
/* Needs apriori irq_set_percpu_devid() done in intc map function */
ret = request_percpu_irq(arc_timer_irq, timer_irq_handler,
"Timer0 (per-cpu-tick)", evt);
if (ret)
pr_err("Unable to register interrupt\n");
panic("clockevent: unable to request irq\n");
enable_percpu_irq(arc_timer_irq, 0);
}
CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_clockevent_setup);
/*
* Called from start_kernel() - boot CPU only
......@@ -299,7 +329,6 @@ static void __init arc_clockevent_setup(void)
* -Also sets up any global state needed for timer subsystem:
* - for "counting" timer, registers a clocksource, usable across CPUs
* (provided that underlying counter h/w is synchronized across cores)
* - for "event" timer, sets up TIMER0 IRQ (as that is platform agnostic)
*/
void __init time_init(void)
{
......@@ -315,7 +344,5 @@ void __init time_init(void)
* CLK upto 4.29 GHz can be safely represented in 32 bits
* because Max 32 bit number is 4,294,967,295
*/
clocksource_register_hz(&arc_counter, arc_get_core_freq());
arc_clockevent_setup();
clocksource_register_hz(&arc_counter, arc_timer_freq);
}
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