Commit 81e41fec authored by Anson Huang's avatar Anson Huang Committed by Rob Herring

dt-bindings: watchdog: Convert i.MX to json-schema

Convert the i.MX watchdog binding to DT schema format using json-schema.
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 2c504460
* Freescale i.MX Watchdog Timer (WDT) Controller
Required properties:
- compatible : Should be "fsl,<soc>-wdt"
- reg : Should contain WDT registers location and length
- interrupts : Should contain WDT interrupt
Optional properties:
- big-endian: If present the watchdog device's registers are implemented
in big endian mode, otherwise in native mode(same with CPU), for more
detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
- fsl,ext-reset-output: If present the watchdog device is configured to
assert its external reset (WDOG_B) instead of issuing a software reset.
- timeout-sec : Contains the watchdog timeout in seconds
Examples:
wdt@73f98000 {
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f98000 0x4000>;
interrupts = <58>;
big-endian;
timeout-sec = <20>;
};
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX Watchdog Timer (WDT) Controller
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
allOf:
- $ref: "watchdog.yaml#"
properties:
compatible:
enum:
- fsl,imx21-wdt
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
fsl,ext-reset-output:
$ref: /schemas/types.yaml#/definitions/flag
description: |
If present, the watchdog device is configured to assert its
external reset (WDOG_B) instead of issuing a software reset.
required:
- compatible
- interrupts
- reg
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
watchdog@20bc000 {
compatible = "fsl,imx21-wdt";
reg = <0x020bc000 0x4000>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_IPG>;
};
...
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