Commit 877c1a5f authored by Tuan Phan's avatar Tuan Phan Committed by Bjorn Helgaas

PCI/ACPI: Add Ampere Altra SOC MCFG quirk

Ampere Altra SOC supports only 32-bit ECAM reads.  Add an MCFG quirk for
the platform.

Link: https://lore.kernel.org/r/1596751055-12316-1-git-send-email-tuanphan@os.amperecomputing.comSigned-off-by: default avatarTuan Phan <tuanphan@os.amperecomputing.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 2ce02a86
...@@ -142,6 +142,26 @@ static struct mcfg_fixup mcfg_quirks[] = { ...@@ -142,6 +142,26 @@ static struct mcfg_fixup mcfg_quirks[] = {
XGENE_V2_ECAM_MCFG(4, 0), XGENE_V2_ECAM_MCFG(4, 0),
XGENE_V2_ECAM_MCFG(4, 1), XGENE_V2_ECAM_MCFG(4, 1),
XGENE_V2_ECAM_MCFG(4, 2), XGENE_V2_ECAM_MCFG(4, 2),
#define ALTRA_ECAM_QUIRK(rev, seg) \
{ "Ampere", "Altra ", rev, seg, MCFG_BUS_ANY, &pci_32b_read_ops }
ALTRA_ECAM_QUIRK(1, 0),
ALTRA_ECAM_QUIRK(1, 1),
ALTRA_ECAM_QUIRK(1, 2),
ALTRA_ECAM_QUIRK(1, 3),
ALTRA_ECAM_QUIRK(1, 4),
ALTRA_ECAM_QUIRK(1, 5),
ALTRA_ECAM_QUIRK(1, 6),
ALTRA_ECAM_QUIRK(1, 7),
ALTRA_ECAM_QUIRK(1, 8),
ALTRA_ECAM_QUIRK(1, 9),
ALTRA_ECAM_QUIRK(1, 10),
ALTRA_ECAM_QUIRK(1, 11),
ALTRA_ECAM_QUIRK(1, 12),
ALTRA_ECAM_QUIRK(1, 13),
ALTRA_ECAM_QUIRK(1, 14),
ALTRA_ECAM_QUIRK(1, 15),
}; };
static char mcfg_oem_id[ACPI_OEM_ID_SIZE]; static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
......
...@@ -168,4 +168,14 @@ const struct pci_ecam_ops pci_32b_ops = { ...@@ -168,4 +168,14 @@ const struct pci_ecam_ops pci_32b_ops = {
.write = pci_generic_config_write32, .write = pci_generic_config_write32,
} }
}; };
/* ECAM ops for 32-bit read only (non-compliant) */
const struct pci_ecam_ops pci_32b_read_ops = {
.bus_shift = 20,
.pci_ops = {
.map_bus = pci_ecam_map_bus,
.read = pci_generic_config_read32,
.write = pci_generic_config_write,
}
};
#endif #endif
...@@ -51,6 +51,7 @@ extern const struct pci_ecam_ops pci_generic_ecam_ops; ...@@ -51,6 +51,7 @@ extern const struct pci_ecam_ops pci_generic_ecam_ops;
#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */ extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */
extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */ extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */
extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */ extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */
extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment