[ARM] Add L1_CACHE_SHIFT to asm-arm/cache.h

In addition, remove some unnecessary definitions from cache.h

include/asm-arm/cache.h

@@ -4,18 +4,12 @@
 #ifndef __ASMARM_CACHE_H
 #define __ASMARM_CACHE_H
 
-#define        L1_CACHE_BYTES  32
-#define        L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
-#define        SMP_CACHE_BYTES L1_CACHE_BYTES
+#define L1_CACHE_SHIFT		5
+#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
-#ifdef MODULE
-#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES)))
-#else
-#define __cacheline_aligned					\
-  __attribute__((__aligned__(L1_CACHE_BYTES),			\
-		 __section__(".data.cacheline_aligned")))
-#endif
-
-#define L1_CACHE_SHIFT_MAX 5	/* largest L1 which this arch supports */
+/*
+ * largest L1 which this arch supports
+ */
+#define L1_CACHE_SHIFT_MAX	5
 
 #endif