Commit 8adf5d21 authored by Jane Jian's avatar Jane Jian Committed by Alex Deucher

drm/amdgpu: disable VCN2.5 ib test for Arcturus sriov

currently using TMR loading VCN fw MMSCH would fail
to init after FLR, just disable ib test for temporarily
daily testing, continuing debug with mm team.
Signed-off-by: default avatarJane Jian <Jane.Jian@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0a96afc7
......@@ -491,9 +491,14 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
{
struct amdgpu_device *adev = ring->adev;
struct dma_fence *fence;
long r;
/* temporarily disable ib test for sriov */
if (amdgpu_sriov_vf(adev))
return 0;
r = amdgpu_vcn_dec_get_create_msg(ring, 1, NULL);
if (r)
goto error;
......@@ -649,10 +654,15 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
{
struct amdgpu_device *adev = ring->adev;
struct dma_fence *fence = NULL;
struct amdgpu_bo *bo = NULL;
long r;
/* temporarily disable ib test for sriov */
if (amdgpu_sriov_vf(adev))
return 0;
r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM,
&bo, NULL, NULL);
......
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