Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into ppc970.osdl.org:/home/torvalds/v2.6/linux

arch/arm/boot/compressed/head-clps7500.S

@@ -34,7 +34,7 @@
 		mov	r0, #0x30
 		mcr	p15, 0, r0, c1, c0, 0
 		mov	r0, #0x13
-		msr	cpsr, r0
+		msr	cpsr_cxsf, r0
 		mov	r12, #0x03000000	@ point to LEDs
 		orr	r12, r12, #0x00020000
 		orr	r12, r12, #0xba00
@@ -71,7 +71,7 @@
 		/* Ensure all interrupts are off and MMU disabled */
 		mrs	r0, cpsr
 		orr	r0, r0, #0xc0
-		msr	cpsr, r0
+		msr	cpsr_cxsf, r0
 
 		adr	lr, 1b
 		orr	lr, lr, #0x10000000

arch/arm/kernel/entry-armv.S

@@ -952,7 +952,7 @@ __dabt_svc:	sub	sp, sp, #S_FRAME_SIZE
 		bl	do_DataAbort
 		disable_irq r0
 		ldr	r0, [sp, #S_PSR]
-		msr	spsr, r0
+		msr	spsr_cxsf, r0
 		ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
 
 		.align	5
@@ -988,7 +988,7 @@ preempt_return:
 		strne	r0, [r0, -r0]			@ bug()
 #endif
 		ldr	r0, [sp, #S_PSR]		@ irqs are already disabled
-		msr	spsr, r0
+		msr	spsr_cxsf, r0
 		ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
 
 		.ltorg
@@ -1031,7 +1031,7 @@ __und_svc:	sub	sp, sp, #S_FRAME_SIZE
 
 1:		disable_irq r0
 		ldr	lr, [sp, #S_PSR]		@ Get SVC cpsr
-		msr	spsr, lr
+		msr	spsr_cxsf, lr
 		ldmia	sp, {r0 - pc}^			@ Restore SVC registers
 
 		.align	5
@@ -1052,7 +1052,7 @@ __pabt_svc:	sub	sp, sp, #S_FRAME_SIZE
 		bl	do_PrefetchAbort		@ call abort handler
 		disable_irq r0
 		ldr	r0, [sp, #S_PSR]
-		msr	spsr, r0
+		msr	spsr_cxsf, r0
 		ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
 
 		.align	5
@@ -1303,7 +1303,7 @@ vector_IRQ:	@
 		mrs	r13, cpsr
 		bic	r13, r13, #MODE_MASK
 		orr	r13, r13, #MODE_SVC
-		msr	spsr, r13			@ switch to SVC_32 mode
+		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
 
 		and	lr, lr, #15
 		ldr	lr, [pc, lr, lsl #2]
@@ -1346,7 +1346,7 @@ vector_data:	@
 		mrs	r13, cpsr
 		bic	r13, r13, #MODE_MASK
 		orr	r13, r13, #MODE_SVC
-		msr	spsr, r13			@ switch to SVC_32 mode
+		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
 
 		and	lr, lr, #15
 		ldr	lr, [pc, lr, lsl #2]
@@ -1390,7 +1390,7 @@ vector_prefetch:
 		mrs	r13, cpsr
 		bic	r13, r13, #MODE_MASK
 		orr	r13, r13, #MODE_SVC
-		msr	spsr, r13			@ switch to SVC_32 mode
+		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
 
 		ands	lr, lr, #15
 		ldr	lr, [pc, lr, lsl #2]
@@ -1433,7 +1433,7 @@ vector_undefinstr:
 		mrs	r13, cpsr
 		bic	r13, r13, #MODE_MASK
 		orr	r13, r13, #MODE_SVC
-		msr	spsr, r13			@ switch to SVC_32 mode
+		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
 
 		and	lr, lr, #15
 		ldr	lr, [pc, lr, lsl #2]

arch/arm/kernel/entry-common.S

@@ -102,7 +102,7 @@ ENTRY(ret_from_fork)
 	ldr	r0, [sp, #S_PSR]		@ Get calling cpsr
 	sub	lr, lr, #4
 	str	lr, [r8]
-	msr	spsr, r0
+	msr	spsr_cxsf, r0
 	ldmia	sp, {r0 - lr}^			@ Get calling r0 - lr
 	mov	r0, r0
 	ldr	lr, [sp, #S_PC]			@ Get PC

arch/arm/kernel/entry-header.S

@@ -99,7 +99,7 @@
 	ldr	r1, [sp, #S_PSR]		@ Get calling cpsr
 	disable_irq ip				@ disable IRQs
 	ldr	lr, [sp, #S_PC]!		@ Get PC
-	msr	spsr, r1			@ save in spsr_svc
+	msr	spsr_cxsf, r1			@ save in spsr_svc
 	ldmdb	sp, {r0 - lr}^			@ Get calling r0 - lr
 	mov	r0, r0
 	add	sp, sp, #S_FRAME_SIZE - S_PC
@@ -112,7 +112,7 @@
 	.macro	fast_restore_user_regs
 	ldr	r1, [sp, #S_OFF + S_PSR]	@ get calling cpsr
 	ldr	lr, [sp, #S_OFF + S_PC]!	@ get pc
-	msr	spsr, r1			@ save in spsr_svc
+	msr	spsr_cxsf, r1			@ save in spsr_svc
 	ldmdb	sp, {r1 - lr}^			@ get calling r1 - lr
 	mov	r0, r0
 	add	sp, sp, #S_FRAME_SIZE - S_PC
@@ -125,7 +125,7 @@
 	.macro	slow_restore_user_regs
 	ldr	r1, [sp, #S_PSR]		@ get calling cpsr
 	ldr	lr, [sp, #S_PC]!		@ get pc
-	msr	spsr, r1			@ save in spsr_svc
+	msr	spsr_cxsf, r1			@ save in spsr_svc
 	ldmdb	sp, {r0 - lr}^			@ get calling r1 - lr
 	mov	r0, r0
 	add	sp, sp, #S_FRAME_SIZE - S_PC

arch/arm/lib/ecard.S

@@ -16,7 +16,7 @@
 
 #define CPSR2SPSR(rt) \
 		mrs	rt, cpsr; \
-		msr	spsr, rt
+		msr	spsr_cxsf, rt
 
 @ Purpose: call an expansion card loader to read bytes.
 @ Proto  : char read_loader(int offset, char *card_base, char *loader);

arch/arm/mach-s3c2410/Makefile

@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y			:= s3c2410.o irq.o time.o
+obj-y			:= s3c2410.o irq.o time.o gpio.o
 obj-m			:=
 obj-n			:=
 obj-			:=

arch/arm/mach-s3c2410/gpio.c

+/* linux/arch/arm/mach-s3c2410/gpio.c
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 GPIO support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/arch/regs-gpio.h>
+
+void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
+{
+	unsigned long base = S3C2410_GPIO_BASE(pin);
+	unsigned long shift = 1;
+	unsigned long mask = 3;
+	unsigned long con;
+	unsigned long flags;
+
+	if (pin < S3C2410_GPIO_BANKB) {
+		shift = 0;
+		mask  = 1;
+	}
+
+	mask <<= S3C2410_GPIO_OFFSET(pin);
+
+	local_irq_save(flags);
+
+	con = __raw_readl(base + 0x00);
+
+	con &= mask << shift;
+	con |= function;
+
+	__raw_writel(con, base + 0x00);
+
+	local_irq_restore(flags);
+}
+
+void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
+{
+	unsigned long base = S3C2410_GPIO_BASE(pin);
+	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
+	unsigned long flags;
+	unsigned long up;
+
+	if (pin < S3C2410_GPIO_BANKB)
+		return;
+
+	local_irq_save(flags);
+
+	up = __raw_readl(base + 0x08);
+	up &= 1 << offs;
+	up |= to << offs;
+	__raw_writel(up, base + 0x08);
+
+	local_irq_restore(flags);
+}
+
+void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
+{
+	unsigned long base = S3C2410_GPIO_BASE(pin);
+	unsigned long offs = S3C2410_GPIO_OFFSET(pin);
+	unsigned long flags;
+	unsigned long dat;
+
+	local_irq_save(flags);
+
+	dat = __raw_readl(base + 0x04);
+	dat &= 1 << offs;
+	dat |= to << offs;
+	__raw_writel(dat, base + 0x04);
+
+	local_irq_restore(flags);
+}

arch/arm/mach-s3c2410/mach-h1940.c

@@ -52,7 +52,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
 	[0] = {
 		.hwport	     = 0,
 		.flags	     = 0,
-		.clock	     = &s3c2410_hclk,
+		.clock	     = &s3c2410_pclk,
 		.ucon	     = 0x3c5,
 		.ulcon	     = 0x03,
 		.ufcon	     = 0x51,
@@ -60,7 +60,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
 	[1] = {
 		.hwport	     = 1,
 		.flags	     = 0,
-		.clock	     = &s3c2410_hclk,
+		.clock	     = &s3c2410_pclk,
 		.ucon	     = 0x245,
 		.ulcon	     = 0x03,
 		.ufcon	     = 0x00,
@@ -69,7 +69,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
 	[2] = {
 		.hwport	     = 2,
 		.flags	     = 0,
-		.clock	     = &s3c2410_hclk,
+		.clock	     = &s3c2410_pclk,
 		.ucon	     = 0x3c5,
 		.ulcon	     = 0x43,
 		.ufcon	     = 0x51,

arch/arm/mach-s3c2410/s3c2410.h

@@ -4,5 +4,5 @@ extern void s3c2410_map_io(struct map_desc *, int count);
 
 extern void s3c2410_init_irq(void);
 
-extern s3c2410_init_time(void);
+extern void s3c2410_init_time(void);
 

arch/arm/mach-sa1100/collie.c

@@ -141,4 +141,5 @@ MACHINE_START(COLLIE, "Sharp-Collie")
 	MAPIO(collie_map_io)
 	INITIRQ(sa1100_init_irq)
 	INIT_MACHINE(collie_init)
+	INITTIME(sa1100_init_time)
 MACHINE_END

arch/arm/mm/blockops.c

@@ -130,6 +130,7 @@ static struct undef_hook blockops_hook __initdata = {
 static int __init blockops_check(void)
 {
 	register unsigned int err asm("r4") = 0;
+	unsigned int err_pos = 1;
 	unsigned int cache_type;
 	int i;
 
@@ -156,8 +157,8 @@ static int __init blockops_check(void)
 
 	unregister_undef_hook(&blockops_hook);
 
-	for (i = 0; i < ARRAY_SIZE(func); i++, err >>= 1)
-		printk("%30s: %ssupported\n", func[i], err & 1 ? "not " : "");
+	for (i = 0; i < ARRAY_SIZE(func); i++, err_pos <<= 1)
+		printk("%30s: %ssupported\n", func[i], err & err_pos ? "not " : "");
 
 	if ((err & 8) == 0) {
 		printk(" --> Using %s block cache invalidate\n",

include/asm-arm/arch-s3c2410/hardware.h

@@ -26,6 +26,41 @@ extern unsigned long s3c2410_pclk;
 extern unsigned long s3c2410_hclk;
 extern unsigned long s3c2410_fclk;
 
+/* external functions for GPIO support
+ *
+ * These allow various different clients to access the same GPIO
+ * registers without conflicting. If your driver only owns the entire
+ * GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
+*/
+
+/* s3c2410_gpio_cfgpin
+ *
+ * set the configuration of the given pin to the value passed.
+ *
+ * eg:
+ *    s3c2410_gpio_cfgpin(S3C2410_GPA0, S3C2410_GPA0_ADDR0);
+ *    s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
+*/
+
+extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
+
+/* s3c2410_gpio_pullup
+ *
+ * configure the pull-up control on the given pin
+ *
+ * to = 1 => disable the pull-up
+ *      0 => enable the pull-up
+ *
+ * eg;
+ *
+ *   s3c2410_gpio_pullup(S3C2410_GPB0, 0);
+ *   s3c2410_gpio_pullup(S3C2410_GPE8, 0);
+*/
+
+extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
+
+extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
+
 #endif /* __ASSEMBLY__ */
 
 #include <asm/sizes.h>