Commit 8c745f74 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://bk.arm.linux.org.uk

into penguin.transmeta.com:/home/penguin/torvalds/repositories/kernel/linux
parents 94394e5b 31d714f2
......@@ -117,6 +117,12 @@ options=N1,N2,N3,...
will force full-duplex 100base-TX, rather than allowing the usual
autonegotiation.
global_options=N
Sets the `options' parameter for all 3c59x NICs in the machine.
Entries in the `options' array above will override any setting of
this.
full_duplex=N1,N2,N3...
Similar to bit 9 of 'options'. Forces the corresponding card into
......@@ -126,6 +132,11 @@ full_duplex=N1,N2,N3...
In fact, please don't use this at all! You're better off getting
autonegotiation working properly.
global_full_duplex=N1
Sets full duplex mode for all 3c59x NICs in the machine. Entries
in the `full_duplex' array above will override any setting of this.
flow_ctrl=N1,N2,N3...
Use 802.3x MAC-layer flow control. The 3com cards only support the
......@@ -211,6 +222,12 @@ enable_wol=N1,N2,N3,...
Becker's `ether-wake' application may be used to wake suspended
machines.
Also enables the NIC's power management support.
global_enable_wol=N
Sets enable_wol mode for all 3c59x NICs in the machine. Entries in
the `enable_wol' array above will override any setting of this.
Media selection
---------------
......
......@@ -19,6 +19,8 @@
#include <asm/system.h>
#include <asm/pci.h>
#include <asm/hwrpb.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#define __EXTERN_INLINE inline
#include <asm/io.h>
......
......@@ -26,6 +26,7 @@
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/core_cia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -28,6 +28,7 @@
#include <asm/core_apecs.h>
#include <asm/core_cia.h>
#include <asm/core_lca.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -30,6 +30,7 @@
#include <asm/pgtable.h>
#include <asm/core_tsunami.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -27,6 +27,7 @@
#include <asm/core_apecs.h>
#include <asm/core_lca.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -27,6 +27,7 @@
#include <asm/pgtable.h>
#include <asm/core_tsunami.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -26,6 +26,7 @@
#include <asm/irq.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -24,6 +24,7 @@
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_cia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -26,6 +26,7 @@
#include <asm/pgtable.h>
#include <asm/core_apecs.h>
#include <asm/core_cia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -43,6 +43,7 @@
#include <asm/pgtable.h>
#include <asm/core_irongate.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -27,6 +27,7 @@
#include <asm/pgtable.h>
#include <asm/core_apecs.h>
#include <asm/core_cia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -23,6 +23,7 @@
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_mcpcia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -24,6 +24,7 @@
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_cia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -24,6 +24,7 @@
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_polaris.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -24,6 +24,7 @@
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_t2.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -29,6 +29,7 @@
#include <asm/pgtable.h>
#include <asm/core_apecs.h>
#include <asm/core_lca.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -25,6 +25,7 @@
#include <asm/pgtable.h>
#include <asm/core_cia.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -23,6 +23,7 @@
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_cia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -28,6 +28,7 @@
#include <asm/pgtable.h>
#include <asm/core_titan.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -23,6 +23,7 @@
#include <asm/pgtable.h>
#include <asm/core_wildfire.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
......
......@@ -12,7 +12,7 @@
#define __EXTERN_INLINE inline
#include <asm/mmu_context.h>
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
#undef __EXTERN_INLINE
#include <linux/signal.h>
......
......@@ -1313,7 +1313,7 @@ e100_hardware_send_packet(char *buf, int length)
static void
e100_clear_network_leds(unsigned long dummy)
{
if (led_active && jiffies > time_after(jiffies, led_next_time)) {
if (led_active && time_after(jiffies, led_next_time)) {
e100_set_network_leds(NO_NETWORK_ACTIVITY);
/* Set the earliest time we may set the LED */
......
......@@ -43,6 +43,7 @@
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/io_apic.h>
#include <asm/tlbflush.h>
#define PREFIX "ACPI: "
......
......@@ -12,10 +12,12 @@
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/highmem.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
#include <asm/io.h>
#include <asm/tlbflush.h>
/*
* Known problems:
......
......@@ -37,6 +37,7 @@
#include <asm/e820.h>
#include <asm/apic.h>
#include <asm/tlb.h>
#include <asm/tlbflush.h>
mmu_gather_t mmu_gathers[NR_CPUS];
unsigned long highstart_pfn, highend_pfn;
......@@ -573,7 +574,8 @@ void si_meminfo(struct sysinfo *val)
}
#if defined(CONFIG_X86_PAE)
struct kmem_cache_s *pae_pgd_cachep;
static struct kmem_cache_s *pae_pgd_cachep;
void __init pgtable_cache_init(void)
{
/*
......@@ -584,4 +586,96 @@ void __init pgtable_cache_init(void)
if (!pae_pgd_cachep)
panic("init_pae(): Cannot alloc pae_pgd SLAB cache");
}
pgd_t *pgd_alloc(struct mm_struct *mm)
{
int i;
pgd_t *pgd = kmem_cache_alloc(pae_pgd_cachep, GFP_KERNEL);
if (pgd) {
for (i = 0; i < USER_PTRS_PER_PGD; i++) {
unsigned long pmd = __get_free_page(GFP_KERNEL);
if (!pmd)
goto out_oom;
clear_page(pmd);
set_pgd(pgd + i, __pgd(1 + __pa(pmd)));
}
memcpy(pgd + USER_PTRS_PER_PGD,
swapper_pg_dir + USER_PTRS_PER_PGD,
(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
}
return pgd;
out_oom:
for (i--; i >= 0; i--)
free_page((unsigned long)__va(pgd_val(pgd[i])-1));
kmem_cache_free(pae_pgd_cachep, pgd);
return NULL;
}
void pgd_free(pgd_t *pgd)
{
int i;
for (i = 0; i < USER_PTRS_PER_PGD; i++)
free_page((unsigned long)__va(pgd_val(pgd[i])-1));
kmem_cache_free(pae_pgd_cachep, pgd);
}
#else
pgd_t *pgd_alloc(struct mm_struct *mm)
{
pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL);
if (pgd) {
memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
memcpy(pgd + USER_PTRS_PER_PGD,
swapper_pg_dir + USER_PTRS_PER_PGD,
(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
}
return pgd;
}
void pgd_free(pgd_t *pgd)
{
free_page((unsigned long)pgd);
}
#endif /* CONFIG_X86_PAE */
pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
{
int count = 0;
pte_t *pte;
do {
pte = (pte_t *) __get_free_page(GFP_KERNEL);
if (pte)
clear_page(pte);
else {
current->state = TASK_UNINTERRUPTIBLE;
schedule_timeout(HZ);
}
} while (!pte && (count++ < 10));
return pte;
}
struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
{
int count = 0;
struct page *pte;
do {
#if CONFIG_HIGHPTE
pte = alloc_pages(GFP_KERNEL | __GFP_HIGHMEM, 0);
#else
pte = alloc_pages(GFP_KERNEL, 0);
#endif
if (pte)
clear_highpage(pte);
else {
current->state = TASK_UNINTERRUPTIBLE;
schedule_timeout(HZ);
}
} while (!pte && (count++ < 10));
return pte;
}
......@@ -12,6 +12,9 @@
#include <asm/io.h>
#include <asm/pgalloc.h>
#include <asm/fixmap.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
static inline void remap_area_pte(pte_t * pte, unsigned long address, unsigned long size,
unsigned long phys_addr, unsigned long flags)
......
......@@ -166,7 +166,15 @@
- Rename wait_for_completion() to issue_and_wait() to avoid completion.h
clash.
- See http://www.uow.edu.au/~andrewm/linux/#3c59x-2.3 for more details.
LK1.1.17 18Dec01 akpm
- PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
And it has NWAY.
- Mask our advertised modes (vp->advertising) with our capabilities
(MII reg5) when deciding which duplex mode to use.
- Add `global_options' as default for options[]. Ditto global_enable_wol,
global_full_duplex.
- See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
- Also see Documentation/networking/vortex.txt
*/
......@@ -181,8 +189,8 @@
#define DRV_NAME "3c59x"
#define DRV_VERSION "LK1.1.16"
#define DRV_RELDATE "19 July 2001"
#define DRV_VERSION "LK1.1.17"
#define DRV_RELDATE "18 Dec 2001"
......@@ -270,10 +278,13 @@ MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
MODULE_LICENSE("GPL");
MODULE_PARM(debug, "i");
MODULE_PARM(global_options, "i");
MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(global_full_duplex, "i");
MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(hw_checksums, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(flow_ctrl, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(global_enable_wol, "i");
MODULE_PARM(enable_wol, "1-" __MODULE_STRING(8) "i");
MODULE_PARM(rx_copybreak, "i");
MODULE_PARM(max_interrupt_work, "i");
......@@ -283,10 +294,13 @@ MODULE_PARM(compaq_device_id, "i");
MODULE_PARM(watchdog, "i");
MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if options is unset");
MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if options is unset");
MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
......@@ -473,7 +487,7 @@ static struct vortex_chip_info {
{"3c900 Boomerang 10Mbps Combo",
PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, },
{"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
{"3c900 Cyclone 10Mbps Combo",
PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
......@@ -496,8 +510,8 @@ static struct vortex_chip_info {
PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
{"3c980 Cyclone",
PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
{"3c982 Dual Port Server Cyclone",
PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
{"3c980C Python-T",
PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
{"3cSOHO100-TX Hurricane",
PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
......@@ -853,6 +867,9 @@ static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
static int hw_checksums[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
static int flow_ctrl[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
static int enable_wol[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
static int global_options = -1;
static int global_full_duplex = -1;
static int global_enable_wol = -1;
/* #define dev_alloc_skb dev_alloc_skb_debug */
......@@ -995,6 +1012,8 @@ static int __devinit vortex_probe1(struct pci_dev *pdev,
SET_MODULE_OWNER(dev);
vp = dev->priv;
option = global_options;
/* The lower four bits are the media type. */
if (dev->mem_start) {
/*
......@@ -1003,10 +1022,10 @@ static int __devinit vortex_probe1(struct pci_dev *pdev,
*/
option = dev->mem_start;
}
else if (card_idx < MAX_UNITS)
option = options[card_idx];
else
option = -1;
else if (card_idx < MAX_UNITS) {
if (options[card_idx] >= 0)
option = options[card_idx];
}
if (option > 0) {
if (option & 0x8000)
......@@ -1099,6 +1118,11 @@ static int __devinit vortex_probe1(struct pci_dev *pdev,
vp->bus_master = (option & 16) ? 1 : 0;
}
if (global_full_duplex > 0)
vp->full_duplex = 1;
if (global_enable_wol > 0)
vp->enable_wol = 1;
if (card_idx < MAX_UNITS) {
if (full_duplex[card_idx] > 0)
vp->full_duplex = 1;
......@@ -1244,11 +1268,12 @@ static int __devinit vortex_probe1(struct pci_dev *pdev,
} else
dev->if_port = vp->default_media;
if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
if ((vp->available_media & 0x4b) || (vci->drv_flags & HAS_NWAY) ||
dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
int phy, phy_idx = 0;
EL3WINDOW(4);
mii_preamble_required++;
mii_preamble_required++;
mdio_sync(ioaddr, 32);
mdio_read(dev, 24, 1);
for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
int mii_status, phyx;
......@@ -1264,6 +1289,8 @@ static int __devinit vortex_probe1(struct pci_dev *pdev,
else
phyx = phy;
mii_status = mdio_read(dev, phyx, 1);
printk("phy=%d, phyx=%d, mii_status=0x%04x\n",
phy, phyx, mii_status);
if (mii_status && mii_status != 0xffff) {
vp->phys[phy_idx++] = phyx;
if (print_info) {
......@@ -1444,11 +1471,14 @@ vortex_up(struct net_device *dev)
/* Read BMSR (reg1) only to clear old status. */
mii_reg1 = mdio_read(dev, vp->phys[0], 1);
mii_reg5 = mdio_read(dev, vp->phys[0], 5);
if (mii_reg5 == 0xffff || mii_reg5 == 0x0000)
if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
; /* No MII device or no link partner report */
else if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
} else {
mii_reg5 &= vp->advertising;
if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
|| (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
vp->full_duplex = 1;
}
vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
if (vortex_debug > 1)
printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
......@@ -1669,8 +1699,10 @@ vortex_timer(unsigned long data)
if (mii_status & 0x0004) {
int mii_reg5 = mdio_read(dev, vp->phys[0], 5);
if (! vp->force_fd && mii_reg5 != 0xffff) {
int duplex = (mii_reg5&0x0100) ||
(mii_reg5 & 0x01C0) == 0x0040;
int duplex;
mii_reg5 &= vp->advertising;
duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
if (vp->full_duplex != duplex) {
vp->full_duplex = duplex;
printk(KERN_INFO "%s: Setting %s-duplex based on MII "
......@@ -1753,9 +1785,11 @@ static void vortex_tx_timeout(struct net_device *dev)
dev->name, inb(ioaddr + TxStatus),
inw(ioaddr + EL3_STATUS));
EL3WINDOW(4);
printk(KERN_ERR " diagnostics: net %04x media %04x dma %8.8x.\n",
inw(ioaddr + Wn4_NetDiag), inw(ioaddr + Wn4_Media),
inl(ioaddr + PktStatus));
printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
inw(ioaddr + Wn4_NetDiag),
inw(ioaddr + Wn4_Media),
inl(ioaddr + PktStatus),
inw(ioaddr + Wn4_FIFODiag));
/* Slight code bloat to be user friendly. */
if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
......@@ -2538,7 +2572,6 @@ vortex_close(struct net_device *dev)
((vp->drv_flags & HAS_HWCKSM) == 0) &&
(hw_checksums[vp->card_idx] == -1)) {
printk(KERN_WARNING "%s supports hardware checksums, and we're not using them!\n", dev->name);
printk(KERN_WARNING "Please see http://www.uow.edu.au/~andrewm/zerocopy.html\n");
}
#endif
......
......@@ -630,3 +630,4 @@ void lance_set_multicast (struct net_device *dev)
netif_start_queue (dev);
}
MODULE_LICENSE("GPL");
......@@ -51,7 +51,6 @@
#include <linux/crc32.h>
#include <asm/bitops.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <linux/errno.h>
......@@ -496,15 +495,15 @@ static int lance_open (struct net_device *dev)
last_dev = dev;
/* Stop the Lance */
ll->rap = LE_CSR0;
ll->rdp = LE_C0_STOP;
/* Install the Interrupt handler */
ret = request_irq(IRQ_AMIGA_PORTS, lance_interrupt, SA_SHIRQ,
dev->name, dev);
if (ret) return ret;
/* Stop the Lance */
ll->rap = LE_CSR0;
ll->rdp = LE_C0_STOP;
load_csrs (lp);
lance_init_ring (dev);
......
......@@ -83,6 +83,7 @@ void cleanup_module(void)
arcnet_unregister_proto(&rawmode_proto);
}
MODULE_LICENSE("GPL");
#endif /* MODULE */
......
......@@ -295,6 +295,7 @@ MODULE_PARM(node, "i");
MODULE_PARM(io, "i");
MODULE_PARM(irq, "i");
MODULE_PARM(device, "s");
MODULE_LICENSE("GPL");
int init_module(void)
{
......
......@@ -163,6 +163,7 @@ void __init arcnet_init(void)
static int debug = ARCNET_DEBUG;
MODULE_PARM(debug, "i");
MODULE_LICENSE("GPL");
int __init init_module(void)
{
......
......@@ -133,6 +133,7 @@ MODULE_PARM(timeout, "i");
MODULE_PARM(backplane, "i");
MODULE_PARM(clockp, "i");
MODULE_PARM(clockm, "i");
MODULE_LICENSE("GPL");
static void com20020isa_open_close(struct net_device *dev, bool open)
{
......
......@@ -57,6 +57,7 @@ MODULE_PARM(timeout, "i");
MODULE_PARM(backplane, "i");
MODULE_PARM(clockp, "i");
MODULE_PARM(clockm, "i");
MODULE_LICENSE("GPL");
static void com20020pci_open_close(struct net_device *dev, bool open)
{
......@@ -160,7 +161,7 @@ static struct pci_driver com20020pci_driver = {
name: "com20020",
id_table: com20020pci_id_table,
probe: com20020pci_probe,
remove: __devexit_p(com20020pci_remove)
remove: __devexit_p(com20020pci_remove),
};
static int __init com20020pci_init(void)
......
......@@ -356,6 +356,8 @@ EXPORT_SYMBOL(com20020_check);
EXPORT_SYMBOL(com20020_found);
EXPORT_SYMBOL(com20020_remove);
MODULE_LICENSE("GPL");
int init_module(void)
{
BUGLVL(D_NORMAL) printk(VERSION);
......
......@@ -383,6 +383,7 @@ static char *device; /* use eg. device=arc1 to change name */
MODULE_PARM(io, "i");
MODULE_PARM(irq, "i");
MODULE_PARM(device, "s");
MODULE_LICENSE("GPL");
int init_module(void)
{
......
......@@ -617,6 +617,7 @@ MODULE_PARM(io, "i");
MODULE_PARM(irq, "i");
MODULE_PARM(shmem, "i");
MODULE_PARM(device, "s");
MODULE_LICENSE("GPL");
int init_module(void)
{
......
......@@ -68,6 +68,8 @@ void __init arcnet_rfc1051_init(void)
#ifdef MODULE
MODULE_LICENSE("GPL");
int __init init_module(void)
{
printk(VERSION);
......
......@@ -70,6 +70,8 @@ void __init arcnet_rfc1201_init(void)
#ifdef MODULE
MODULE_LICENSE("GPL");
int __init init_module(void)
{
printk(VERSION);
......
......@@ -847,3 +847,5 @@ static void __exit ariadne_cleanup(void)
module_init(ariadne_probe);
module_exit(ariadne_cleanup);
MODULE_LICENSE("GPL");
......@@ -30,7 +30,7 @@
#include <linux/zorro.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/amigaints.h>
#include <asm/amigahw.h>
......@@ -142,15 +142,15 @@ static int __init ariadne2_init(struct net_device *dev, unsigned long board,
{
unsigned long reset_start_time = jiffies;
writeb(readb(ioaddr + NE_RESET), ioaddr + NE_RESET);
z_writeb(z_readb(ioaddr + NE_RESET), ioaddr + NE_RESET);
while ((readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
while ((z_readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
if (jiffies - reset_start_time > 2*HZ/100) {
printk(" not found (no reset ack).\n");
return -ENODEV;
}
writeb(0xff, ioaddr + NE_EN0_ISR); /* Ack all intr. */
z_writeb(0xff, ioaddr + NE_EN0_ISR); /* Ack all intr. */
}
/* Read the 16 bytes of station address PROM.
......@@ -177,16 +177,16 @@ static int __init ariadne2_init(struct net_device *dev, unsigned long board,
{E8390_RREAD+E8390_START, NE_CMD},
};
for (i = 0; i < sizeof(program_seq)/sizeof(program_seq[0]); i++) {
writeb(program_seq[i].value, ioaddr + program_seq[i].offset);
z_writeb(program_seq[i].value, ioaddr + program_seq[i].offset);
}
}
for (i = 0; i < 16; i++) {
SA_prom[i] = readb(ioaddr + NE_DATAPORT);
(void)readb(ioaddr + NE_DATAPORT);
SA_prom[i] = z_readb(ioaddr + NE_DATAPORT);
(void)z_readb(ioaddr + NE_DATAPORT);
}
/* We must set the 8390 for word mode. */
writeb(0x49, ioaddr + NE_EN0_DCFG);
z_writeb(0x49, ioaddr + NE_EN0_DCFG);
start_page = NESM_START_PG;
stop_page = NESM_STOP_PG;
......@@ -260,18 +260,18 @@ static void ariadne2_reset_8390(struct net_device *dev)
if (ei_debug > 1)
printk("resetting the 8390 t=%ld...", jiffies);
writeb(readb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);
z_writeb(z_readb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);
ei_status.txing = 0;
ei_status.dmaing = 0;
/* This check _should_not_ be necessary, omit eventually. */
while ((readb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
while ((z_readb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
if (jiffies - reset_start_time > 2*HZ/100) {
printk("%s: ne_reset_8390() did not complete.\n", dev->name);
break;
}
writeb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr. */
z_writeb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr. */
}
/* Grab the 8390 specific header. Similar to the block_input routine, but
......@@ -294,19 +294,19 @@ static void ariadne2_get_8390_hdr(struct net_device *dev,
}
ei_status.dmaing |= 0x01;
writeb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);
writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
writeb(sizeof(struct e8390_pkt_hdr), nic_base + NE_EN0_RCNTLO);
writeb(0, nic_base + NE_EN0_RCNTHI);
writeb(0, nic_base + NE_EN0_RSARLO); /* On page boundary */
writeb(ring_page, nic_base + NE_EN0_RSARHI);
writeb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
z_writeb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);
z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
z_writeb(sizeof(struct e8390_pkt_hdr), nic_base + NE_EN0_RCNTLO);
z_writeb(0, nic_base + NE_EN0_RCNTHI);
z_writeb(0, nic_base + NE_EN0_RSARLO); /* On page boundary */
z_writeb(ring_page, nic_base + NE_EN0_RSARHI);
z_writeb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
ptrs = (short*)hdr;
for (cnt = 0; cnt < (sizeof(struct e8390_pkt_hdr)>>1); cnt++)
*ptrs++ = readw(NE_BASE + NE_DATAPORT);
*ptrs++ = z_readw(NE_BASE + NE_DATAPORT);
writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr. */
z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr. */
hdr->count = WORDSWAP(hdr->count);
......@@ -316,7 +316,7 @@ static void ariadne2_get_8390_hdr(struct net_device *dev,
/* Block input and output, similar to the Crynwr packet driver. If you
are porting to a new ethercard, look at the packet driver source for hints.
The NEx000 doesn't share the on-board packet memory -- you have to put
the packet out through the "remote DMA" dataport using writeb. */
the packet out through the "remote DMA" dataport using z_writeb. */
static void ariadne2_block_input(struct net_device *dev, int count,
struct sk_buff *skb, int ring_offset)
......@@ -334,20 +334,20 @@ static void ariadne2_block_input(struct net_device *dev, int count,
return;
}
ei_status.dmaing |= 0x01;
writeb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);
writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
writeb(count & 0xff, nic_base + NE_EN0_RCNTLO);
writeb(count >> 8, nic_base + NE_EN0_RCNTHI);
writeb(ring_offset & 0xff, nic_base + NE_EN0_RSARLO);
writeb(ring_offset >> 8, nic_base + NE_EN0_RSARHI);
writeb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
z_writeb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);
z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
z_writeb(count & 0xff, nic_base + NE_EN0_RCNTLO);
z_writeb(count >> 8, nic_base + NE_EN0_RCNTHI);
z_writeb(ring_offset & 0xff, nic_base + NE_EN0_RSARLO);
z_writeb(ring_offset >> 8, nic_base + NE_EN0_RSARHI);
z_writeb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
ptrs = (short*)buf;
for (cnt = 0; cnt < (count>>1); cnt++)
*ptrs++ = readw(NE_BASE + NE_DATAPORT);
*ptrs++ = z_readw(NE_BASE + NE_DATAPORT);
if (count & 0x01)
buf[count-1] = readb(NE_BASE + NE_DATAPORT);
buf[count-1] = z_readb(NE_BASE + NE_DATAPORT);
writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr. */
z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr. */
ei_status.dmaing &= ~0x01;
}
......@@ -375,24 +375,24 @@ static void ariadne2_block_output(struct net_device *dev, int count,
}
ei_status.dmaing |= 0x01;
/* We should already be in page 0, but to be safe... */
writeb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);
z_writeb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);
writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
/* Now the normal output. */
writeb(count & 0xff, nic_base + NE_EN0_RCNTLO);
writeb(count >> 8, nic_base + NE_EN0_RCNTHI);
writeb(0x00, nic_base + NE_EN0_RSARLO);
writeb(start_page, nic_base + NE_EN0_RSARHI);
z_writeb(count & 0xff, nic_base + NE_EN0_RCNTLO);
z_writeb(count >> 8, nic_base + NE_EN0_RCNTHI);
z_writeb(0x00, nic_base + NE_EN0_RSARLO);
z_writeb(start_page, nic_base + NE_EN0_RSARHI);
writeb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);
z_writeb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);
ptrs = (short*)buf;
for (cnt = 0; cnt < count>>1; cnt++)
writew(*ptrs++, NE_BASE+NE_DATAPORT);
z_writew(*ptrs++, NE_BASE+NE_DATAPORT);
dma_start = jiffies;
while ((readb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
while ((z_readb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
ariadne2_reset_8390(dev);
......@@ -400,7 +400,7 @@ static void ariadne2_block_output(struct net_device *dev, int count,
break;
}
writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr. */
z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr. */
ei_status.dmaing &= ~0x01;
return;
}
......@@ -423,3 +423,5 @@ static void __exit ariadne2_cleanup(void)
module_init(ariadne2_probe);
module_exit(ariadne2_cleanup);
MODULE_LICENSE("GPL");
......@@ -677,7 +677,7 @@ static void arlan_registration_timer(unsigned long data)
arlan_retransmit_now(dev);
}
if (!registrationBad(dev) &&
priv->tx_done_delayed < jiffies &&
time_after(jiffies, priv->tx_done_delayed) &&
priv->tx_done_delayed != 0)
{
TXLAST(dev).offset = 0;
......
This diff is collapsed.
......@@ -39,7 +39,7 @@
#define ETH_TX_TIMEOUT HZ/4
#define MAC_MIN_PKT_SIZE 64
#ifdef CONFIG_MIPS_PB1000
#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500)
#define PHY_ADDRESS 0
#define PHY_CONTROL_DEFAULT 0x3000
#define PHY_CONTROL_REG_ADDR 0
......@@ -60,7 +60,9 @@
#define MII_ANLPAR 0x0005
#define MII_AEXP 0x0006
#define MII_ANEXT 0x0007
#define MII_AUX_CNTRL 0x18
#define MII_LSI_CONFIG 0x0011
#define MII_LSI_STAT 0x0012
#define MII_AUX_CNTRL 0x0018
/* mii registers specific to AMD 79C901 */
#define MII_STATUS_SUMMARY = 0x0018
......@@ -124,6 +126,11 @@
#define MII_STSSUM_AUTO 0x0002
#define MII_STSSUM_SPD 0x0001
/* lsi status register */
#define MII_LSI_STAT_FDX 0x0008
#define MII_LSI_STAT_SPD 0x0010
/* Auxilliary Control/Status Register */
#define MII_AUX_FDX 0x0001
#define MII_AUX_100 0x0002
......
......@@ -919,12 +919,4 @@ static void slow_sane_block_output(struct net_device *dev, int count, const unsi
#endif
}
/*
* Local variables:
* compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c daynaport.c"
* version-control: t
* c-basic-offset: 4
* tab-width: 4
* kept-new-versions: 5
* End:
*/
MODULE_LICENSE("GPL");
......@@ -144,7 +144,8 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define E100_MAX_NIC 16
#define E100_MAX_BUSY_WAIT 50 /*Max udelays in wait_scb and wait_cus_idle */
#define E100_MAX_SCB_WAIT 100 /* Max udelays in wait_scb */
#define E100_MAX_CU_IDLE_WAIT 50 /* Max udelays in wait_cus_idle */
/* CPUSAVER_BUNDLE_MAX: Sets the maximum number of frames that will be bundled.
* In some situations, such as the TCP windowing algorithm, it may be
......
......@@ -182,7 +182,7 @@ static void e100_non_tx_background(unsigned long);
/* Global Data structures and variables */
char e100_copyright[] __devinitdata = "Copyright (c) 2002 Intel Corporation";
#define E100_VERSION "2.0.25-pre1"
#define E100_VERSION "2.0.27-pre3"
#define E100_FULL_DRIVER_NAME "Intel(R) PRO/100 Fast Ethernet Adapter - Loadable driver, ver "
......@@ -427,6 +427,7 @@ static inline void
e100_exec_cmd(struct e100_private *bdp, u8 cmd_low)
{
writeb(cmd_low, &(bdp->scb->scb_cmd_low));
readw(&(bdp->scb->scb_status)); /* flashes last write, read-safe */
}
/**
......@@ -455,7 +456,7 @@ e100_wait_scb(struct e100_private *bdp)
}
/* it didn't work. do it the slow way using udelay()s */
for (i = 0; i < E100_MAX_BUSY_WAIT; i++) {
for (i = 0; i < E100_MAX_SCB_WAIT; i++) {
if (!readb(&bdp->scb->scb_cmd_low))
return true;
cpu_relax();
......@@ -481,7 +482,7 @@ inline unsigned char
e100_wait_exec_simple(struct e100_private *bdp, u8 scb_cmd_low)
{
if (!e100_wait_scb(bdp)) {
printk(KERN_ERR "%s e100_wait_exec_simple: Wait failed\n",
printk(KERN_DEBUG "%s e100_wait_exec_simple: Wait failed\n",
bdp->device->name);
return false;
}
......@@ -521,7 +522,7 @@ e100_wait_cus_idle(struct e100_private *bdp)
cpu_relax();
}
for (i = 0; i < E100_MAX_BUSY_WAIT; i++) {
for (i = 0; i < E100_MAX_CU_IDLE_WAIT; i++) {
if (((readw(&(bdp->scb->scb_status)) & SCB_CUS_MASK) !=
SCB_CUS_ACTIVE)) {
return true;
......@@ -2372,11 +2373,13 @@ e100_start_cu(struct e100_private *bdp, tcb_t *tcb)
case START_WAIT:
// The last command was a non_tx CU command
if (!e100_wait_cus_idle(bdp))
printk("%s cu_start: timeout waiting for cu\n",
printk(KERN_DEBUG
"%s cu_start: timeout waiting for cu\n",
bdp->device->name);
if (!e100_wait_exec_cmplx(bdp, (u32) (tcb->tcb_phys),
SCB_CUC_START)) {
printk("%s cu_start: timeout waiting for scb\n",
printk(KERN_DEBUG
"%s cu_start: timeout waiting for scb\n",
bdp->device->name);
e100_exec_cmplx(bdp, (u32) (tcb->tcb_phys),
SCB_CUC_START);
......@@ -2537,7 +2540,8 @@ e100_start_ru(struct e100_private *bdp)
spin_lock(&bdp->bd_lock);
if (!e100_wait_exec_cmplx(bdp, rx_struct->dma_addr, SCB_RUC_START)) {
printk("%s start_ru: wait_scb failed\n", bdp->device->name);
printk(KERN_DEBUG
"%s start_ru: wait_scb failed\n", bdp->device->name);
e100_exec_cmplx(bdp, rx_struct->dma_addr, SCB_RUC_START);
}
if (bdp->next_cu_cmd == RESUME_NO_WAIT) {
......
......@@ -826,8 +826,9 @@ static int speedo_found1(struct pci_dev *pdev,
sp->phy[0] = eeprom[6];
sp->phy[1] = eeprom[7];
sp->rx_bug = (eeprom[3] & 0x03) == 3 ? 0 : 1;
if (((pdev->device > 0x1030 && (pdev->device < 0x1039)))
|| (pdev->device == 0x2449)) {
if (((pdev->device > 0x1030 && (pdev->device < 0x103F)))
|| (pdev->device == 0x2449) || (pdev->device == 0x2459)
|| (pdev->device == 0x245D)) {
sp->chip_id = 1;
}
......@@ -2285,8 +2286,17 @@ static struct pci_device_id eepro100_pci_tbl[] __devinitdata = {
{ PCI_VENDOR_ID_INTEL, 0x1036, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x1037, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x1038, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x1039, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x103A, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x103B, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x103C, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x103D, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x103E, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x1227, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x1228, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x2449, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x2459, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x245D, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x5200, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, 0x5201, PCI_ANY_ID, PCI_ANY_ID, },
{ 0,}
......
This diff is collapsed.
......@@ -29,29 +29,43 @@
#include <asm/galileo-boards/gt96100.h>
#define dbg(lvl, format, arg...) \
if (lvl <= GT96100_DEBUG) \
printk(KERN_DEBUG "%s: " format, dev->name , ## arg)
#define err(format, arg...) \
printk(KERN_ERR "%s: " format, dev->name , ## arg)
#define info(format, arg...) \
printk(KERN_INFO "%s: " format, dev->name , ## arg)
#define warn(format, arg...) \
printk(KERN_WARNING "%s: " format, dev->name , ## arg)
/* Keep the ring sizes a power of two for efficiency. */
#define TX_RING_SIZE 16
#define RX_RING_SIZE 32
#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
#define RX_HASH_TABLE_SIZE 16384
#define HASH_HOP_NUMBER 12
#define NUM_INTERFACES 2
#define GT96100ETH_TX_TIMEOUT HZ
#define GT96100ETH_TX_TIMEOUT HZ/4
#define GT96100_ETH0_BASE (MIPS_GT96100_BASE + GT96100_ETH_PORT_CONFIG)
#define GT96100_ETH1_BASE (GT96100_ETH0_BASE + GT96100_ETH_IO_SIZE)
#ifdef CONFIG_MIPS_EV96100
#define GT96100_ETHER0_IRQ 4
#define GT96100_ETHER0_IRQ 3
#define GT96100_ETHER1_IRQ 4
#else
#define GT96100_ETHER0_IRQ -1
#define GT96100_ETHER1_IRQ -1
#endif
#define REV_GT96100 1
#define REV_GT96100A_1 2
#define REV_GT96100A 3
#define GT96100ETH_READ(gp, offset) \
GT96100_READ((gp->port_offset + offset))
......@@ -70,13 +84,13 @@
/* Bit definitions of the SMI Reg */
enum {
smirDataMask = 0xffff,
smirPhyAdMask = 0x1f << 16,
smirPhyAdMask = 0x1f<<16,
smirPhyAdBit = 16,
smirRegAdMask = 0x1f << 21,
smirRegAdMask = 0x1f<<21,
smirRegAdBit = 21,
smirOpCode = 1 << 26,
smirReadValid = 1 << 27,
smirBusy = 1 << 28
smirOpCode = 1<<26,
smirReadValid = 1<<27,
smirBusy = 1<<28
};
/* Bit definitions of the Port Config Reg */
......@@ -84,17 +98,17 @@ enum pcr_bits {
pcrPM = 1,
pcrRBM = 2,
pcrPBF = 4,
pcrEN = 1 << 7,
pcrLPBKMask = 0x3 << 8,
pcrEN = 1<<7,
pcrLPBKMask = 0x3<<8,
pcrLPBKBit = 8,
pcrFC = 1 << 10,
pcrHS = 1 << 12,
pcrHM = 1 << 13,
pcrHDM = 1 << 14,
pcrHD = 1 << 15,
pcrISLMask = 0x7 << 28,
pcrFC = 1<<10,
pcrHS = 1<<12,
pcrHM = 1<<13,
pcrHDM = 1<<14,
pcrHD = 1<<15,
pcrISLMask = 0x7<<28,
pcrISLBit = 28,
pcrACCS = 1 << 31
pcrACCS = 1<<31
};
/* Bit definitions of the Port Config Extend Reg */
......@@ -102,27 +116,27 @@ enum pcxr_bits {
pcxrIGMP = 1,
pcxrSPAN = 2,
pcxrPAR = 4,
pcxrPRIOtxMask = 0x7 << 3,
pcxrPRIOtxMask = 0x7<<3,
pcxrPRIOtxBit = 3,
pcxrPRIOrxMask = 0x3 << 6,
pcxrPRIOrxMask = 0x3<<6,
pcxrPRIOrxBit = 6,
pcxrPRIOrxOverride = 1 << 8,
pcxrDPLXen = 1 << 9,
pcxrFCTLen = 1 << 10,
pcxrFLP = 1 << 11,
pcxrFCTL = 1 << 12,
pcxrMFLMask = 0x3 << 14,
pcxrPRIOrxOverride = 1<<8,
pcxrDPLXen = 1<<9,
pcxrFCTLen = 1<<10,
pcxrFLP = 1<<11,
pcxrFCTL = 1<<12,
pcxrMFLMask = 0x3<<14,
pcxrMFLBit = 14,
pcxrMIBclrMode = 1 << 16,
pcxrSpeed = 1 << 18,
pcxrSpeeden = 1 << 19,
pcxrRMIIen = 1 << 20,
pcxrDSCPen = 1 << 21
pcxrMIBclrMode = 1<<16,
pcxrSpeed = 1<<18,
pcxrSpeeden = 1<<19,
pcxrRMIIen = 1<<20,
pcxrDSCPen = 1<<21
};
/* Bit definitions of the Port Command Reg */
enum pcmr_bits {
pcmrFJ = 1 << 15
pcmrFJ = 1<<15
};
......@@ -132,119 +146,124 @@ enum psr_bits {
psrDuplex = 2,
psrFctl = 4,
psrLink = 8,
psrPause = 1 << 4,
psrTxLow = 1 << 5,
psrTxHigh = 1 << 6,
psrTxInProg = 1 << 7
psrPause = 1<<4,
psrTxLow = 1<<5,
psrTxHigh = 1<<6,
psrTxInProg = 1<<7
};
/* Bit definitions of the SDMA Config Reg */
enum sdcr_bits {
sdcrRCMask = 0xf << 2,
sdcrRCMask = 0xf<<2,
sdcrRCBit = 2,
sdcrBLMR = 1 << 6,
sdcrBLMT = 1 << 7,
sdcrPOVR = 1 << 8,
sdcrRIFB = 1 << 9,
sdcrBSZMask = 0x3 << 12,
sdcrBLMR = 1<<6,
sdcrBLMT = 1<<7,
sdcrPOVR = 1<<8,
sdcrRIFB = 1<<9,
sdcrBSZMask = 0x3<<12,
sdcrBSZBit = 12
};
/* Bit definitions of the SDMA Command Reg */
enum sdcmr_bits {
sdcmrERD = 1 << 7,
sdcmrAR = 1 << 15,
sdcmrSTDH = 1 << 16,
sdcmrSTDL = 1 << 17,
sdcmrTXDH = 1 << 23,
sdcmrTXDL = 1 << 24,
sdcmrAT = 1 << 31
sdcmrERD = 1<<7,
sdcmrAR = 1<<15,
sdcmrSTDH = 1<<16,
sdcmrSTDL = 1<<17,
sdcmrTXDH = 1<<23,
sdcmrTXDL = 1<<24,
sdcmrAT = 1<<31
};
/* Bit definitions of the Interrupt Cause Reg */
enum icr_bits {
icrRxBuffer = 1,
icrTxBufferHigh = 1 << 2,
icrTxBufferLow = 1 << 3,
icrTxEndHigh = 1 << 6,
icrTxEndLow = 1 << 7,
icrRxError = 1 << 8,
icrTxErrorHigh = 1 << 10,
icrTxErrorLow = 1 << 11,
icrRxOVR = 1 << 12,
icrTxUdr = 1 << 13,
icrRxBufferQ0 = 1 << 16,
icrRxBufferQ1 = 1 << 17,
icrRxBufferQ2 = 1 << 18,
icrRxBufferQ3 = 1 << 19,
icrRxErrorQ0 = 1 << 20,
icrRxErrorQ1 = 1 << 21,
icrRxErrorQ2 = 1 << 22,
icrRxErrorQ3 = 1 << 23,
icrMIIPhySTC = 1 << 28,
icrSMIdone = 1 << 29,
icrEtherIntSum = 1 << 31
icrTxBufferHigh = 1<<2,
icrTxBufferLow = 1<<3,
icrTxEndHigh = 1<<6,
icrTxEndLow = 1<<7,
icrRxError = 1<<8,
icrTxErrorHigh = 1<<10,
icrTxErrorLow = 1<<11,
icrRxOVR = 1<<12,
icrTxUdr = 1<<13,
icrRxBufferQ0 = 1<<16,
icrRxBufferQ1 = 1<<17,
icrRxBufferQ2 = 1<<18,
icrRxBufferQ3 = 1<<19,
icrRxErrorQ0 = 1<<20,
icrRxErrorQ1 = 1<<21,
icrRxErrorQ2 = 1<<22,
icrRxErrorQ3 = 1<<23,
icrMIIPhySTC = 1<<28,
icrSMIdone = 1<<29,
icrEtherIntSum = 1<<31
};
/* The Rx and Tx descriptor lists. */
typedef struct {
#ifdef DESC_BE
u16 byte_cnt;
u16 reserved;
#else
u16 reserved;
u16 byte_cnt;
#endif
u32 cmdstat;
u32 byte_cnt;
u32 buff_ptr;
u32 next;
} gt96100_td_t;
#define tdByteCntBit 16
u32 buff_ptr;
} gt96100_td_t __attribute__ ((packed));
typedef struct {
#ifdef DESC_BE
u16 buff_sz;
u16 byte_cnt;
#else
u16 byte_cnt;
u16 buff_sz;
#endif
u32 cmdstat;
u32 buff_cnt_sz;
u32 buff_ptr;
u32 next;
} gt96100_rd_t;
#define rdBuffSzBit 16
#define rdByteCntMask 0xffff
u32 buff_ptr;
} gt96100_rd_t __attribute__ ((packed));
/* Values for the Tx command-status descriptor entry. */
enum td_cmdstat {
txOwn = 1 << 31,
txAutoMode = 1 << 30,
txEI = 1 << 23,
txGenCRC = 1 << 22,
txPad = 1 << 18,
txFirst = 1 << 17,
txLast = 1 << 16,
txErrorSummary = 1 << 15,
txReTxCntMask = 0x0f << 10,
txOwn = 1<<31,
txAutoMode = 1<<30,
txEI = 1<<23,
txGenCRC = 1<<22,
txPad = 1<<18,
txFirst = 1<<17,
txLast = 1<<16,
txErrorSummary = 1<<15,
txReTxCntMask = 0x0f<<10,
txReTxCntBit = 10,
txCollision = 1 << 9,
txReTxLimit = 1 << 8,
txUnderrun = 1 << 6,
txLateCollision = 1 << 5
txCollision = 1<<9,
txReTxLimit = 1<<8,
txUnderrun = 1<<6,
txLateCollision = 1<<5
};
#define TxReTxCntBit 10
/* Values for the Rx command-status descriptor entry. */
enum rd_cmdstat {
rxOwn = 1 << 31,
rxAutoMode = 1 << 30,
rxEI = 1 << 23,
rxFirst = 1 << 17,
rxLast = 1 << 16,
rxErrorSummary = 1 << 15,
rxIGMP = 1 << 14,
rxHashExpired = 1 << 13,
rxMissedFrame = 1 << 12,
rxFrameType = 1 << 11,
rxShortFrame = 1 << 8,
rxMaxFrameLen = 1 << 7,
rxOverrun = 1 << 6,
rxCollision = 1 << 4,
rxOwn = 1<<31,
rxAutoMode = 1<<30,
rxEI = 1<<23,
rxFirst = 1<<17,
rxLast = 1<<16,
rxErrorSummary = 1<<15,
rxIGMP = 1<<14,
rxHashExpired = 1<<13,
rxMissedFrame = 1<<12,
rxFrameType = 1<<11,
rxShortFrame = 1<<8,
rxMaxFrameLen = 1<<7,
rxOverrun = 1<<6,
rxCollision = 1<<4,
rxCRCError = 1
};
......@@ -286,40 +305,44 @@ typedef struct {
struct gt96100_private {
gt96100_rd_t *rx_ring;
gt96100_td_t *tx_ring;
gt96100_rd_t* rx_ring;
gt96100_td_t* tx_ring;
// The Rx and Tx rings must be 16-byte aligned
dma_addr_t rx_ring_dma;
dma_addr_t tx_ring_dma;
char *hash_table;
char* hash_table;
// The Hash Table must be 8-byte aligned
dma_addr_t hash_table_dma;
int hash_mode;
// The Rx buffers must be 8-byte aligned
char *rx_buff[RX_RING_SIZE];
char* rx_buff;
dma_addr_t rx_buff_dma;
// Tx buffers (tx_skbuff[i]->data) with less than 8 bytes
// of payload must be 8-byte aligned
struct sk_buff *tx_skbuff[TX_RING_SIZE];
int rx_next_out; /* The next free ring entry to receive */
int tx_next_in; /* The next free ring entry to send */
int tx_next_out; /* The last ring entry the ISR processed */
int tx_count; /* current # of pkts waiting to be sent in Tx ring */
struct sk_buff* tx_skbuff[TX_RING_SIZE];
int rx_next_out; /* The next free ring entry to receive */
int tx_next_in; /* The next free ring entry to send */
int tx_next_out; /* The last ring entry the ISR processed */
int tx_count; /* current # of pkts waiting to be sent in Tx ring */
int intr_work_done; /* number of Rx and Tx pkts processed in the isr */
int tx_full; /* Tx ring is full */
mib_counters_t mib;
struct net_device_stats stats;
int io_size;
int port_num; // 0 or 1
int port_num; // 0 or 1
int chip_rev;
u32 port_offset;
int phy_addr; // PHY address
u32 last_psr; // last value of the port status register
int phy_addr; // PHY address
u32 last_psr; // last value of the port status register
int options; /* User-settable misc. driver options. */
int options; /* User-settable misc. driver options. */
int drv_flags;
unsigned char phys[2]; /* MII device addresses. */
spinlock_t lock; /* Serialise access to device */
struct timer_list timer;
spinlock_t lock; /* Serialise access to device */
};
#endif
......@@ -1063,6 +1063,7 @@ static void decode_data(unsigned char inbyte, struct sixpack *sp)
MODULE_AUTHOR("Andreas Knsgen <ajk@ccac.rwth-aachen.de>");
MODULE_DESCRIPTION("6pack driver for AX.25");
MODULE_LICENSE("GPL");
module_init(sixpack_init_driver);
module_exit(sixpack_exit_driver);
......@@ -1416,6 +1416,7 @@ MODULE_PARM_DESC(iobase, "baycom io base address");
MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
MODULE_LICENSE("GPL");
/* --------------------------------------------------------------------- */
......
......@@ -493,6 +493,7 @@ MODULE_PARM_DESC(iobase, "baycom io base address");
MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
MODULE_DESCRIPTION("Baycom par96 and picpar amateur radio modem driver");
MODULE_LICENSE("GPL");
/* --------------------------------------------------------------------- */
......
......@@ -609,6 +609,7 @@ MODULE_PARM_DESC(baud, "baycom baud rate (300 to 4800)");
MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
MODULE_DESCRIPTION("Baycom ser12 full duplex amateur radio modem driver");
MODULE_LICENSE("GPL");
/* --------------------------------------------------------------------- */
......
......@@ -649,6 +649,7 @@ MODULE_PARM_DESC(irq, "baycom irq number");
MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
MODULE_DESCRIPTION("Baycom ser12 half duplex amateur radio modem driver");
MODULE_LICENSE("GPL");
/* --------------------------------------------------------------------- */
......
......@@ -645,5 +645,6 @@ static void __exit bpq_cleanup_driver(void)
MODULE_AUTHOR("Joerg Reuter DL1BKE <jreuter@yaina.de>");
MODULE_DESCRIPTION("Transmit and receive AX.25 packets over Ethernet");
MODULE_LICENSE("GPL");
module_init(bpq_init_driver);
module_exit(bpq_cleanup_driver);
......@@ -305,6 +305,7 @@ static unsigned long rand;
MODULE_AUTHOR("Klaus Kudielka");
MODULE_DESCRIPTION("Driver for high-speed SCC boards");
MODULE_PARM(io, "1-" __MODULE_STRING(MAX_NUM_DEVS) "i");
MODULE_LICENSE("GPL");
int init_module(void) {
......
......@@ -902,6 +902,7 @@ static void __exit hdlcdrv_cleanup_driver(void)
MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
MODULE_DESCRIPTION("Packet Radio network interface HDLC encoder/decoder");
MODULE_LICENSE("GPL");
module_init(hdlcdrv_init_driver);
module_exit(hdlcdrv_cleanup_driver);
......
......@@ -1008,6 +1008,7 @@ MODULE_AUTHOR("Hans Albas PE1AYX <hans@esrac.ele.tue.nl>");
MODULE_DESCRIPTION("KISS driver for AX.25 over TTYs");
MODULE_PARM(ax25_maxdev, "i");
MODULE_PARM_DESC(ax25_maxdev, "number of MKISS devices");
MODULE_LICENSE("GPL");
module_init(mkiss_init_driver);
module_exit(mkiss_exit_driver);
......
......@@ -2180,5 +2180,6 @@ static void __exit scc_cleanup_driver(void)
MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>");
MODULE_DESCRIPTION("AX.25 Device Driver for Z8530 based HDLC cards");
MODULE_SUPPORTED_DEVICE("Z8530 based SCC cards for Amateur Radio");
MODULE_LICENSE("GPL");
module_init(scc_init_driver);
module_exit(scc_cleanup_driver);
......@@ -1179,6 +1179,7 @@ static void __exit yam_cleanup_driver(void)
MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr");
MODULE_DESCRIPTION("Yam amateur radio modem driver");
MODULE_LICENSE("GPL");
module_init(yam_init_driver);
module_exit(yam_cleanup_driver);
......
......@@ -121,7 +121,7 @@ int __init hydra_init(unsigned long board)
dev->dev_addr[j] = *((u8 *)(board + HYDRA_ADDRPROM + 2*j));
/* We must set the 8390 for word mode. */
writeb(0x4b, ioaddr + NE_EN0_DCFG);
z_writeb(0x4b, ioaddr + NE_EN0_DCFG);
start_page = NESM_START_PG;
stop_page = NESM_STOP_PG;
......@@ -196,10 +196,10 @@ static void hydra_get_8390_hdr(struct net_device *dev,
((ring_page - NESM_START_PG)<<8);
ptrs = (short *)hdr;
*(ptrs++) = readw(hdr_start);
*(ptrs++) = z_readw(hdr_start);
*((short *)hdr) = WORDSWAP(*((short *)hdr));
hdr_start += 2;
*(ptrs++) = readw(hdr_start);
*(ptrs++) = z_readw(hdr_start);
*((short *)hdr+1) = WORDSWAP(*((short *)hdr+1));
}
......@@ -216,11 +216,11 @@ static void hydra_block_input(struct net_device *dev, int count,
if (xfer_start+count > mem_base + (NESM_STOP_PG<<8)) {
int semi_count = (mem_base + (NESM_STOP_PG<<8)) - xfer_start;
memcpy_fromio(skb->data,xfer_start,semi_count);
z_memcpy_fromio(skb->data,xfer_start,semi_count);
count -= semi_count;
memcpy_fromio(skb->data+semi_count, mem_base, count);
z_memcpy_fromio(skb->data+semi_count, mem_base, count);
} else
memcpy_fromio(skb->data, xfer_start,count);
z_memcpy_fromio(skb->data, xfer_start,count);
}
......@@ -233,7 +233,7 @@ static void hydra_block_output(struct net_device *dev, int count,
if (count&1)
count++;
memcpy_toio(mem_base+((start_page - NESM_START_PG)<<8), buf, count);
z_memcpy_toio(mem_base+((start_page - NESM_START_PG)<<8), buf, count);
}
static void __exit hydra_cleanup(void)
......
......@@ -341,14 +341,15 @@ static int nic_init(struct ioc3 *ioc3)
}
/*
* Read the NIC (Number-In-a-Can) device.
* Read the NIC (Number-In-a-Can) device used to store the MAC address on
* SN0 / SN00 nodeboards and PCI cards.
*/
static void ioc3_get_eaddr(struct ioc3_private *ip)
static void ioc3_get_eaddr_nic(struct ioc3_private *ip)
{
struct ioc3 *ioc3 = ip->regs;
u8 nic[14];
int i;
int tries = 2; /* There may be some problem with the battery? */
int i;
ioc3_w(gpcr_s, (1 << 21));
......@@ -371,16 +372,123 @@ static void ioc3_get_eaddr(struct ioc3_private *ip)
for (i = 13; i >= 0; i--)
nic[i] = nic_read_byte(ioc3);
printk("Ethernet address is ");
for (i = 2; i < 8; i++) {
for (i = 2; i < 8; i++)
ip->dev->dev_addr[i - 2] = nic[i];
printk("%02x", nic[i]);
}
#if defined(CONFIG_IA64_SGI_SN1) || defined(CONFIG_IA64_SGI_SN2)
/*
* Get the ether-address on SN1 nodes
*/
static void ioc3_get_eaddr_sn(struct ioc3_private *ip)
{
int ibrick_mac_addr_get(nasid_t, char *);
struct ioc3 *ioc3 = ip->regs;
nasid_t nasid_of_ioc3;
char io7eaddr[20];
long mac;
int err_val;
/*
* err_val = ibrick_mac_addr_get(get_nasid(), io7eaddr );
*
* BAD!! The above call uses get_nasid() and assumes that
* the ioc3 pointed to by struct ioc3 is hooked up to the
* cbrick that we're running on. The proper way to make this call
* is to figure out which nasid the ioc3 is connected to
* and use that to call ibrick_mac_addr_get. Below is
* a hack to do just that.
*/
/*
* Get the nasid of the ioc3 from the ioc3's base addr.
* FIXME: the 8 at the end assumes we're in memory mode,
* not node mode (for that, we'd change it to a 9).
* Is there a call to extract this info from a physical
* addr somewhere in an sn header file already? If so,
* we should probably use that, or restructure this routine
* to use pci_dev and generic numa nodeid getting stuff.
*/
nasid_of_ioc3 = (((unsigned long)ioc3 >> 33) & ~(-1 << 8));
err_val = ibrick_mac_addr_get(nasid_of_ioc3, io7eaddr );
if (err_val) {
/* Couldn't read the eeprom; try OSLoadOptions. */
printk("WARNING: ibrick_mac_addr_get failed: %d\n", err_val);
/* this is where we hardwire the mac address
* 1st ibrick had 08:00:69:11:34:75
* 2nd ibrick had 08:00:69:11:35:35
*
* Eagan Machines:
* mankato1 08:00:69:11:BE:95
* warroad 08:00:69:11:bd:60
* duron 08:00:69:11:34:60
*
* an easy way to get the mac address is to hook
* up an ip35, then from L1 do 'cti serial'
* and then look for MAC line XXX THIS DOESN"T QUITE WORK!!
*/
printk("ioc3_get_eaddr: setting ethernet address to:\n -----> ");
ip->dev->dev_addr[0] = 0x8;
ip->dev->dev_addr[1] = 0x0;
ip->dev->dev_addr[2] = 0x69;
ip->dev->dev_addr[3] = 0x11;
ip->dev->dev_addr[4] = 0x34;
ip->dev->dev_addr[5] = 0x60;
}
else {
long simple_strtol(const char *,char **,unsigned int);
mac = simple_strtol(io7eaddr, (char **)0, 16);
ip->dev->dev_addr[0] = (mac >> 40) & 0xff;
ip->dev->dev_addr[1] = (mac >> 32) & 0xff;
ip->dev->dev_addr[2] = (mac >> 24) & 0xff;
ip->dev->dev_addr[3] = (mac >> 16) & 0xff;
ip->dev->dev_addr[4] = (mac >> 8) & 0xff;
ip->dev->dev_addr[5] = mac & 0xff;
}
}
#endif
/*
* Ok, this is hosed by design. It's necessary to know what machine the
* NIC is in in order to know how to read the NIC address. We also have
* to know if it's a PCI card or a NIC in on the node board ...
*/
static void ioc3_get_eaddr(struct ioc3_private *ip)
{
void (*do_get_eaddr)(struct ioc3_private *ip) = NULL;
int i;
/*
* We should also use this code for PCI cards, no matter what host
* machine but how to know that we're a PCI card?
*/
#ifdef CONFIG_SGI_IP27
do_get_eaddr = ioc3_get_eaddr_nic;
#endif
#if defined(CONFIG_IA64_SGI_SN1) || defined(CONFIG_IA64_SGI_SN2)
do_get_eaddr = ioc3_get_eaddr_sn;
#endif
if (!do_get_eaddr) {
printk(KERN_ERR "Don't know how to read MAC address of this "
"IOC3 NIC\n");
return;
}
printk("Ethernet address is ");
for (i = 0; i < 6; i++) {
printk("%02x", ip->dev->dev_addr[i]);
if (i < 7)
printk(":");
}
printk(".\n");
}
/*
* Caller must hold the ioc3_lock ever for MII readers. This is also
* used to protect the transmitter side but it's low contention.
......@@ -435,10 +543,10 @@ ioc3_rx(struct ioc3_private *ip)
skb = ip->rx_skbs[rx_entry];
rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
w0 = rxb->w0;
w0 = be32_to_cpu(rxb->w0);
while (w0 & ERXBUF_V) {
err = rxb->err; /* It's valid ... */
err = be32_to_cpu(rxb->err); /* It's valid ... */
if (err & ERXBUF_GOODPKT) {
len = ((w0 >> ERXBUF_BYTECNT_SHIFT) & 0x7ff) - 4;
skb_trim(skb, len);
......@@ -479,8 +587,8 @@ ioc3_rx(struct ioc3_private *ip)
ip->stats.rx_frame_errors++;
next:
ip->rx_skbs[n_entry] = new_skb;
rxr[n_entry] = (0xa5UL << 56) |
((unsigned long) rxb & TO_PHYS_MASK);
rxr[n_entry] = cpu_to_be32((0xa5UL << 56) |
((unsigned long) rxb & TO_PHYS_MASK));
rxb->w0 = 0; /* Clear valid flag */
n_entry = (n_entry + 1) & 511; /* Update erpir */
......@@ -488,7 +596,7 @@ ioc3_rx(struct ioc3_private *ip)
rx_entry = (rx_entry + 1) & 511;
skb = ip->rx_skbs[rx_entry];
rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
w0 = rxb->w0;
w0 = be32_to_cpu(rxb->w0);
}
ioc3->erpir = (n_entry << 3) | ERPIR_ARM;
ip->rx_pi = n_entry;
......@@ -1190,8 +1298,8 @@ ioc3_alloc_rings(struct net_device *dev, struct ioc3_private *ip,
/* Because we reserve afterwards. */
skb_put(skb, (1664 + RX_OFFSET));
rxb = (struct ioc3_erxbuf *) skb->data;
rxr[i] = (0xa5UL << 56)
| ((unsigned long) rxb & TO_PHYS_MASK);
rxr[i] = cpu_to_be64((0xa5UL << 56) |
((unsigned long) rxb & TO_PHYS_MASK));
skb_reserve(skb, RX_OFFSET);
}
ip->rx_ci = 0;
......@@ -1555,8 +1663,8 @@ ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev)
memset(desc->data + len, 0, ETH_ZLEN - len);
len = ETH_ZLEN;
}
desc->cmd = len | ETXD_INTWHENDONE | ETXD_D0V;
desc->bufcnt = len;
desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | ETXD_D0V);
desc->bufcnt = cpu_to_be32(len);
} else if ((data ^ (data + len)) & 0x4000) {
unsigned long b2, s1, s2;
......@@ -1564,16 +1672,20 @@ ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev)
s1 = b2 - data;
s2 = data + len - b2;
desc->cmd = len | ETXD_INTWHENDONE | ETXD_B1V | ETXD_B2V;
desc->bufcnt = (s1 << ETXD_B1CNT_SHIFT) |
(s2 << ETXD_B2CNT_SHIFT);
desc->p1 = (0xa5UL << 56) | (data & TO_PHYS_MASK);
desc->p2 = (0xa5UL << 56) | (data & TO_PHYS_MASK);
desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE |
ETXD_B1V | ETXD_B2V);
desc->bufcnt = cpu_to_be32((s1 << ETXD_B1CNT_SHIFT)
| (s2 << ETXD_B2CNT_SHIFT));
desc->p1 = cpu_to_be64((0xa5UL << 56) |
(data & TO_PHYS_MASK));
desc->p2 = cpu_to_be64((0xa5UL << 56) |
(data & TO_PHYS_MASK));
} else {
/* Normal sized packet that doesn't cross a page boundary. */
desc->cmd = len | ETXD_INTWHENDONE | ETXD_B1V;
desc->bufcnt = len << ETXD_B1CNT_SHIFT;
desc->p1 = (0xa5UL << 56) | (data & TO_PHYS_MASK);
desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | ETXD_B1V);
desc->bufcnt = cpu_to_be32(len << ETXD_B1CNT_SHIFT);
desc->p1 = cpu_to_be64((0xa5UL << 56) |
(data & TO_PHYS_MASK));
}
BARRIER();
......
This diff is collapsed.
......@@ -713,8 +713,6 @@ static void irtty_write_wakeup(struct tty_struct *tty)
self->tx_buff.data += actual;
self->tx_buff.len -= actual;
self->stats.tx_packets++;
} else {
/*
* Now serial buffer is almost free & we can start
......@@ -722,6 +720,8 @@ static void irtty_write_wakeup(struct tty_struct *tty)
*/
IRDA_DEBUG(5, __FUNCTION__ "(), finished with frame!\n");
self->stats.tx_packets++;
tty->flags &= ~(1 << TTY_DO_WRITE_WAKEUP);
if (self->new_speed) {
......
......@@ -88,10 +88,14 @@ static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
/* These are the known NSC chips */
static nsc_chip_t chips[] = {
/* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
{ "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
nsc_ircc_probe_108, nsc_ircc_init_108 },
{ "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
nsc_ircc_probe_338, nsc_ircc_init_338 },
/* Contributed by Kevin Thayer - OmniBook 6100 */
{ "PC87338?", { 0x2e, 0x15c, 0x398 }, 0x08, 0x00, 0xf8,
nsc_ircc_probe_338, nsc_ircc_init_338 },
{ NULL }
};
......@@ -698,6 +702,9 @@ static int nsc_ircc_setup(chipio_t *info)
switch_bank(iobase, BANK3);
version = inb(iobase+MID);
IRDA_DEBUG(2, __FUNCTION__ "() Driver %s Found chip version %02x\n",
driver_name, version);
/* Should be 0x2? */
if (0x20 != (version & 0xf0)) {
ERROR("%s, Wrong chip version %02x\n", driver_name, version);
......
......@@ -612,7 +612,7 @@ static void w83977af_dma_write(struct w83977af_ir *self, int iobase)
disable_dma(self->io.dma);
clear_dma_ff(self->io.dma);
set_dma_mode(self->io.dma, DMA_MODE_READ);
set_dma_addr(self->io.dma, virt_to_bus(self->tx_buff.data));
set_dma_addr(self->io.dma, isa_virt_to_bus(self->tx_buff.data));
set_dma_count(self->io.dma, self->tx_buff.len);
#else
setup_dma(self->io.dma, self->tx_buff.data, self->tx_buff.len,
......@@ -770,7 +770,7 @@ int w83977af_dma_receive(struct w83977af_ir *self)
disable_dma(self->io.dma);
clear_dma_ff(self->io.dma);
set_dma_mode(self->io.dma, DMA_MODE_READ);
set_dma_addr(self->io.dma, virt_to_bus(self->rx_buff.data));
set_dma_addr(self->io.dma, isa_virt_to_bus(self->rx_buff.data));
set_dma_count(self->io.dma, self->rx_buff.truesize);
#else
setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
......
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