Merge tiger.hpl.hp.com:/data1/bk/vanilla/linux-2.5

into tiger.hpl.hp.com:/data1/bk/lia64/to-linus-2.5

arch/ia64/ia32/ia32_entry.S

@@ -483,6 +483,14 @@ ia32_syscall_table:
  	data8 sys32_fadvise64_64
  	data8 sys_ni_syscall
   	data8 sys_ni_syscall
+ 	data8 sys_ni_syscall	/* 275 */
+  	data8 sys_ni_syscall
+  	data8 compat_sys_mq_open
+  	data8 sys_mq_unlink
+  	data8 compat_sys_mq_timedsend
+  	data8 compat_sys_mq_timedreceive	/* 280 */
+  	data8 compat_sys_mq_notify
+  	data8 compat_sys_mq_getsetattr
 
 	// guard against failures to increase IA32_NR_syscalls
 	.org ia32_syscall_table + 8*IA32_NR_syscalls

arch/ia64/ia32/ia32_signal.c

@@ -169,7 +169,12 @@ copy_siginfo_to_user32 (siginfo_t32 *to, siginfo_t *from)
 			addr = (unsigned long) from->si_ptr;
 			err |= __put_user(addr, &to->si_ptr);
 			break;
-		/* case __SI_RT: This is not generated by the kernel as of now.  */
+		case __SI_RT >> 16:	/* Not generated by the kernel as of now.  */
+		case __SI_MESGQ >> 16:
+			err |= __put_user(from->si_uid, &to->si_uid);
+			err |= __put_user(from->si_pid, &to->si_pid);
+			err |= __put_user(from->si_ptr, &to->si_ptr);
+			break;
 		}
 	}
 	return err;
@@ -612,7 +617,6 @@ sys32_rt_sigtimedwait (compat_sigset_t *uthese, siginfo_t32 *uinfo,
 asmlinkage long
 sys32_rt_sigqueueinfo (int pid, int sig, siginfo_t32 *uinfo)
 {
-	extern int copy_siginfo_from_user32 (siginfo_t *to, siginfo_t32 *from);
 	mm_segment_t old_fs = get_fs();
 	siginfo_t info;
 	int ret;

arch/ia64/kernel/entry.S

@@ -1504,12 +1504,12 @@ sys_call_table:
 	data8 sys_ni_syscall
 	data8 sys_ni_syscall			// 1260
 	data8 sys_ni_syscall
-	data8 sys_ni_syscall
-	data8 sys_ni_syscall
-	data8 sys_ni_syscall
-	data8 sys_ni_syscall			// 1265
-	data8 sys_ni_syscall
-	data8 sys_ni_syscall
+	data8 sys_mq_open
+	data8 sys_mq_unlink
+	data8 sys_mq_timedsend
+	data8 sys_mq_timedreceive		// 1265
+	data8 sys_mq_notify
+	data8 sys_mq_getsetattr
 	data8 sys_ni_syscall
 	data8 sys_ni_syscall
 	data8 sys_ni_syscall			// 1270

arch/ia64/kernel/fsys.S

@@ -851,12 +851,12 @@ fsyscall_table:
 	data8 0
 	data8 0							// 1260
 	data8 0
-	data8 0
-	data8 0
-	data8 0
-	data8 0							// 1265
-	data8 0
-	data8 0
+	data8 0				// mq_open
+	data8 0				// mq_unlink
+	data8 0				// mq_timedsend
+	data8 0				// mq_timedreceive	// 1265
+	data8 0				// mq_notify
+	data8 0				// mq_getsetattr
 	data8 0
 	data8 0
 	data8 0							// 1270

arch/ia64/kernel/iosapic.c

@@ -293,7 +293,7 @@ iosapic_set_affinity (unsigned int irq, cpumask_t mask)
 	irq &= (~IA64_IRQ_REDIRECTED);
 	vec = irq_to_vector(irq);
 
-	if (cpus_empty(mask) || vec >= IA64_NUM_VECTORS)
+	if (cpus_empty(mask))
 		return;
 
 	dest = cpu_physical_id(first_cpu(mask));

arch/ia64/kernel/signal.c

@@ -205,6 +205,12 @@ copy_siginfo_to_user (siginfo_t *to, siginfo_t *from)
 			err |= __put_user(from->si_overrun, &to->si_overrun);
 			err |= __put_user(from->si_ptr, &to->si_ptr);
 			break;
+		      case __SI_RT >> 16:	/* Not generated by the kernel as of now.  */
+		      case __SI_MESGQ >> 16:
+			err |= __put_user(from->si_uid, &to->si_uid);
+			err |= __put_user(from->si_pid, &to->si_pid);
+			err |= __put_user(from->si_ptr, &to->si_ptr);
+			break;
 		      case __SI_CHLD >> 16:
 			err |= __put_user(from->si_utime, &to->si_utime);
 			err |= __put_user(from->si_stime, &to->si_stime);
@@ -213,45 +219,11 @@ copy_siginfo_to_user (siginfo_t *to, siginfo_t *from)
 			err |= __put_user(from->si_uid, &to->si_uid);
 			err |= __put_user(from->si_pid, &to->si_pid);
 			break;
-		      /* case __SI_RT: This is not generated by the kernel as of now.  */
 		}
 		return err;
 	}
 }
 
-int
-copy_siginfo_from_user (siginfo_t *to, siginfo_t *from)
-{
-	if (!access_ok(VERIFY_READ, from, sizeof(siginfo_t)))
-		return -EFAULT;
-	if (__copy_from_user(to, from, sizeof(siginfo_t)) != 0)
-		return -EFAULT;
-
-	if (SI_FROMUSER(to))
-		return 0;
-
-	to->si_code &= ~__SI_MASK;
-	if (to->si_code != 0) {
-		switch (to->si_signo) {
-		      case SIGILL: case SIGFPE: case SIGSEGV: case SIGBUS: case SIGTRAP:
-			to->si_code |= __SI_FAULT;
-			break;
-
-		      case SIGCHLD:
-			to->si_code |= __SI_CHLD;
-			break;
-
-		      case SIGPOLL:
-			to->si_code |= __SI_POLL;
-			break;
-
-		      default:
-			break;
-		}
-	}
-	return 0;
-}
-
 long
 ia64_rt_sigreturn (struct sigscratch *scr)
 {
@@ -445,6 +417,7 @@ setup_frame (int sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set,
 	scr->pt.ar_fpsr = FPSR_DEFAULT;			/* reset fpsr for signal handler */
 	scr->pt.cr_iip = tramp_addr;
 	ia64_psr(&scr->pt)->ri = 0;			/* start executing in first slot */
+	ia64_psr(&scr->pt)->be = 0;			/* force little-endian byte-order */
 	/*
 	 * Force the interruption function mask to zero.  This has no effect when a
 	 * system-call got interrupted by a signal (since, in that case, scr->pt_cr_ifs is

arch/ia64/kernel/traps.c

@@ -13,6 +13,7 @@
 #include <linux/sched.h>
 #include <linux/tty.h>
 #include <linux/vt_kern.h>		/* For unblank_screen() */
+#include <linux/module.h>       /* for EXPORT_SYMBOL */
 
 #include <asm/fpswa.h>
 #include <asm/hardirq.h>
@@ -47,6 +48,7 @@ register double f30 asm ("f30"); register double f31 asm ("f31");
 extern spinlock_t timerlist_lock;
 
 fpswa_interface_t *fpswa_interface;
+EXPORT_SYMBOL(fpswa_interface);
 
 void __init
 trap_init (void)

arch/ia64/pci/pci.c

@@ -54,56 +54,33 @@ struct pci_fixup pcibios_fixups[1];
  * synchronization mechanism here.
  */
 
-#define PCI_SAL_ADDRESS(seg, bus, devfn, reg) \
-	((u64)(seg << 24) | (u64)(bus << 16) | \
+#define PCI_SAL_ADDRESS(seg, bus, devfn, reg)	\
+	((u64)(seg << 24) | (u64)(bus << 16) |	\
 	 (u64)(devfn << 8) | (u64)(reg))
 
-static int
-pci_sal_read (int seg, int bus, int devfn, int reg, int len, u32 *value)
-{
-	int result = 0;
-	u64 data = 0;
-
-	if ((seg > 255) || (bus > 255) || (devfn > 255) || (reg > 255))
-		return -EINVAL;
-
-	result = ia64_sal_pci_config_read(PCI_SAL_ADDRESS(seg, bus, devfn, reg), 0, len, &data);
-
-	*value = (u32) data;
-
-	return result;
-}
-
-static int
-pci_sal_write (int seg, int bus, int devfn, int reg, int len, u32 value)
-{
-	if ((seg > 255) || (bus > 255) || (devfn > 255) || (reg > 255))
-		return -EINVAL;
-
-	return ia64_sal_pci_config_write(PCI_SAL_ADDRESS(seg, bus, devfn, reg), 0, len, value);
-}
-
-static struct pci_raw_ops pci_sal_ops = {
-	.read = 	pci_sal_read,
-	.write =	pci_sal_write
-};
-
 /* SAL 3.2 adds support for extended config space. */
 
-#define PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg) \
-	((u64)(seg << 28) | (u64)(bus << 20) | \
+#define PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg)	\
+	((u64)(seg << 28) | (u64)(bus << 20) |		\
 	 (u64)(devfn << 12) | (u64)(reg))
 
 static int
-pci_sal_ext_read (int seg, int bus, int devfn, int reg, int len, u32 *value)
+pci_sal_read (int seg, int bus, int devfn, int reg, int len, u32 *value)
 {
+	u64 addr, mode, data = 0;
 	int result = 0;
-	u64 data = 0;
 
-	if ((seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095))
+	if ((seg > 255) || (bus > 255) || (devfn > 255) || (reg > 4095))
 		return -EINVAL;
 
-	result = ia64_sal_pci_config_read(PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg), 1, len, &data);
+	if ((seg | reg) <= 255) {
+		addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
+		mode = 0;
+	} else {
+		addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
+		mode = 1;
+	}
+	result = ia64_sal_pci_config_read(addr, mode, len, &data);
 
 	*value = (u32) data;
 
@@ -111,46 +88,42 @@ pci_sal_ext_read (int seg, int bus, int devfn, int reg, int len, u32 *value)
 }
 
 static int
-pci_sal_ext_write (int seg, int bus, int devfn, int reg, int len, u32 value)
+pci_sal_write (int seg, int bus, int devfn, int reg, int len, u32 value)
 {
+	u64 addr, mode;
+
 	if ((seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095))
 		return -EINVAL;
 
-	return ia64_sal_pci_config_write(PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg), 1, len, value);
-}
-
-static struct pci_raw_ops pci_sal_ext_ops = {
-	.read = 	pci_sal_ext_read,
-	.write =	pci_sal_ext_write
-};
-
-struct pci_raw_ops *raw_pci_ops = &pci_sal_ops;	/* default to SAL < 3.2 */
-
-static int __init
-pci_set_sal_ops (void)
-{
-	if (sal_revision >= SAL_VERSION_CODE(3, 2)) {
-		printk("Using SAL 3.2 to access PCI config space\n");
-		raw_pci_ops = &pci_sal_ext_ops;
+	if ((seg | reg) <= 255) {
+		addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
+		mode = 0;
+	} else {
+		addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
+		mode = 1;
 	}
-	return 0;
+	return ia64_sal_pci_config_write(addr, mode, len, value);
 }
 
-arch_initcall(pci_set_sal_ops);
+static struct pci_raw_ops pci_sal_ops = {
+	.read = 	pci_sal_read,
+	.write =	pci_sal_write
+};
 
+struct pci_raw_ops *raw_pci_ops = &pci_sal_ops;
 
 static int
 pci_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
 {
 	return raw_pci_ops->read(pci_domain_nr(bus), bus->number,
-			devfn, where, size, value);
+				 devfn, where, size, value);
 }
 
 static int
 pci_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
 {
 	return raw_pci_ops->write(pci_domain_nr(bus), bus->number,
-			devfn, where, size, value);
+				  devfn, where, size, value);
 }
 
 static struct pci_ops pci_root_ops = {

include/asm-ia64/ia32.h

@@ -6,7 +6,7 @@
 #include <asm/ptrace.h>
 #include <asm/signal.h>
 
-#define IA32_NR_syscalls		275 /* length of syscall table */
+#define IA32_NR_syscalls		283 /* length of syscall table */
 
 #ifndef __ASSEMBLY__
 

include/asm-ia64/siginfo.h

@@ -136,8 +136,6 @@ copy_siginfo (siginfo_t *to, siginfo_t *from)
 		memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld));
 }
 
-extern int copy_siginfo_from_user(siginfo_t *to, siginfo_t *from);
-
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_IA64_SIGINFO_H */

include/asm-ia64/unistd.h

@@ -251,6 +251,12 @@
 #define __NR_reserved1			1259	/* reserved for NUMA interface */
 #define __NR_reserved2			1260	/* reserved for NUMA interface */
 #define __NR_reserved3			1261	/* reserved for NUMA interface */
+#define __NR_mq_open			1262
+#define __NR_mq_unlink			1263
+#define __NR_mq_timedsend		1264
+#define __NR_mq_timedreceive		1265
+#define __NR_mq_notify			1266
+#define __NR_mq_getsetattr		1267
 
 #ifdef __KERNEL__