ARM: dts: imx: Add missing #phy-cells to usb-nop-xceiv

"usb-nop-xceiv" is using the phy binding, but is missing #phy-cells
property. This is probably because the binding was the precursor to the phy
binding.

Fixes the following warning in i.MX dts files:

Warning (phys_property): Missing property '#phy-cells' in node ...
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arch/arm/boot/dts/imx25.dtsi

@@ -628,11 +628,13 @@ usbphy {
 		usbphy0: usb-phy@0 {
 			reg = <0>;
 			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
 		};
 
 		usbphy1: usb-phy@1 {
 			reg = <1>;
 			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
 		};
 	};
 };

arch/arm/boot/dts/imx27-pdk.dts

@@ -30,6 +30,7 @@ usbphy0: usbphy@0 {
 			reg = <0>;
 			clocks = <&clks IMX27_CLK_DUMMY>;
 			clock-names = "main_clk";
+			#phy-cells = <0>;
 		};
 	};
 };

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts

@@ -63,6 +63,7 @@ usbphy2: usbphy@2 {
 			vcc-supply = <&reg_5v0>;
 			clocks = <&clks IMX27_CLK_DUMMY>;
 			clock-names = "main_clk";
+			#phy-cells = <0>;
 		};
 	};
 };

arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi

@@ -53,6 +53,7 @@ usbphy0: usbphy@0 {
 			vcc-supply = <&sw3_reg>;
 			clocks = <&clks IMX27_CLK_DUMMY>;
 			clock-names = "main_clk";
+			#phy-cells = <0>;
 		};
 	};
 };

arch/arm/boot/dts/imx35.dtsi

@@ -402,11 +402,13 @@ usbphy {
 		usbphy0: usb-phy@0 {
 			reg = <0>;
 			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
 		};
 
 		usbphy1: usb-phy@1 {
 			reg = <1>;
 			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
 		};
 	};
 };

arch/arm/boot/dts/imx51-babbage.dts

@@ -165,6 +165,7 @@ usbh1phy: usbh1phy@0 {
 			clocks = <&clks IMX5_CLK_DUMMY>;
 			clock-names = "main_clk";
 			reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
+			#phy-cells = <0>;
 		};
 	};
 };

arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts

@@ -94,6 +94,7 @@ usbh1phy: usbh1phy@0 {
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
 			clock-frequency = <19200000>;
+			#phy-cells = <0>;
 		};
 	};
 };

arch/arm/boot/dts/imx51.dtsi

@@ -113,6 +113,7 @@ usbphy0: usbphy@0 {
 			reg = <0>;
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
+			#phy-cells = <0>;
 		};
 	};
 

arch/arm/boot/dts/imx53.dtsi

@@ -303,6 +303,7 @@ usbphy0: usbphy-0 {
 				compatible = "usb-nop-xceiv";
 				clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
 				clock-names = "main_clk";
+				#phy-cells = <0>;
 				status = "okay";
 			};
 
@@ -310,6 +311,7 @@ usbphy1: usbphy-1 {
 				compatible = "usb-nop-xceiv";
 				clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
 				clock-names = "main_clk";
+				#phy-cells = <0>;
 				status = "okay";
 			};
 

arch/arm/boot/dts/imx7d.dtsi

@@ -109,6 +109,7 @@ usbphynop2: usbphynop2 {
 		compatible = "usb-nop-xceiv";
 		clocks = <&clks IMX7D_USB_PHY2_CLK>;
 		clock-names = "main_clk";
+		#phy-cells = <0>;
 	};
 
 	fec2: ethernet@30bf0000 {

arch/arm/boot/dts/imx7s.dtsi

@@ -949,12 +949,14 @@ usbphynop1: usbphynop1 {
 				compatible = "usb-nop-xceiv";
 				clocks = <&clks IMX7D_USB_PHY1_CLK>;
 				clock-names = "main_clk";
+				#phy-cells = <0>;
 			};
 
 			usbphynop3: usbphynop3 {
 				compatible = "usb-nop-xceiv";
 				clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
 				clock-names = "main_clk";
+				#phy-cells = <0>;
 			};
 
 			usdhc1: usdhc@30b40000 {