Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
nexedi
linux
Commits
918a92d3
Commit
918a92d3
authored
May 12, 2004
by
David S. Miller
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
[TG3]: Update LED programming to support 5750.
parent
678e1a68
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
81 additions
and
48 deletions
+81
-48
drivers/net/tg3.c
drivers/net/tg3.c
+63
-33
drivers/net/tg3.h
drivers/net/tg3.h
+18
-15
No files found.
drivers/net/tg3.c
View file @
918a92d3
...
@@ -931,6 +931,8 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
...
@@ -931,6 +931,8 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
mac_mode
=
MAC_MODE_PORT_MODE_TBI
;
mac_mode
=
MAC_MODE_PORT_MODE_TBI
;
}
}
if
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
!=
ASIC_REV_5750
)
tw32
(
MAC_LED_CTRL
,
tp
->
led_ctrl
);
if
(((
power_caps
&
PCI_PM_CAP_PME_D3cold
)
&&
if
(((
power_caps
&
PCI_PM_CAP_PME_D3cold
)
&&
(
tp
->
tg3_flags
&
TG3_FLAG_WOL_ENABLE
)))
(
tp
->
tg3_flags
&
TG3_FLAG_WOL_ENABLE
)))
...
@@ -1385,11 +1387,14 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
...
@@ -1385,11 +1387,14 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
else
else
tg3_writephy
(
tp
,
MII_TG3_IMASK
,
~
0
);
tg3_writephy
(
tp
,
MII_TG3_IMASK
,
~
0
);
if
(
tp
->
led_mode
==
led_mode_three_link
)
if
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5700
||
tg3_writephy
(
tp
,
MII_TG3_EXT_CTRL
,
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5701
)
{
MII_TG3_EXT_CTRL_LNK3_LED_MODE
);
if
(
tp
->
led_ctrl
==
LED_CTRL_MODE_PHY_1
)
else
tg3_writephy
(
tp
,
MII_TG3_EXT_CTRL
,
tg3_writephy
(
tp
,
MII_TG3_EXT_CTRL
,
0
);
MII_TG3_EXT_CTRL_LNK3_LED_MODE
);
else
tg3_writephy
(
tp
,
MII_TG3_EXT_CTRL
,
0
);
}
current_link_up
=
0
;
current_link_up
=
0
;
current_speed
=
SPEED_INVALID
;
current_speed
=
SPEED_INVALID
;
...
@@ -1502,14 +1507,13 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
...
@@ -1502,14 +1507,13 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
tp
->
mac_mode
&=
~
MAC_MODE_LINK_POLARITY
;
tp
->
mac_mode
&=
~
MAC_MODE_LINK_POLARITY
;
if
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5700
)
{
if
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5700
)
{
if
((
tp
->
led_
mode
==
led_mode_link10
)
||
if
((
tp
->
led_
ctrl
==
LED_CTRL_MODE_PHY_2
)
||
(
current_link_up
==
1
&&
(
current_link_up
==
1
&&
tp
->
link_config
.
active_speed
==
SPEED_10
))
tp
->
link_config
.
active_speed
==
SPEED_10
))
tp
->
mac_mode
|=
MAC_MODE_LINK_POLARITY
;
tp
->
mac_mode
|=
MAC_MODE_LINK_POLARITY
;
}
else
{
}
else
{
if
(
current_link_up
==
1
)
if
(
current_link_up
==
1
)
tp
->
mac_mode
|=
MAC_MODE_LINK_POLARITY
;
tp
->
mac_mode
|=
MAC_MODE_LINK_POLARITY
;
tw32
(
MAC_LED_CTRL
,
LED_CTRL_PHY_MODE_1
);
}
}
/* ??? Without this setting Netgear GA302T PHY does not
/* ??? Without this setting Netgear GA302T PHY does not
...
@@ -2043,9 +2047,15 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset)
...
@@ -2043,9 +2047,15 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset)
if
(
current_link_up
==
1
)
{
if
(
current_link_up
==
1
)
{
tp
->
link_config
.
active_speed
=
SPEED_1000
;
tp
->
link_config
.
active_speed
=
SPEED_1000
;
tp
->
link_config
.
active_duplex
=
DUPLEX_FULL
;
tp
->
link_config
.
active_duplex
=
DUPLEX_FULL
;
tw32
(
MAC_LED_CTRL
,
(
tp
->
led_ctrl
|
LED_CTRL_LNKLED_OVERRIDE
|
LED_CTRL_1000MBPS_ON
));
}
else
{
}
else
{
tp
->
link_config
.
active_speed
=
SPEED_INVALID
;
tp
->
link_config
.
active_speed
=
SPEED_INVALID
;
tp
->
link_config
.
active_duplex
=
DUPLEX_INVALID
;
tp
->
link_config
.
active_duplex
=
DUPLEX_INVALID
;
tw32
(
MAC_LED_CTRL
,
(
tp
->
led_ctrl
|
LED_CTRL_LNKLED_OVERRIDE
|
LED_CTRL_TRAFFIC_OVERRIDE
));
}
}
if
(
current_link_up
!=
netif_carrier_ok
(
tp
->
dev
))
{
if
(
current_link_up
!=
netif_carrier_ok
(
tp
->
dev
))
{
...
@@ -5109,7 +5119,8 @@ static int tg3_reset_hw(struct tg3 *tp)
...
@@ -5109,7 +5119,8 @@ static int tg3_reset_hw(struct tg3 *tp)
tw32_f
(
MAC_MI_MODE
,
tp
->
mi_mode
);
tw32_f
(
MAC_MI_MODE
,
tp
->
mi_mode
);
udelay
(
80
);
udelay
(
80
);
tw32
(
MAC_LED_CTRL
,
0
);
tw32
(
MAC_LED_CTRL
,
tp
->
led_ctrl
);
tw32
(
MAC_MI_STAT
,
MAC_MI_STAT_LNKSTAT_ATTN_ENAB
);
tw32
(
MAC_MI_STAT
,
MAC_MI_STAT_LNKSTAT_ATTN_ENAB
);
if
(
tp
->
phy_id
==
PHY_ID_SERDES
)
{
if
(
tp
->
phy_id
==
PHY_ID_SERDES
)
{
tw32_f
(
MAC_RX_MODE
,
RX_MODE_RESET
);
tw32_f
(
MAC_RX_MODE
,
RX_MODE_RESET
);
...
@@ -6697,7 +6708,6 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
...
@@ -6697,7 +6708,6 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
{
{
u32
eeprom_phy_id
,
hw_phy_id_1
,
hw_phy_id_2
;
u32
eeprom_phy_id
,
hw_phy_id_1
,
hw_phy_id_2
;
u32
hw_phy_id
,
hw_phy_id_masked
;
u32
hw_phy_id
,
hw_phy_id_masked
;
enum
phy_led_mode
eeprom_led_mode
;
u32
val
;
u32
val
;
int
i
,
eeprom_signature_found
,
err
;
int
i
,
eeprom_signature_found
,
err
;
...
@@ -6713,11 +6723,10 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
...
@@ -6713,11 +6723,10 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
}
}
eeprom_phy_id
=
PHY_ID_INVALID
;
eeprom_phy_id
=
PHY_ID_INVALID
;
eeprom_led_mode
=
led_mode_auto
;
eeprom_signature_found
=
0
;
eeprom_signature_found
=
0
;
tg3_read_mem
(
tp
,
NIC_SRAM_DATA_SIG
,
&
val
);
tg3_read_mem
(
tp
,
NIC_SRAM_DATA_SIG
,
&
val
);
if
(
val
==
NIC_SRAM_DATA_SIG_MAGIC
)
{
if
(
val
==
NIC_SRAM_DATA_SIG_MAGIC
)
{
u32
nic_cfg
;
u32
nic_cfg
,
led_cfg
;
tg3_read_mem
(
tp
,
NIC_SRAM_DATA_CFG
,
&
nic_cfg
);
tg3_read_mem
(
tp
,
NIC_SRAM_DATA_CFG
,
&
nic_cfg
);
tp
->
nic_sram_data_cfg
=
nic_cfg
;
tp
->
nic_sram_data_cfg
=
nic_cfg
;
...
@@ -6741,20 +6750,53 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
...
@@ -6741,20 +6750,53 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
}
}
}
}
switch
(
nic_cfg
&
NIC_SRAM_DATA_CFG_LED_MODE_MASK
)
{
if
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5750
)
{
case
NIC_SRAM_DATA_CFG_LED_TRIPLE_SPD
:
tg3_read_mem
(
tp
,
NIC_SRAM_DATA_CFG_2
,
&
led_cfg
);
eeprom_led_mode
=
led_mode_three_link
;
led_cfg
&=
(
NIC_SRAM_DATA_CFG_LED_MODE_MASK
|
SHASTA_EXT_LED_MODE_MASK
);
}
else
led_cfg
=
nic_cfg
&
NIC_SRAM_DATA_CFG_LED_MODE_MASK
;
switch
(
led_cfg
)
{
default:
case
NIC_SRAM_DATA_CFG_LED_MODE_PHY_1
:
tp
->
led_ctrl
=
LED_CTRL_MODE_PHY_1
;
break
;
break
;
case
NIC_SRAM_DATA_CFG_LED_
LINK_SPD
:
case
NIC_SRAM_DATA_CFG_LED_
MODE_PHY_2
:
eeprom_led_mode
=
led_mode_link10
;
tp
->
led_ctrl
=
LED_CTRL_MODE_PHY_2
;
break
;
break
;
default
:
case
NIC_SRAM_DATA_CFG_LED_MODE_MAC
:
eeprom_led_mode
=
led_mode_auto
;
tp
->
led_ctrl
=
LED_CTRL_MODE_MAC
;
break
;
break
;
case
SHASTA_EXT_LED_SHARED
:
tp
->
led_ctrl
=
LED_CTRL_MODE_SHARED
;
if
(
tp
->
pci_chip_rev_id
!=
CHIPREV_ID_5750_A0
&&
tp
->
pci_chip_rev_id
!=
CHIPREV_ID_5750_A1
)
tp
->
led_ctrl
|=
(
LED_CTRL_MODE_PHY_1
|
LED_CTRL_MODE_PHY_2
);
break
;
case
SHASTA_EXT_LED_MAC
:
tp
->
led_ctrl
=
LED_CTRL_MODE_SHASTA_MAC
;
break
;
case
SHASTA_EXT_LED_COMBO
:
tp
->
led_ctrl
=
LED_CTRL_MODE_COMBO
;
if
(
tp
->
pci_chip_rev_id
!=
CHIPREV_ID_5750_A0
)
tp
->
led_ctrl
|=
(
LED_CTRL_MODE_PHY_1
|
LED_CTRL_MODE_PHY_2
);
break
;
};
};
if
((
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5700
||
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5701
)
&&
tp
->
pdev
->
subsystem_vendor
==
PCI_VENDOR_ID_DELL
)
tp
->
led_ctrl
=
LED_CTRL_MODE_PHY_2
;
if
(((
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5703
)
||
if
(((
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5703
)
||
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5704
)
||
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5704
)
||
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5705
))
&&
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5705
))
&&
...
@@ -6858,15 +6900,8 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
...
@@ -6858,15 +6900,8 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
err
=
tg3_init_5401phy_dsp
(
tp
);
err
=
tg3_init_5401phy_dsp
(
tp
);
}
}
/* Determine the PHY led mode. */
if
(
!
eeprom_signature_found
)
if
(
tp
->
pdev
->
subsystem_vendor
==
PCI_VENDOR_ID_DELL
)
{
tp
->
led_ctrl
=
LED_CTRL_MODE_PHY_1
;
tp
->
led_mode
=
led_mode_link10
;
}
else
{
tp
->
led_mode
=
led_mode_three_link
;
if
(
eeprom_signature_found
&&
eeprom_led_mode
!=
led_mode_auto
)
tp
->
led_mode
=
eeprom_led_mode
;
}
if
(
tp
->
phy_id
==
PHY_ID_SERDES
)
if
(
tp
->
phy_id
==
PHY_ID_SERDES
)
tp
->
link_config
.
advertising
=
tp
->
link_config
.
advertising
=
...
@@ -7278,11 +7313,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
...
@@ -7278,11 +7313,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if
(
tp
->
phy_id
==
PHY_ID_SERDES
)
{
if
(
tp
->
phy_id
==
PHY_ID_SERDES
)
{
tp
->
tg3_flags
&=
~
TG3_FLAG_USE_MI_INTERRUPT
;
tp
->
tg3_flags
&=
~
TG3_FLAG_USE_MI_INTERRUPT
;
/* And override led_mode in case Dell ever makes
* a fibre board.
*/
tp
->
led_mode
=
led_mode_three_link
;
}
else
{
}
else
{
if
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5700
)
if
(
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5700
)
tp
->
tg3_flags
|=
TG3_FLAG_USE_MI_INTERRUPT
;
tp
->
tg3_flags
|=
TG3_FLAG_USE_MI_INTERRUPT
;
...
@@ -7299,7 +7329,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
...
@@ -7299,7 +7329,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
else
else
tp
->
tg3_flags
&=
~
TG3_FLAG_USE_LINKCHG_REG
;
tp
->
tg3_flags
&=
~
TG3_FLAG_USE_LINKCHG_REG
;
/* The led_
mode
is set during tg3_phy_probe, here we might
/* The led_
ctrl
is set during tg3_phy_probe, here we might
* have to force the link status polling mechanism based
* have to force the link status polling mechanism based
* upon subsystem IDs.
* upon subsystem IDs.
*/
*/
...
...
drivers/net/tg3.h
View file @
918a92d3
...
@@ -343,9 +343,12 @@
...
@@ -343,9 +343,12 @@
#define LED_CTRL_100MBPS_STATUS 0x00000100
#define LED_CTRL_100MBPS_STATUS 0x00000100
#define LED_CTRL_10MBPS_STATUS 0x00000200
#define LED_CTRL_10MBPS_STATUS 0x00000200
#define LED_CTRL_TRAFFIC_STATUS 0x00000400
#define LED_CTRL_TRAFFIC_STATUS 0x00000400
#define LED_CTRL_MAC_MODE 0x00000000
#define LED_CTRL_MODE_MAC 0x00000000
#define LED_CTRL_PHY_MODE_1 0x00000800
#define LED_CTRL_MODE_PHY_1 0x00000800
#define LED_CTRL_PHY_MODE_2 0x00001000
#define LED_CTRL_MODE_PHY_2 0x00001000
#define LED_CTRL_MODE_SHASTA_MAC 0x00002000
#define LED_CTRL_MODE_SHARED 0x00004000
#define LED_CTRL_MODE_COMBO 0x00008000
#define LED_CTRL_BLINK_RATE_MASK 0x7ff80000
#define LED_CTRL_BLINK_RATE_MASK 0x7ff80000
#define LED_CTRL_BLINK_RATE_SHIFT 19
#define LED_CTRL_BLINK_RATE_SHIFT 19
#define LED_CTRL_BLINK_PER_OVERRIDE 0x00080000
#define LED_CTRL_BLINK_PER_OVERRIDE 0x00080000
...
@@ -1367,11 +1370,9 @@
...
@@ -1367,11 +1370,9 @@
#define NIC_SRAM_DATA_CFG 0x00000b58
#define NIC_SRAM_DATA_CFG 0x00000b58
#define NIC_SRAM_DATA_CFG_LED_MODE_MASK 0x0000000c
#define NIC_SRAM_DATA_CFG_LED_MODE_MASK 0x0000000c
#define NIC_SRAM_DATA_CFG_LED_MODE_UNKNOWN 0x00000000
#define NIC_SRAM_DATA_CFG_LED_MODE_MAC 0x00000000
#define NIC_SRAM_DATA_CFG_LED_TRIPLE_SPD 0x00000004
#define NIC_SRAM_DATA_CFG_LED_MODE_PHY_1 0x00000004
#define NIC_SRAM_DATA_CFG_LED_OPEN_DRAIN 0x00000004
#define NIC_SRAM_DATA_CFG_LED_MODE_PHY_2 0x00000008
#define NIC_SRAM_DATA_CFG_LED_LINK_SPD 0x00000008
#define NIC_SRAM_DATA_CFG_LED_OUTPUT 0x00000008
#define NIC_SRAM_DATA_CFG_PHY_TYPE_MASK 0x00000030
#define NIC_SRAM_DATA_CFG_PHY_TYPE_MASK 0x00000030
#define NIC_SRAM_DATA_CFG_PHY_TYPE_UNKNOWN 0x00000000
#define NIC_SRAM_DATA_CFG_PHY_TYPE_UNKNOWN 0x00000000
#define NIC_SRAM_DATA_CFG_PHY_TYPE_COPPER 0x00000010
#define NIC_SRAM_DATA_CFG_PHY_TYPE_COPPER 0x00000010
...
@@ -1407,6 +1408,14 @@
...
@@ -1407,6 +1408,14 @@
#define NIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14
#define NIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14
#define NIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18
#define NIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18
#define NIC_SRAM_DATA_CFG_2 0x00000d38
#define SHASTA_EXT_LED_MODE_MASK 0x00018000
#define SHASTA_EXT_LED_LEGACY 0x00000000
#define SHASTA_EXT_LED_SHARED 0x00008000
#define SHASTA_EXT_LED_MAC 0x00010000
#define SHASTA_EXT_LED_COMBO 0x00018000
#define NIC_SRAM_RX_MINI_BUFFER_DESC 0x00001000
#define NIC_SRAM_RX_MINI_BUFFER_DESC 0x00001000
#define NIC_SRAM_DMA_DESC_POOL_BASE 0x00002000
#define NIC_SRAM_DMA_DESC_POOL_BASE 0x00002000
...
@@ -1768,12 +1777,6 @@ struct tg3_hw_stats {
...
@@ -1768,12 +1777,6 @@ struct tg3_hw_stats {
u8
__reserved4
[
0xb00
-
0x9c0
];
u8
__reserved4
[
0xb00
-
0x9c0
];
};
};
enum
phy_led_mode
{
led_mode_auto
,
led_mode_three_link
,
led_mode_link10
};
/* 'mapping' is superfluous as the chip does not write into
/* 'mapping' is superfluous as the chip does not write into
* the tx/rx post rings so we could just fetch it from there.
* the tx/rx post rings so we could just fetch it from there.
* But the cache behavior is better how we are doing it now.
* But the cache behavior is better how we are doing it now.
...
@@ -2032,7 +2035,7 @@ struct tg3 {
...
@@ -2032,7 +2035,7 @@ struct tg3 {
#define PHY_REV_BCM5401_C0 0x6
#define PHY_REV_BCM5401_C0 0x6
#define PHY_REV_BCM5411_X0 0x1
/* Found on Netgear GA302T */
#define PHY_REV_BCM5411_X0 0x1
/* Found on Netgear GA302T */
enum
phy_led_mode
led_mode
;
u32
led_ctrl
;
char
board_part_number
[
24
];
char
board_part_number
[
24
];
u32
nic_sram_data_cfg
;
u32
nic_sram_data_cfg
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment