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Commit 92a2a8cb authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'gemini-dts-1' of... 

Merge tag 'gemini-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

Pull "Gemini DTS updates for ARM SoC take one" from Linus Walleij:

* tag 'gemini-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: gemini: add pin control set-up for the SoC
  ARM: dts: Add DTS file for D-Link DIR-685
  ARM: dts: gemini: Switch to using macros
parents e3015684 f328c2ea
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arch/arm/boot/dts/Makefile
View file @ 92a2a8cb
......@@ -180,6 +180,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5440-ssdk5440.dtb \
exynos5800-peach-pi.dtb
dtb-$(CONFIG_ARCH_GEMINI) += \
gemini-dlink-dir-685.dtb \
gemini-nas4220b.dtb \
gemini-rut1xx.dtb \
gemini-sq201.dtb \
......
arch/arm/boot/dts/gemini-dlink-dir-685.dts 0 → 100644
View file @ 92a2a8cb
/*
* Device Tree file for D-Link DIR-685 Xtreme N Storage Router
*/
/dts-v1/;
#include "gemini.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "D-Link DIR-685 Xtreme N Storage Router";
compatible = "dlink,dir-685", "cortina,gemini";
#address-cells = <1>;
#size-cells = <1>;
memory {
/* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
chosen {
stdout-path = "uart0:115200n8";
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button-esc {
debounce_interval = <50>;
wakeup-source;
linux,code = <KEY_ESC>;
label = "reset";
/* Collides with LPC_LAD[0], UART DCD, SSP 97RST */
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
button-eject {
debounce_interval = <50>;
wakeup-source;
linux,code = <KEY_EJECTCD>;
label = "unmount";
/* Collides with LPC LFRAME, UART RTS, SSP TXD */
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led-wps {
label = "dir685:blue:WPS";
/* Collides with ICE */
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
/*
* These two LEDs are on the side of the device.
* For electrical reasons, both LEDs cannot be active
* at the same time so only blue or orange can on at
* one time. Enabling both makes the LED go dark.
* The LEDs both sit inside the unmount button and the
* label on the case says "unmount".
*/
led-blue-hd {
label = "dir685:blue:HD";
/* Collides with LPC_SERIRQ, UART DTR, SSP FSC pins */
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-orange-hd {
label = "dir685:orange:HD";
/* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
/*
* This is a Sunon Maglev GM0502PFV2-8 cooling fan @10000 RPM.
* Since the platform has no temperature sensor, this is controlled
* from userspace by using the hard disks S.M.A.R.T. temperature
* sensor. It is turned on when the temperature exceeds 46 degrees
* and turned off when the temperatures goes below 41 degrees
* (celsius).
*/
gpio-fan {
compatible = "gpio-fan";
/* Collides with IDE */
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = <0 0>, <10000 1>;
#cooling-cells = <2>;
};
/*
* The touchpad input is connected to a GPIO bit-banged
* I2C bus.
*/
gpio-i2c {
compatible = "i2c-gpio";
/* Collides with ICE */
gpios = <&gpio0 5 0>, /* SDA */
<&gpio0 6 0>; /* SCL */
#address-cells = <1>;
#size-cells = <0>;
touchkeys@26 {
compatible = "dlink,dir685-touchkeys";
reg = <0x26>;
interrupt-parent = <&gpio0>;
/* Collides with NAND flash */
interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
};
};
soc {
flash@30000000 {
status = "okay";
/* 32MB of flash */
reg = <0x30000000 0x02000000>;
/*
* This "RedBoot" is the Storlink derivative.
*/
partition@0 {
label = "RedBoot";
reg = <0x00000000 0x00040000>;
read-only;
};
/*
* Between the boot loader and the rootfs is the kernel
* in a custom Storlink format flashed from the boot
* menu. The rootfs is in squashfs format.
*/
partition@1800c0 {
label = "rootfs";
reg = <0x001800c0 0x01dbff40>;
read-only;
};
partition@1f40000 {
label = "upgrade";
reg = <0x01f40000 0x00040000>;
read-only;
};
partition@1f80000 {
label = "rgdb";
reg = <0x01f80000 0x00040000>;
read-only;
};
/*
* This partition contains MAC addresses for WAN,
* WLAN and LAN, and the country code (for wireless
* I guess).
*/
partition@1fc0000 {
label = "nvram";
reg = <0x01fc0000 0x00020000>;
read-only;
};
partition@1fe0000 {
label = "LangPack";
reg = <0x01fe0000 0x00020000>;
read-only;
};
};
syscon: syscon@40000000 {
pinctrl {
/*
* gpio0bgrp cover line 5, 6 used by TK I2C
* gpio0bgrp cover line 7 used by WPS LED
* gpio0cgrp cover line 8, 13 used by keys
* and 11, 12 used by the HD LEDs
* gpio0egrp cover line 16 used by VDISP
* gpio0fgrp cover line 17 used by TK IRQ
* gpio0ggrp cover line 20 used by panel CS
* gpio0hgrp cover line 21,22 used by RTL8366RB
*/
gpio0_default_pins: pinctrl-gpio0 {
mux {
function = "gpio0";
groups = "gpio0bgrp",
"gpio0cgrp",
"gpio0egrp",
"gpio0fgrp",
"gpio0ggrp",
"gpio0hgrp";
};
};
/*
* gpio1bgrp cover line 5,8,7 used by panel SPI
* also line 6 used by the fan
*
*/
gpio1_default_pins: pinctrl-gpio1 {
mux {
function = "gpio1";
groups = "gpio1bgrp";
};
};
};
};
sata: sata@46000000 {
cortina,gemini-ata-muxmode = <0>;
cortina,gemini-enable-sata-bridge;
status = "okay";
};
gpio0: gpio@4d000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_default_pins>;
};
gpio1: gpio@4e000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_default_pins>;
};
pci@50000000 {
status = "okay";
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map =
<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
<0x4800 0 0 2 &pci_intc 1>,
<0x4800 0 0 3 &pci_intc 2>,
<0x4800 0 0 4 &pci_intc 3>,
<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
<0x5000 0 0 2 &pci_intc 2>,
<0x5000 0 0 3 &pci_intc 3>,
<0x5000 0 0 4 &pci_intc 0>,
<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
<0x5800 0 0 2 &pci_intc 3>,
<0x5800 0 0 3 &pci_intc 0>,
<0x5800 0 0 4 &pci_intc 1>,
<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
<0x6000 0 0 2 &pci_intc 0>,
<0x6000 0 0 3 &pci_intc 1>,
<0x6000 0 0 4 &pci_intc 2>;
};
ata@63000000 {
status = "okay";
};
};
};
arch/arm/boot/dts/gemini-nas4220b.dts
View file @ 92a2a8cb
......@@ -33,6 +33,7 @@ button@29 {
wakeup-source;
linux,code = <KEY_SETUP>;
label = "Backup button";
/* Conflict with TVC */
gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
};
button@31 {
......@@ -40,6 +41,7 @@ button@31 {
wakeup-source;
linux,code = <KEY_RESTART>;
label = "Softreset button";
/* Conflict with TVC */
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
};
};
......@@ -48,11 +50,13 @@ leds {
compatible = "gpio-leds";
led@28 {
label = "nas4220b:orange:hdd";
/* Conflict with TVC */
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@30 {
label = "nas4220b:green:os";
/* Conflict with TVC */
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
......@@ -99,12 +103,32 @@ partition@fe0000 {
};
};
syscon: syscon@40000000 {
pinctrl {
/*
* gpio1dgrp cover line 28-31 otherwise used
* by TVC.
*/
gpio1_default_pins: pinctrl-gpio1 {
mux {
function = "gpio1";
groups = "gpio1dgrp";
};
};
};
};
sata: sata@46000000 {
cortina,gemini-ata-muxmode = <0>;
cortina,gemini-enable-sata-bridge;
status = "okay";
};
gpio1: gpio@4e000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_default_pins>;
};
ata@63000000 {
status = "okay";
};
......
arch/arm/boot/dts/gemini-rut1xx.dts
View file @ 92a2a8cb
......@@ -33,6 +33,7 @@ button@28 {
wakeup-source;
linux,code = <KEY_SETUP>;
label = "Reset to defaults";
/* Conflict with TVC */
gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
};
};
......@@ -42,12 +43,14 @@ leds {
led@7 {
/* FIXME: add the LED color */
label = "rut1xx::gsm";
/* Conflict with ICE */
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@31 {
/* FIXME: add the LED color */
label = "rut1xx::power";
/* Conflict with NAND CE0 */
gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "heartbeat";
......@@ -61,5 +64,41 @@ flash@30000000 {
reg = <0x30000000 0x00800000>;
/* TODO: add flash partitions here */
};
syscon: syscon@40000000 {
pinctrl {
/*
* gpio0bgrp cover line 7 used by GSM LED
* gpio0fgrp cover line 17 used by power LED
*/
gpio0_default_pins: pinctrl-gpio0 {
mux {
function = "gpio0";
groups = "gpio0bgrp",
"gpio0fgrp";
};
};
/*
* gpio1dgrp cover line 28-31 otherwise used
* by TVC.
*/
gpio1_default_pins: pinctrl-gpio1 {
mux {
function = "gpio1";
groups = "gpio1dgrp";
};
};
};
};
gpio0: gpio@4d000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_default_pins>;
};
gpio1: gpio@4e000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_default_pins>;
};
};
};
arch/arm/boot/dts/gemini-sq201.dts
View file @ 92a2a8cb
......@@ -33,6 +33,7 @@ button@18 {
wakeup-source;
linux,code = <KEY_SETUP>;
label = "factory reset";
/* Conflict with NAND flash */
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
};
};
......@@ -41,12 +42,14 @@ leds {
compatible = "gpio-leds";
led@20 {
label = "sq201:green:info";
/* Conflict with parallel flash */
gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led@31 {
label = "sq201:green:usb";
/* Conflict with parallel and NAND flash */
gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "usb-host";
......@@ -55,7 +58,15 @@ led@31 {
soc {
flash@30000000 {
status = "okay";
/*
* Flash access can be enabled, with the side effect
* of disabling access to GPIO LED on GPIO0[20] which
* reuse one of the parallel flash chip select lines.
* Also the default firmware on the machine has the
* problem that since it uses the flash, the two LEDS
* on the right become numb.
*/
/* status = "okay"; */
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
......@@ -93,12 +104,35 @@ partition@fe0000 {
};
};
syscon: syscon@40000000 {
pinctrl {
/*
* gpio0fgrp cover line 18 used by reset button
* gpio0ggrp cover line 20 used by info LED
* gpio0kgrp cover line 31 used by USB LED
*/
gpio0_default_pins: pinctrl-gpio0 {
mux {
function = "gpio0";
groups = "gpio0fgrp",
"gpio0ggrp",
"gpio0kgrp";
};
};
};
};
sata: sata@46000000 {
cortina,gemini-ata-muxmode = <0>;
cortina,gemini-enable-sata-bridge;
status = "okay";
};
gpio0: gpio@4d000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_default_pins>;
};
pci@50000000 {
status = "okay";
interrupt-map-mask = <0xf800 0 0 7>;
......
arch/arm/boot/dts/gemini-wbd111.dts
View file @ 92a2a8cb
......@@ -33,6 +33,7 @@ button@5 {
wakeup-source;
linux,code = <KEY_SETUP>;
label = "reset";
/* Conflict with ICE */
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
};
};
......@@ -42,21 +43,25 @@ leds {
led@1 {
label = "wbd111:red:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@2 {
label = "wbd111:green:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@3 {
label = "wbd111:red:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@5 {
label = "wbd111:green:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
......@@ -98,5 +103,26 @@ partition@7e0000 {
read-only;
};
};
syscon: syscon@40000000 {
pinctrl {
/*
* gpio0agrp cover line 0-4
* gpio0bgrp cover line 5
*/
gpio0_default_pins: pinctrl-gpio0 {
mux {
function = "gpio0";
groups = "gpio0agrp",
"gpio0bgrp";
};
};
};
};
gpio0: gpio@4d000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_default_pins>;
};
};
};
arch/arm/boot/dts/gemini-wbd222.dts
View file @ 92a2a8cb
......@@ -33,6 +33,7 @@ button@5 {
wakeup-source;
linux,code = <KEY_SETUP>;
label = "reset";
/* Conflict with ICE */
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
};
};
......@@ -42,21 +43,25 @@ leds {
led@1 {
label = "wbd111:red:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@2 {
label = "wbd111:green:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@3 {
label = "wbd111:red:L4";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@5 {
label = "wbd111:green:L3";
/* Conflict with TVC and extended parallel flash */
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
......@@ -98,5 +103,26 @@ partition@7e0000 {
read-only;
};
};
syscon: syscon@40000000 {
pinctrl {
/*
* gpio0agrp cover line 0-4
* gpio0bgrp cover line 5
*/
gpio0_default_pins: pinctrl-gpio0 {
mux {
function = "gpio0";
groups = "gpio0agrp",
"gpio0bgrp";
};
};
};
};
gpio0: gpio@4d000000 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_default_pins>;
};
};
};
arch/arm/boot/dts/gemini.dtsi
View file @ 92a2a8cb
......@@ -5,6 +5,8 @@
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/cortina,gemini-clock.h>
#include <dt-bindings/reset/cortina,gemini-reset.h>
#include <dt-bindings/gpio/gpio.h>
/ {
......@@ -18,6 +20,8 @@ soc {
flash@30000000 {
compatible = "cortina,gemini-flash", "cfi-flash";
syscon = <&syscon>;
pinctrl-names = "default";
pinctrl-0 = <&pflash_default_pins>;
bank-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
......@@ -39,22 +43,123 @@ syscon-reboot {
/* RESET_GLOBAL | RESET_CPU1 */
mask = <0xC0000000>;
};
pinctrl {
compatible = "cortina,gemini-pinctrl";
regmap = <&syscon>;
/* Hog the DRAM pins */
pinctrl-names = "default";
pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
<&vcontrol_default_pins>;
dram_default_pins: pinctrl-dram {
mux {
function = "dram";
groups = "dramgrp";
};
};
rtc_default_pins: pinctrl-rtc {
mux {
function = "rtc";
groups = "rtcgrp";
};
};
power_default_pins: pinctrl-power {
mux {
function = "power";
groups = "powergrp";
};
};
cir_default_pins: pinctrl-cir {
mux {
function = "cir";
groups = "cirgrp";
};
};
system_default_pins: pinctrl-system {
mux {
function = "system";
groups = "systemgrp";
};
};
vcontrol_default_pins: pinctrl-vcontrol {
mux {
function = "vcontrol";
groups = "vcontrolgrp";
};
};
ice_default_pins: pinctrl-ice {
mux {
function = "ice";
groups = "icegrp";
};
};
uart_default_pins: pinctrl-uart {
mux {
function = "uart";
groups = "uartrxtxgrp";
};
};
pflash_default_pins: pinctrl-pflash {
mux {
function = "pflash";
groups = "pflashgrp";
};
};
usb_default_pins: pinctrl-usb {
mux {
function = "usb";
groups = "usbgrp";
};
};
gmii_default_pins: pinctrl-gmii {
mux {
function = "gmii";
groups = "gmiigrp";
};
};
pci_default_pins: pinctrl-pci {
mux {
function = "pci";
groups = "pcigrp";
};
};
sata_default_pins: pinctrl-sata {
mux {
function = "sata";
groups = "satagrp";
};
};
/* Activate both groups of pins for this state */
sata_and_ide_pins: pinctrl-sata-ide {
mux0 {
function = "sata";
groups = "satagrp";
};
mux1 {
function = "ide";
groups = "idegrp";
};
};
};
};
watchdog@41000000 {
compatible = "cortina,gemini-watchdog";
reg = <0x41000000 0x1000>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon 23>;
clocks = <&syscon 2>;
resets = <&syscon GEMINI_RESET_WDOG>;
clocks = <&syscon GEMINI_CLK_APB>;
};
uart0: serial@42000000 {
compatible = "ns16550a";
reg = <0x42000000 0x100>;
resets = <&syscon 18>;
clocks = <&syscon 6>;
resets = <&syscon GEMINI_RESET_UART>;
clocks = <&syscon GEMINI_CLK_UART>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart_default_pins>;
reg-shift = <2>;
};
......@@ -65,9 +170,9 @@ timer@43000000 {
interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
<15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
<16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
resets = <&syscon 17>;
resets = <&syscon GEMINI_RESET_TIMER>;
/* APB clock or RTC clock */
clocks = <&syscon 2>, <&syscon 0>;
clocks = <&syscon GEMINI_CLK_APB>, <&syscon GEMINI_CLK_RTC>;
clock-names = "PCLK", "EXTCLK";
syscon = <&syscon>;
};
......@@ -76,20 +181,30 @@ rtc@45000000 {
compatible = "cortina,gemini-rtc";
reg = <0x45000000 0x100>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon 16>;
clocks = <&syscon 2>, <&syscon 0>;
resets = <&syscon GEMINI_RESET_RTC>;
clocks = <&syscon GEMINI_CLK_APB>, <&syscon GEMINI_CLK_RTC>;
clock-names = "PCLK", "EXTCLK";
pinctrl-names = "default";
pinctrl-0 = <&rtc_default_pins>;
};
sata: sata@46000000 {
compatible = "cortina,gemini-sata-bridge";
reg = <0x46000000 0x100>;
resets = <&syscon 26>,
<&syscon 27>;
resets = <&syscon GEMINI_RESET_SATA0>,
<&syscon GEMINI_RESET_SATA1>;
reset-names = "sata0", "sata1";
clocks = <&syscon 10>,
<&syscon 11>;
clocks = <&syscon GEMINI_CLK_GATE_SATA0>,
<&syscon GEMINI_CLK_GATE_SATA1>;
clock-names = "SATA0_PCLK", "SATA1_PCLK";
/*
* This defines the special "ide" state that needs
* to be explicitly enabled to enable the IDE pins,
* as these pins are normally used for other things.
*/
pinctrl-names = "default", "ide";
pinctrl-0 = <&sata_default_pins>;
pinctrl-1 = <&sata_and_ide_pins>;
syscon = <&syscon>;
status = "disabled";
};
......@@ -97,7 +212,7 @@ sata: sata@46000000 {
intcon: interrupt-controller@48000000 {
compatible = "faraday,ftintc010";
reg = <0x48000000 0x1000>;
resets = <&syscon 14>;
resets = <&syscon GEMINI_RESET_INTCON0>;
interrupt-controller;
#interrupt-cells = <2>;
};
......@@ -106,14 +221,16 @@ power-controller@4b000000 {
compatible = "cortina,gemini-power-controller";
reg = <0x4b000000 0x100>;
interrupts = <26 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&power_default_pins>;
};
gpio0: gpio@4d000000 {
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
reg = <0x4d000000 0x100>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon 20>;
clocks = <&syscon 2>;
resets = <&syscon GEMINI_RESET_GPIO0>;
clocks = <&syscon GEMINI_CLK_APB>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
......@@ -124,8 +241,8 @@ gpio1: gpio@4e000000 {
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
reg = <0x4e000000 0x100>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon 21>;
clocks = <&syscon 2>;
resets = <&syscon GEMINI_RESET_GPIO1>;
clocks = <&syscon GEMINI_CLK_APB>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
......@@ -136,8 +253,8 @@ gpio2: gpio@4f000000 {
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
reg = <0x4f000000 0x100>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon 22>;
clocks = <&syscon 2>;
resets = <&syscon GEMINI_RESET_GPIO2>;
clocks = <&syscon GEMINI_CLK_APB>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
......@@ -151,9 +268,11 @@ pci@50000000 {
* to configure the host bridge.
*/
reg = <0x50000000 0x100>;
resets = <&syscon 7>;
clocks = <&syscon 15>, <&syscon 4>;
resets = <&syscon GEMINI_RESET_PCI>;
clocks = <&syscon GEMINI_CLK_GATE_PCI>, <&syscon GEMINI_CLK_PCI>;
clock-names = "PCLK", "PCICLK";
pinctrl-names = "default";
pinctrl-0 = <&pci_default_pins>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
......@@ -193,8 +312,8 @@ ata@63000000 {
compatible = "cortina,gemini-pata", "faraday,ftide010";
reg = <0x63000000 0x1000>;
interrupts = <4 IRQ_TYPE_EDGE_RISING>;
resets = <&syscon 2>;
clocks = <&syscon 14>;
resets = <&syscon GEMINI_RESET_IDE>;
clocks = <&syscon GEMINI_CLK_GATE_IDE>;
clock-names = "PCLK";
sata = <&sata>;
status = "disabled";
......@@ -204,8 +323,8 @@ ata@63400000 {
compatible = "cortina,gemini-pata", "faraday,ftide010";
reg = <0x63400000 0x1000>;
interrupts = <5 IRQ_TYPE_EDGE_RISING>;
resets = <&syscon 2>;
clocks = <&syscon 14>;
resets = <&syscon GEMINI_RESET_IDE>;
clocks = <&syscon GEMINI_CLK_GATE_IDE>;
clock-names = "PCLK";
sata = <&sata>;
status = "disabled";
......@@ -217,8 +336,8 @@ dma-controller@67000000 {
arm,primecell-periphid = <0x0003b080>;
reg = <0x67000000 0x1000>;
interrupts = <9 IRQ_TYPE_EDGE_RISING>;
resets = <&syscon 10>;
clocks = <&syscon 1>;
resets = <&syscon GEMINI_RESET_DMAC>;
clocks = <&syscon GEMINI_CLK_AHB>;
clock-names = "apb_pclk";
/* Bus interface AHB1 (AHB0) is totally tilted */
lli-bus-interface-ahb2;
......
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