Commit 950addfa authored by David S. Miller's avatar David S. Miller

Merge davem@nuts.davemloft.net:/disk1/BK/sparc-2.6

into kernel.bkbits.net:/home/davem/sparc-2.6
parents 4f0fdda0 66467abe
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.9-rc1
# Thu Sep 2 23:38:33 2004
# Linux kernel version: 2.6.9-rc2
# Thu Sep 16 14:44:26 2004
#
CONFIG_64BIT=y
CONFIG_MMU=y
CONFIG_TIME_INTERPOLATION=y
#
# Code maturity level options
......@@ -15,6 +16,7 @@ CONFIG_CLEAN_COMPILE=y
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
......@@ -1077,6 +1079,7 @@ CONFIG_SERIO_I8042=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PARKBD is not set
CONFIG_SERIO_PCIPS2=m
CONFIG_SERIO_RAW=m
#
# Input Device Drivers
......
......@@ -7,7 +7,7 @@
#include <asm/io.h>
#include <asm/byteorder.h>
void outsb(unsigned long addr, const void *src, unsigned long count)
void outsb(void __iomem *addr, const void *src, unsigned long count)
{
const u8 *p = src;
......@@ -15,7 +15,7 @@ void outsb(unsigned long addr, const void *src, unsigned long count)
outb(*p++, addr);
}
void outsw(unsigned long addr, const void *src, unsigned long count)
void outsw(void __iomem *addr, const void *src, unsigned long count)
{
if(count) {
u16 *ps = (u16 *)src;
......@@ -44,7 +44,7 @@ void outsw(unsigned long addr, const void *src, unsigned long count)
}
}
void outsl(unsigned long addr, const void *src, unsigned long count)
void outsl(void __iomem *addr, const void *src, unsigned long count)
{
if(count) {
if((((u64)src) & 0x3) == 0) {
......@@ -119,7 +119,7 @@ void outsl(unsigned long addr, const void *src, unsigned long count)
}
}
void insb(unsigned long addr, void *dst, unsigned long count)
void insb(void __iomem *addr, void *dst, unsigned long count)
{
if(count) {
u32 *pi;
......@@ -144,7 +144,7 @@ void insb(unsigned long addr, void *dst, unsigned long count)
}
}
void insw(unsigned long addr, void *dst, unsigned long count)
void insw(void __iomem *addr, void *dst, unsigned long count)
{
if(count) {
u16 *ps = dst;
......@@ -169,7 +169,7 @@ void insw(unsigned long addr, void *dst, unsigned long count)
}
}
void insl(unsigned long addr, void *dst, unsigned long count)
void insl(void __iomem *addr, void *dst, unsigned long count)
{
if(count) {
if((((unsigned long)dst) & 0x3) == 0) {
......
......@@ -81,29 +81,29 @@ do { (s)->imask = (i); \
* That's why here are the following inline functions...
*/
typedef unsigned long xram_p;
typedef void __iomem *xram_p;
/* Get 32bit number from XRAM */
static inline u32 xram_get_32 (xram_p x)
static inline u32 xram_get_32(xram_p x)
{
return ((sbus_readw(x + 0x00UL) << 16) |
(sbus_readw(x + 0x02UL)));
}
/* Like the above, but when we don't care about the high 16 bits */
static inline u32 xram_get_32low (xram_p x)
static inline u32 xram_get_32low(xram_p x)
{
return (u32) sbus_readw(x + 0x02UL);
}
static inline u16 xram_get_16 (xram_p x)
static inline u16 xram_get_16(xram_p x)
{
return sbus_readw(x);
}
static inline u8 xram_get_8 (xram_p x)
static inline u8 xram_get_8(xram_p x)
{
if (x & (xram_p)0x1) {
if ((unsigned long)x & 0x1UL) {
x = x - 1;
return (u8) sbus_readw(x);
} else {
......@@ -111,7 +111,7 @@ static inline u8 xram_get_8 (xram_p x)
}
}
static inline void xram_copy_from (void *p, xram_p x, int len)
static inline void xram_copy_from(void *p, xram_p x, int len)
{
for (len >>= 2; len > 0; len--, x += sizeof(u32)) {
u32 val, *p32 = p;
......@@ -123,7 +123,7 @@ static inline void xram_copy_from (void *p, xram_p x, int len)
}
}
static inline void xram_copy_to (xram_p x, void *p, int len)
static inline void xram_copy_to(xram_p x, void *p, int len)
{
for (len >>= 2; len > 0; len--, x += sizeof(u32)) {
u32 tmp, *p32 = p;
......@@ -135,7 +135,7 @@ static inline void xram_copy_to (xram_p x, void *p, int len)
}
}
static inline void xram_bzero (xram_p x, int len)
static inline void xram_bzero(xram_p x, int len)
{
for (len >>= 1; len > 0; len--, x += sizeof(u16))
sbus_writew(0, x);
......@@ -274,7 +274,7 @@ struct soc {
soc_cq req[2]; /* Request CQs */
soc_cq rsp[2]; /* Response CQs */
int soc_no;
unsigned long regs;
void __iomem *regs;
xram_p xram;
fc_wwn wwn;
u32 imask; /* Our copy of regs->imask */
......
......@@ -60,7 +60,7 @@ static char *version =
#define for_each_socal(s) for (s = socals; s; s = s->next)
struct socal *socals = NULL;
static void socal_copy_from_xram(void *d, unsigned long xram, long size)
static void socal_copy_from_xram(void *d, void __iomem *xram, long size)
{
u32 *dp = (u32 *) d;
while (size) {
......@@ -70,7 +70,7 @@ static void socal_copy_from_xram(void *d, unsigned long xram, long size)
}
}
static void socal_copy_to_xram(unsigned long xram, void *s, long size)
static void socal_copy_to_xram(void __iomem *xram, void *s, long size)
{
u32 *sp = (u32 *) s;
while (size) {
......
......@@ -295,9 +295,9 @@ struct socal {
socal_cq req[4]; /* Request CQs */
socal_cq rsp[4]; /* Response CQs */
int socal_no;
unsigned long regs;
unsigned long xram;
unsigned long eeprom;
void __iomem *regs;
void __iomem *xram;
void __iomem *eeprom;
fc_wwn wwn;
u32 imask; /* Our copy of regs->imask */
u32 cfg; /* Our copy of regs->cfg */
......
......@@ -18,7 +18,7 @@ static int i8042_aux_irq = -1;
#define I8042_AUX_PHYS_DESC "sparcps2/serio1"
#define I8042_MUX_PHYS_DESC "sparcps2/serio%d"
static unsigned long kbd_iobase;
static void __iomem *kbd_iobase;
#define I8042_COMMAND_REG (kbd_iobase + 0x64UL)
#define I8042_DATA_REG (kbd_iobase + 0x60UL)
......@@ -64,7 +64,7 @@ static int i8042_platform_init(void)
if (strncmp(prop, "SUNW,JavaStation-1", len) == 0) {
/* Hardcoded values for MrCoffee. */
i8042_kbd_irq = i8042_aux_irq = 13 | 0x20;
kbd_iobase = (unsigned long) ioremap(0x71300060, 8);
kbd_iobase = ioremap(0x71300060, 8);
if (!kbd_iobase)
return -1;
} else {
......@@ -85,7 +85,7 @@ static int i8042_platform_init(void)
if (!strcmp(child->prom_name, OBP_PS2KBD_NAME1) ||
!strcmp(child->prom_name, OBP_PS2KBD_NAME2)) {
i8042_kbd_irq = child->irqs[0];
kbd_iobase = (unsigned long)
kbd_iobase =
ioremap(child->resource[0].start, 8);
}
if (!strcmp(child->prom_name, OBP_PS2MS_NAME1) ||
......@@ -109,7 +109,7 @@ static int i8042_platform_init(void)
static inline void i8042_platform_exit(void)
{
#ifdef CONFIG_PCI
iounmap((void *)kbd_iobase);
iounmap(kbd_iobase);
#endif
}
......
......@@ -581,8 +581,8 @@ typedef struct _MPT_ADAPTER
int pci_irq; /* This irq */
char name[MPT_NAME_LENGTH]; /* "iocN" */
char *prod_name; /* "LSIFC9x9" */
volatile SYSIF_REGS *chip; /* == c8817000 (mmap) */
volatile SYSIF_REGS *pio_chip; /* Programmed IO (downloadboot) */
SYSIF_REGS __iomem *chip; /* == c8817000 (mmap) */
SYSIF_REGS __iomem *pio_chip; /* Programmed IO (downloadboot) */
u32 mem_phys; /* == f4020000 (mmap) */
u32 pio_mem_phys; /* Programmed IO (downloadboot) */
int mem_size; /* mmap memory size */
......
......@@ -1837,7 +1837,7 @@ static int __devinit b44_init_one(struct pci_dev *pdev,
return 0;
err_out_iounmap:
iounmap((void *) bp->regs);
iounmap(bp->regs);
err_out_free_dev:
free_netdev(dev);
......@@ -1859,7 +1859,7 @@ static void __devexit b44_remove_one(struct pci_dev *pdev)
struct b44 *bp = netdev_priv(dev);
unregister_netdev(dev);
iounmap((void *) bp->regs);
iounmap(bp->regs);
free_netdev(dev);
pci_release_regions(pdev);
pci_disable_device(pdev);
......
......@@ -527,7 +527,7 @@ struct b44 {
struct net_device_stats stats;
struct b44_hw_stats hw_stats;
volatile void __iomem *regs;
void __iomem *regs;
struct pci_dev *pdev;
struct net_device *dev;
......
......@@ -85,7 +85,7 @@ static char version[] =
static struct myri_eth *root_myri_dev;
#endif
static void myri_reset_off(unsigned long lp, unsigned long cregs)
static void myri_reset_off(void __iomem *lp, void __iomem *cregs)
{
/* Clear IRQ mask. */
sbus_writel(0, lp + LANAI_EIMASK);
......@@ -94,7 +94,7 @@ static void myri_reset_off(unsigned long lp, unsigned long cregs)
sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL);
}
static void myri_reset_on(unsigned long cregs)
static void myri_reset_on(void __iomem *cregs)
{
/* Enable RESET function. */
sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL);
......@@ -103,14 +103,14 @@ static void myri_reset_on(unsigned long cregs)
sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
}
static void myri_disable_irq(unsigned long lp, unsigned long cregs)
static void myri_disable_irq(void __iomem *lp, void __iomem *cregs)
{
sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
sbus_writel(0, lp + LANAI_EIMASK);
sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT);
}
static void myri_enable_irq(unsigned long lp, unsigned long cregs)
static void myri_enable_irq(void __iomem *lp, void __iomem *cregs)
{
sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL);
sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK);
......@@ -119,7 +119,7 @@ static void myri_enable_irq(unsigned long lp, unsigned long cregs)
static inline void bang_the_chip(struct myri_eth *mp)
{
struct myri_shmem *shmem = mp->shmem;
unsigned long cregs = mp->cregs;
void __iomem *cregs = mp->cregs;
sbus_writel(1, &shmem->send);
sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
......@@ -128,7 +128,7 @@ static inline void bang_the_chip(struct myri_eth *mp)
static int myri_do_handshake(struct myri_eth *mp)
{
struct myri_shmem *shmem = mp->shmem;
unsigned long cregs = mp->cregs;
void __iomem *cregs = mp->cregs;
struct myri_channel *chan = &shmem->channel;
int tick = 0;
......@@ -176,27 +176,27 @@ static int myri_do_handshake(struct myri_eth *mp)
static int myri_load_lanai(struct myri_eth *mp)
{
struct net_device *dev = mp->dev;
struct myri_shmem *shmem = mp->shmem;
unsigned char *rptr;
struct myri_shmem __iomem *shmem = mp->shmem;
void __iomem *rptr;
int i;
myri_disable_irq(mp->lregs, mp->cregs);
myri_reset_on(mp->cregs);
rptr = (unsigned char *) mp->lanai;
rptr = mp->lanai;
for (i = 0; i < mp->eeprom.ramsz; i++)
sbus_writeb(0, &rptr[i]);
sbus_writeb(0, rptr + i);
if (mp->eeprom.cpuvers >= CPUVERS_3_0)
sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
/* Load executable code. */
for (i = 0; i < sizeof(lanai4_code); i++)
sbus_writeb(lanai4_code[i], &rptr[(lanai4_code_off * 2) + i]);
sbus_writeb(lanai4_code[i], rptr + (lanai4_code_off * 2) + i);
/* Load data segment. */
for (i = 0; i < sizeof(lanai4_data); i++)
sbus_writeb(lanai4_data[i], &rptr[(lanai4_data_off * 2) + i]);
sbus_writeb(lanai4_data[i], rptr + (lanai4_data_off * 2) + i);
/* Set device address. */
sbus_writeb(0, &shmem->addr[0]);
......@@ -237,15 +237,15 @@ static int myri_load_lanai(struct myri_eth *mp)
static void myri_clean_rings(struct myri_eth *mp)
{
struct sendq *sq = mp->sq;
struct recvq *rq = mp->rq;
struct sendq __iomem *sq = mp->sq;
struct recvq __iomem *rq = mp->rq;
int i;
sbus_writel(0, &rq->tail);
sbus_writel(0, &rq->head);
for (i = 0; i < (RX_RING_SIZE+1); i++) {
if (mp->rx_skbs[i] != NULL) {
struct myri_rxd *rxd = &rq->myri_rxd[i];
struct myri_rxd __iomem *rxd = &rq->myri_rxd[i];
u32 dma_addr;
dma_addr = sbus_readl(&rxd->myri_scatters[0].addr);
......@@ -261,7 +261,7 @@ static void myri_clean_rings(struct myri_eth *mp)
for (i = 0; i < TX_RING_SIZE; i++) {
if (mp->tx_skbs[i] != NULL) {
struct sk_buff *skb = mp->tx_skbs[i];
struct myri_txd *txd = &sq->myri_txd[i];
struct myri_txd __iomem *txd = &sq->myri_txd[i];
u32 dma_addr;
dma_addr = sbus_readl(&txd->myri_gathers[0].addr);
......@@ -274,8 +274,8 @@ static void myri_clean_rings(struct myri_eth *mp)
static void myri_init_rings(struct myri_eth *mp, int from_irq)
{
struct recvq *rq = mp->rq;
struct myri_rxd *rxd = &rq->myri_rxd[0];
struct recvq __iomem *rq = mp->rq;
struct myri_rxd __iomem *rxd = &rq->myri_rxd[0];
struct net_device *dev = mp->dev;
int gfp_flags = GFP_KERNEL;
int i;
......@@ -343,7 +343,7 @@ static void dump_ehdr_and_myripad(unsigned char *stuff)
static void myri_tx(struct myri_eth *mp, struct net_device *dev)
{
struct sendq *sq = mp->sq;
struct sendq __iomem *sq= mp->sq;
int entry = mp->tx_old;
int limit = sbus_readl(&sq->head);
......@@ -411,8 +411,8 @@ static unsigned short myri_type_trans(struct sk_buff *skb, struct net_device *de
static void myri_rx(struct myri_eth *mp, struct net_device *dev)
{
struct recvq *rq = mp->rq;
struct recvq *rqa = mp->rqack;
struct recvq __iomem *rq = mp->rq;
struct recvq __iomem *rqa = mp->rqack;
int entry = sbus_readl(&rqa->head);
int limit = sbus_readl(&rqa->tail);
int drops;
......@@ -423,11 +423,11 @@ static void myri_rx(struct myri_eth *mp, struct net_device *dev)
drops = 0;
DRX(("\n"));
while (entry != limit) {
struct myri_rxd *rxdack = &rqa->myri_rxd[entry];
struct myri_rxd __iomem *rxdack = &rqa->myri_rxd[entry];
u32 csum = sbus_readl(&rxdack->csum);
int len = sbus_readl(&rxdack->myri_scatters[0].len);
int index = sbus_readl(&rxdack->ctx);
struct myri_rxd *rxd = &rq->myri_rxd[rq->tail];
struct myri_rxd __iomem *rxd = &rq->myri_rxd[rq->tail];
struct sk_buff *skb = mp->rx_skbs[index];
/* Ack it. */
......@@ -545,7 +545,7 @@ static irqreturn_t myri_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
struct net_device *dev = (struct net_device *) dev_id;
struct myri_eth *mp = (struct myri_eth *) dev->priv;
unsigned long lregs = mp->lregs;
void __iomem *lregs = mp->lregs;
struct myri_channel *chan = &mp->shmem->channel;
unsigned long flags;
u32 status;
......@@ -610,8 +610,8 @@ static void myri_tx_timeout(struct net_device *dev)
static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct myri_eth *mp = (struct myri_eth *) dev->priv;
struct sendq *sq = mp->sq;
struct myri_txd *txd;
struct sendq __iomem *sq = mp->sq;
struct myri_txd __iomem *txd;
unsigned long flags;
unsigned int head, tail;
int len, entry;
......@@ -998,22 +998,20 @@ static int __init myri_ether_init(struct sbus_dev *sdev, int num)
printk("MyriCOM: Cannot map MyriCOM registers.\n");
goto err;
}
mp->lanai = (unsigned short *) (mp->regs + (256 * 1024));
mp->lanai3 = (unsigned int *) mp->lanai;
mp->lregs = (unsigned long) &mp->lanai[0x10000];
mp->lanai = mp->regs + (256 * 1024);
mp->lregs = mp->lanai + (0x10000 * 2);
} else {
DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
mp->cregs = sbus_ioremap(&sdev->resource[0], 0,
PAGE_SIZE, "MyriCOM Control Regs");
mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024),
PAGE_SIZE, "MyriCOM LANAI Regs");
mp->lanai = (unsigned short *)
mp->lanai =
sbus_ioremap(&sdev->resource[0], (512 * 1024),
mp->eeprom.ramsz, "MyriCOM SRAM");
mp->lanai3 = (unsigned int *) mp->lanai;
}
DET(("Registers mapped: cregs[%lx] lregs[%lx] lanai[%p] lanai3[%p]\n",
mp->cregs, mp->lregs, mp->lanai, mp->lanai3));
DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n",
mp->cregs, mp->lregs, mp->lanai));
if (mp->eeprom.cpuvers >= CPUVERS_4_0)
mp->shmem_base = 0xf000;
......@@ -1022,7 +1020,8 @@ static int __init myri_ether_init(struct sbus_dev *sdev, int num)
DET(("Shared memory base is %04x, ", mp->shmem_base));
mp->shmem = (struct myri_shmem *) &mp->lanai[mp->shmem_base];
mp->shmem = (struct myri_shmem __iomem *)
(mp->lanai + (mp->shmem_base * 2));
DET(("shmem mapped at %p\n", mp->shmem));
mp->rqack = &mp->shmem->channel.recvqa;
......
......@@ -270,22 +270,21 @@ struct myri_eth {
* to obtain good cache hit rates.
*/
spinlock_t irq_lock;
struct myri_shmem *shmem; /* Shared data structures. */
unsigned long cregs; /* Control register space. */
struct recvq *rqack; /* Where we ack rx's. */
struct recvq *rq; /* Where we put buffers. */
struct sendq *sq; /* Where we stuff tx's. */
struct myri_shmem __iomem *shmem; /* Shared data structures. */
void __iomem *cregs; /* Control register space. */
struct recvq __iomem *rqack; /* Where we ack rx's. */
struct recvq __iomem *rq; /* Where we put buffers. */
struct sendq __iomem *sq; /* Where we stuff tx's. */
struct net_device *dev; /* Linux/NET dev struct. */
int tx_old; /* To speed up tx cleaning. */
unsigned long lregs; /* Quick ptr to LANAI regs. */
void __iomem *lregs; /* Quick ptr to LANAI regs. */
struct sk_buff *rx_skbs[RX_RING_SIZE+1];/* RX skb's */
struct sk_buff *tx_skbs[TX_RING_SIZE]; /* TX skb's */
struct net_device_stats enet_stats; /* Interface stats. */
/* These are less frequently accessed. */
unsigned long regs; /* MyriCOM register space. */
unsigned short *lanai; /* View 2 of register space. */
unsigned int *lanai3; /* View 3 of register space. */
void __iomem *regs; /* MyriCOM register space. */
void __iomem *lanai; /* View 2 of register space. */
unsigned int myri_bursts; /* SBUS bursts. */
struct myri_eeprom eeprom; /* Local copy of EEPROM. */
unsigned int reg_size; /* Size of register space. */
......
......@@ -68,7 +68,7 @@ static struct bigmac *root_bigmac_dev;
#define QEC_RESET_TRIES 200
static int qec_global_reset(unsigned long gregs)
static int qec_global_reset(void __iomem *gregs)
{
int tries = QEC_RESET_TRIES;
......@@ -88,7 +88,7 @@ static int qec_global_reset(unsigned long gregs)
static void qec_init(struct bigmac *bp)
{
unsigned long gregs = bp->gregs;
void __iomem *gregs = bp->gregs;
struct sbus_dev *qec_sdev = bp->qec_sdev;
u8 bsizes = bp->bigmac_bursts;
u32 regval;
......@@ -117,7 +117,7 @@ static void qec_init(struct bigmac *bp)
#define TX_RESET_TRIES 32
#define RX_RESET_TRIES 32
static void bigmac_tx_reset(unsigned long bregs)
static void bigmac_tx_reset(void __iomem *bregs)
{
int tries = TX_RESET_TRIES;
......@@ -137,7 +137,7 @@ static void bigmac_tx_reset(unsigned long bregs)
}
}
static void bigmac_rx_reset(unsigned long bregs)
static void bigmac_rx_reset(void __iomem *bregs)
{
int tries = RX_RESET_TRIES;
......@@ -159,7 +159,7 @@ static void bigmac_stop(struct bigmac *bp)
bigmac_rx_reset(bp->bregs);
}
static void bigmac_get_counters(struct bigmac *bp, unsigned long bregs)
static void bigmac_get_counters(struct bigmac *bp, void __iomem *bregs)
{
struct net_device_stats *stats = &bp->enet_stats;
......@@ -244,7 +244,7 @@ static void bigmac_init_rings(struct bigmac *bp, int from_irq)
#define MGMT_CLKON (MGMT_PAL_INT_MDIO|MGMT_PAL_EXT_MDIO|MGMT_PAL_OENAB|MGMT_PAL_DCLOCK)
#define MGMT_CLKOFF (MGMT_PAL_INT_MDIO|MGMT_PAL_EXT_MDIO|MGMT_PAL_OENAB)
static void idle_transceiver(unsigned long tregs)
static void idle_transceiver(void __iomem *tregs)
{
int i = 20;
......@@ -256,7 +256,7 @@ static void idle_transceiver(unsigned long tregs)
}
}
static void write_tcvr_bit(struct bigmac *bp, unsigned long tregs, int bit)
static void write_tcvr_bit(struct bigmac *bp, void __iomem *tregs, int bit)
{
if (bp->tcvr_type == internal) {
bit = (bit & 1) << 3;
......@@ -279,7 +279,7 @@ static void write_tcvr_bit(struct bigmac *bp, unsigned long tregs, int bit)
}
}
static int read_tcvr_bit(struct bigmac *bp, unsigned long tregs)
static int read_tcvr_bit(struct bigmac *bp, void __iomem *tregs)
{
int retval = 0;
......@@ -302,7 +302,7 @@ static int read_tcvr_bit(struct bigmac *bp, unsigned long tregs)
return retval;
}
static int read_tcvr_bit2(struct bigmac *bp, unsigned long tregs)
static int read_tcvr_bit2(struct bigmac *bp, void __iomem *tregs)
{
int retval = 0;
......@@ -325,7 +325,7 @@ static int read_tcvr_bit2(struct bigmac *bp, unsigned long tregs)
}
static void put_tcvr_byte(struct bigmac *bp,
unsigned long tregs,
void __iomem *tregs,
unsigned int byte)
{
int shift = 4;
......@@ -336,7 +336,7 @@ static void put_tcvr_byte(struct bigmac *bp,
} while (shift >= 0);
}
static void bigmac_tcvr_write(struct bigmac *bp, unsigned long tregs,
static void bigmac_tcvr_write(struct bigmac *bp, void __iomem *tregs,
int reg, unsigned short val)
{
int shift;
......@@ -376,7 +376,7 @@ static void bigmac_tcvr_write(struct bigmac *bp, unsigned long tregs,
}
static unsigned short bigmac_tcvr_read(struct bigmac *bp,
unsigned long tregs,
void __iomem *tregs,
int reg)
{
unsigned short retval = 0;
......@@ -444,7 +444,7 @@ static unsigned short bigmac_tcvr_read(struct bigmac *bp,
static void bigmac_tcvr_init(struct bigmac *bp)
{
unsigned long tregs = bp->tregs;
void __iomem *tregs = bp->tregs;
u32 mpal;
idle_transceiver(tregs);
......@@ -482,7 +482,7 @@ static void bigmac_tcvr_init(struct bigmac *bp)
static int bigmac_init(struct bigmac *, int);
static int try_next_permutation(struct bigmac *bp, unsigned long tregs)
static int try_next_permutation(struct bigmac *bp, void __iomem *tregs)
{
if (bp->sw_bmcr & BMCR_SPEED100) {
int timeout;
......@@ -518,7 +518,7 @@ static int try_next_permutation(struct bigmac *bp, unsigned long tregs)
static void bigmac_timer(unsigned long data)
{
struct bigmac *bp = (struct bigmac *) data;
unsigned long tregs = bp->tregs;
void __iomem *tregs = bp->tregs;
int restart_timer = 0;
bp->timer_ticks++;
......@@ -573,7 +573,7 @@ static void bigmac_timer(unsigned long data)
*/
static void bigmac_begin_auto_negotiation(struct bigmac *bp)
{
unsigned long tregs = bp->tregs;
void __iomem *tregs = bp->tregs;
int timeout;
/* Grab new software copies of PHY registers. */
......@@ -612,9 +612,9 @@ static void bigmac_begin_auto_negotiation(struct bigmac *bp)
static int bigmac_init(struct bigmac *bp, int from_irq)
{
unsigned long gregs = bp->gregs;
unsigned long cregs = bp->creg;
unsigned long bregs = bp->bregs;
void __iomem *gregs = bp->gregs;
void __iomem *cregs = bp->creg;
void __iomem *bregs = bp->bregs;
unsigned char *e = &bp->dev->dev_addr[0];
/* Latch current counters into statistics. */
......@@ -987,7 +987,7 @@ static struct net_device_stats *bigmac_get_stats(struct net_device *dev)
static void bigmac_set_multicast(struct net_device *dev)
{
struct bigmac *bp = (struct bigmac *) dev->priv;
unsigned long bregs = bp->bregs;
void __iomem *bregs = bp->bregs;
struct dev_mc_list *dmi = dev->mc_list;
char *addrs;
int i;
......
......@@ -303,10 +303,10 @@ enum bigmac_timer_state {
};
struct bigmac {
unsigned long gregs; /* QEC Global Registers */
unsigned long creg; /* QEC BigMAC Channel Registers */
unsigned long bregs; /* BigMAC Registers */
unsigned long tregs; /* BigMAC Transceiver */
void __iomem *gregs; /* QEC Global Registers */
void __iomem *creg; /* QEC BigMAC Channel Registers */
void __iomem *bregs; /* BigMAC Registers */
void __iomem *tregs; /* BigMAC Transceiver */
struct bmac_init_block *bmac_block; /* RX and TX descriptors */
__u32 bblock_dvma; /* RX and TX descriptors */
......
This diff is collapsed.
......@@ -397,7 +397,7 @@ struct quattro;
/* Happy happy, joy joy! */
struct happy_meal {
unsigned long gregs; /* Happy meal global registers */
void __iomem *gregs; /* Happy meal global registers */
struct hmeal_init_block *happy_block; /* RX and TX descriptors (CPU addr) */
#if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
......@@ -423,14 +423,14 @@ struct happy_meal {
struct net_device_stats net_stats; /* Statistical counters */
#if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
u32 (*read32)(unsigned long);
void (*write32)(unsigned long, u32);
u32 (*read32)(void __iomem *);
void (*write32)(void __iomem *, u32);
#endif
unsigned long etxregs; /* External transmitter regs */
unsigned long erxregs; /* External receiver regs */
unsigned long bigmacregs; /* BIGMAC core regs */
unsigned long tcvregs; /* MIF transceiver regs */
void __iomem *etxregs; /* External transmitter regs */
void __iomem *erxregs; /* External receiver regs */
void __iomem *bigmacregs; /* BIGMAC core regs */
void __iomem *tcvregs; /* MIF transceiver regs */
dma_addr_t hblock_dvma; /* DVMA visible address happy block */
unsigned int happy_flags; /* Driver state flags */
......
......@@ -230,9 +230,9 @@ struct lance_init_block {
((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
struct lance_private {
unsigned long lregs; /* Lance RAP/RDP regs. */
unsigned long dregs; /* DMA controller regs. */
volatile struct lance_init_block *init_block;
void __iomem *lregs; /* Lance RAP/RDP regs. */
void __iomem *dregs; /* DMA controller regs. */
struct lance_init_block *init_block;
spinlock_t lock;
......@@ -270,7 +270,7 @@ struct lance_private {
#define LANCE_REG_SIZE 0x04UL
#define STOP_LANCE(__lp) \
do { unsigned long __base = (__lp)->lregs; \
do { void __iomem *__base = (__lp)->lregs; \
sbus_writew(LE_CSR0, __base + RAP); \
sbus_writew(LE_C0_STOP, __base + RDP); \
} while (0)
......@@ -314,7 +314,7 @@ static void load_csrs(struct lance_private *lp)
static void lance_init_ring_dvma(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
dma_addr_t aib = lp->init_block_dvma;
__u32 leptr;
int i;
......@@ -371,7 +371,7 @@ static void lance_init_ring_dvma(struct net_device *dev)
static void lance_init_ring_pio(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
u32 leptr;
int i;
......@@ -501,8 +501,8 @@ static int init_restart_lance(struct lance_private *lp)
static void lance_rx_dvma(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
volatile struct lance_rx_desc *rd;
struct lance_init_block *ib = lp->init_block;
struct lance_rx_desc *rd;
u8 bits;
int len, entry = lp->rx_new;
struct sk_buff *skb;
......@@ -564,14 +564,14 @@ static void lance_rx_dvma(struct net_device *dev)
static void lance_tx_dvma(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
int i, j;
spin_lock(&lp->lock);
j = lp->tx_old;
for (i = j; i != lp->tx_new; i = j) {
volatile struct lance_tx_desc *td = &ib->btx_ring [i];
struct lance_tx_desc *td = &ib->btx_ring [i];
u8 bits = td->tmd1_bits;
/* If we hit a packet not owned by us, stop */
......@@ -641,12 +641,12 @@ static void lance_tx_dvma(struct net_device *dev)
spin_unlock(&lp->lock);
}
static void lance_piocopy_to_skb(struct sk_buff *skb, volatile void *piobuf, int len)
static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
{
u16 *p16 = (u16 *) skb->data;
u32 *p32;
u8 *p8;
unsigned long pbuf = (unsigned long) piobuf;
void __iomem *pbuf = piobuf;
/* We know here that both src and dest are on a 16bit boundary. */
*p16++ = sbus_readw(pbuf);
......@@ -674,8 +674,8 @@ static void lance_piocopy_to_skb(struct sk_buff *skb, volatile void *piobuf, int
static void lance_rx_pio(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
volatile struct lance_rx_desc *rd;
struct lance_init_block *ib = lp->init_block;
struct lance_rx_desc *rd;
unsigned char bits;
int len, entry;
struct sk_buff *skb;
......@@ -736,14 +736,14 @@ static void lance_rx_pio(struct net_device *dev)
static void lance_tx_pio(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
int i, j;
spin_lock(&lp->lock);
j = lp->tx_old;
for (i = j; i != lp->tx_new; i = j) {
volatile struct lance_tx_desc *td = &ib->btx_ring [i];
struct lance_tx_desc *td = &ib->btx_ring [i];
u8 bits = sbus_readb(&td->tmd1_bits);
/* If we hit a packet not owned by us, stop */
......@@ -880,7 +880,7 @@ static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static void build_fake_packet(struct lance_private *lp)
{
struct net_device *dev = lp->dev;
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
u16 *packet;
struct ethhdr *eth;
int i, entry;
......@@ -916,7 +916,7 @@ struct net_device *last_dev;
static int lance_open(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
int status = 0;
last_dev = dev;
......@@ -1006,9 +1006,9 @@ static int lance_reset(struct net_device *dev)
return status;
}
static void lance_piocopy_from_skb(volatile void *dest, unsigned char *src, int len)
static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
{
unsigned long piobuf = (unsigned long) dest;
void __iomem *piobuf = dest;
u32 *p32;
u16 *p16;
u8 *p8;
......@@ -1064,11 +1064,11 @@ static void lance_piocopy_from_skb(volatile void *dest, unsigned char *src, int
sbus_writeb(src[0], piobuf);
}
static void lance_piozero(volatile void *dest, int len)
static void lance_piozero(void __iomem *dest, int len)
{
unsigned long piobuf = (unsigned long) dest;
void __iomem *piobuf = dest;
if (piobuf & 1) {
if ((unsigned long)piobuf & 1) {
sbus_writeb(0, piobuf);
piobuf += 1;
len -= 1;
......@@ -1079,7 +1079,7 @@ static void lance_piozero(volatile void *dest, int len)
sbus_writeb(0, piobuf);
return;
}
if (piobuf & 2) {
if ((unsigned long)piobuf & 2) {
sbus_writew(0, piobuf);
piobuf += 2;
len -= 2;
......@@ -1113,7 +1113,7 @@ static void lance_tx_timeout(struct net_device *dev)
static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
int entry, skblen, len;
skblen = skb->len;
......@@ -1174,8 +1174,8 @@ static struct net_device_stats *lance_get_stats(struct net_device *dev)
static void lance_load_multicast(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
volatile u16 *mcast_table = (u16 *) &ib->filter;
struct lance_init_block *ib = lp->init_block;
u16 *mcast_table = (u16 *) &ib->filter;
struct dev_mc_list *dmi = dev->mc_list;
char *addrs;
int i;
......@@ -1224,7 +1224,7 @@ static void lance_load_multicast(struct net_device *dev)
static void lance_set_multicast(struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_init_block *ib = lp->init_block;
struct lance_init_block *ib = lp->init_block;
u16 mode;
if (!netif_running(dev))
......@@ -1277,12 +1277,12 @@ static void lance_free_hwresources(struct lance_private *lp)
sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
if (lp->init_block != NULL) {
if (lp->pio_buffer) {
sbus_iounmap((unsigned long)lp->init_block,
sbus_iounmap(lp->init_block,
sizeof(struct lance_init_block));
} else {
sbus_free_consistent(lp->sdev,
sizeof(struct lance_init_block),
(void *)lp->init_block,
lp->init_block,
lp->init_block_dvma);
}
}
......@@ -1349,7 +1349,7 @@ static int __init sparc_lance_init(struct sbus_dev *sdev,
lp->sdev = sdev;
if (lebuffer) {
lp->init_block = (volatile struct lance_init_block *)
lp->init_block =
sbus_ioremap(&lebuffer->resource[0], 0,
sizeof(struct lance_init_block), "lebuffer");
if (lp->init_block == NULL) {
......@@ -1362,7 +1362,7 @@ static int __init sparc_lance_init(struct sbus_dev *sdev,
lp->rx = lance_rx_pio;
lp->tx = lance_tx_pio;
} else {
lp->init_block = (volatile struct lance_init_block *)
lp->init_block =
sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
&lp->init_block_dvma);
if (lp->init_block == NULL ||
......
......@@ -49,7 +49,7 @@ static void qe_set_multicast(struct net_device *dev);
#define QEC_RESET_TRIES 200
static inline int qec_global_reset(unsigned long gregs)
static inline int qec_global_reset(void __iomem *gregs)
{
int tries = QEC_RESET_TRIES;
......@@ -73,8 +73,8 @@ static inline int qec_global_reset(unsigned long gregs)
static inline int qe_stop(struct sunqe *qep)
{
unsigned long cregs = qep->qcregs;
unsigned long mregs = qep->mregs;
void __iomem *cregs = qep->qcregs;
void __iomem *mregs = qep->mregs;
int tries;
/* Reset the MACE, then the QEC channel. */
......@@ -130,9 +130,9 @@ static void qe_init_rings(struct sunqe *qep)
static int qe_init(struct sunqe *qep, int from_irq)
{
struct sunqec *qecp = qep->parent;
unsigned long cregs = qep->qcregs;
unsigned long mregs = qep->mregs;
unsigned long gregs = qecp->gregs;
void __iomem *cregs = qep->qcregs;
void __iomem *mregs = qep->mregs;
void __iomem *gregs = qecp->gregs;
unsigned char *e = &qep->dev->dev_addr[0];
u32 tmp;
int i;
......@@ -699,7 +699,7 @@ static void qe_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
static u32 qe_get_link(struct net_device *dev)
{
struct sunqe *qep = dev->priv;
unsigned long mregs = qep->mregs;
void __iomem *mregs = qep->mregs;
u8 phyconfig;
spin_lock_irq(&qep->lock);
......
......@@ -311,7 +311,7 @@ struct qe_init_block {
struct sunqe;
struct sunqec {
unsigned long gregs; /* QEC Global Registers */
void __iomem *gregs; /* QEC Global Registers */
struct sunqe *qes[4]; /* Each child MACE */
unsigned int qec_bursts; /* Support burst sizes */
struct sbus_dev *qec_sdev; /* QEC's SBUS device */
......@@ -331,8 +331,8 @@ struct sunqe_buffers {
((__u32)((unsigned long)(&(((struct sunqe_buffers *)0)->mem[elem][0]))))
struct sunqe {
unsigned long qcregs; /* QEC per-channel Registers */
unsigned long mregs; /* Per-channel MACE Registers */
void __iomem *qcregs; /* QEC per-channel Registers */
void __iomem *mregs; /* Per-channel MACE Registers */
struct qe_init_block *qe_block; /* RX and TX descriptors */
__u32 qblock_dvma; /* RX and TX descriptors */
spinlock_t lock; /* Protects txfull state */
......
......@@ -248,11 +248,11 @@ struct typhoon {
/* Tx cache line section */
struct transmit_ring txLoRing ____cacheline_aligned;
struct pci_dev * tx_pdev;
unsigned long tx_ioaddr;
void __iomem *tx_ioaddr;
u32 txlo_dma_addr;
/* Irq/Rx cache line section */
unsigned long ioaddr ____cacheline_aligned;
void __iomem *ioaddr ____cacheline_aligned;
struct typhoon_indexes *indexes;
u8 awaiting_resp;
u8 duplex;
......@@ -373,7 +373,7 @@ typhoon_inc_rx_index(u32 *index, const int count)
}
static int
typhoon_reset(unsigned long ioaddr, int wait_type)
typhoon_reset(void __iomem *ioaddr, int wait_type)
{
int i, err = 0;
int timeout;
......@@ -428,7 +428,7 @@ typhoon_reset(unsigned long ioaddr, int wait_type)
}
static int
typhoon_wait_status(unsigned long ioaddr, u32 wait_value)
typhoon_wait_status(void __iomem *ioaddr, u32 wait_value)
{
int i, err = 0;
......@@ -1240,7 +1240,7 @@ typhoon_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
}
static int
typhoon_wait_interrupt(unsigned long ioaddr)
typhoon_wait_interrupt(void __iomem *ioaddr)
{
int i, err = 0;
......@@ -1348,7 +1348,7 @@ typhoon_init_rings(struct typhoon *tp)
static int
typhoon_download_firmware(struct typhoon *tp)
{
unsigned long ioaddr = tp->ioaddr;
void __iomem *ioaddr = tp->ioaddr;
struct pci_dev *pdev = tp->pdev;
struct typhoon_file_header *fHdr;
struct typhoon_section_header *sHdr;
......@@ -1497,7 +1497,7 @@ typhoon_download_firmware(struct typhoon *tp)
static int
typhoon_boot_3XP(struct typhoon *tp, u32 initial_status)
{
unsigned long ioaddr = tp->ioaddr;
void __iomem *ioaddr = tp->ioaddr;
if(typhoon_wait_status(ioaddr, initial_status) < 0) {
printk(KERN_ERR "%s: boot ready timeout\n", tp->name);
......@@ -1812,7 +1812,8 @@ static irqreturn_t
typhoon_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
{
struct net_device *dev = (struct net_device *) dev_instance;
unsigned long ioaddr = dev->base_addr;
struct typhoon *tp = dev->priv;
void __iomem *ioaddr = tp->ioaddr;
u32 intr_status;
intr_status = readl(ioaddr + TYPHOON_REG_INTR_STATUS);
......@@ -1852,7 +1853,7 @@ static int
typhoon_sleep(struct typhoon *tp, int state, u16 events)
{
struct pci_dev *pdev = tp->pdev;
unsigned long ioaddr = tp->ioaddr;
void __iomem *ioaddr = tp->ioaddr;
struct cmd_desc xp_cmd;
int err;
......@@ -1890,7 +1891,7 @@ static int
typhoon_wakeup(struct typhoon *tp, int wait_type)
{
struct pci_dev *pdev = tp->pdev;
unsigned long ioaddr = tp->ioaddr;
void __iomem *ioaddr = tp->ioaddr;
pci_set_power_state(pdev, 0);
pci_restore_state(pdev, tp->pci_state);
......@@ -1911,7 +1912,7 @@ static int
typhoon_start_runtime(struct typhoon *tp)
{
struct net_device *dev = tp->dev;
unsigned long ioaddr = tp->ioaddr;
void __iomem *ioaddr = tp->ioaddr;
struct cmd_desc xp_cmd;
int err;
......@@ -2006,7 +2007,7 @@ typhoon_stop_runtime(struct typhoon *tp, int wait_type)
{
struct typhoon_indexes *indexes = tp->indexes;
struct transmit_ring *txLo = &tp->txLoRing;
unsigned long ioaddr = tp->ioaddr;
void __iomem *ioaddr = tp->ioaddr;
struct cmd_desc xp_cmd;
int i;
......@@ -2070,7 +2071,7 @@ typhoon_tx_timeout(struct net_device *dev)
{
struct typhoon *tp = (struct typhoon *) dev->priv;
if(typhoon_reset(dev->base_addr, WaitNoSleep) < 0) {
if(typhoon_reset(tp->ioaddr, WaitNoSleep) < 0) {
printk(KERN_WARNING "%s: could not reset in tx timeout\n",
dev->name);
goto truely_dead;
......@@ -2091,7 +2092,7 @@ typhoon_tx_timeout(struct net_device *dev)
truely_dead:
/* Reset the hardware, and turn off carrier to avoid more timeouts */
typhoon_reset(dev->base_addr, NoWait);
typhoon_reset(tp->ioaddr, NoWait);
netif_carrier_off(dev);
}
......@@ -2126,7 +2127,7 @@ typhoon_open(struct net_device *dev)
if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) {
printk(KERN_ERR "%s: unable to reboot into sleep img\n",
dev->name);
typhoon_reset(dev->base_addr, NoWait);
typhoon_reset(tp->ioaddr, NoWait);
goto out;
}
......@@ -2192,7 +2193,7 @@ typhoon_resume(struct pci_dev *pdev)
return 0;
reset:
typhoon_reset(dev->base_addr, NoWait);
typhoon_reset(tp->ioaddr, NoWait);
return -EBUSY;
}
......@@ -2276,6 +2277,7 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
struct typhoon *tp;
int card_id = (int) ent->driver_data;
unsigned long ioaddr;
void __iomem *ioaddr_mapped;
void *shared;
dma_addr_t shared_dma;
struct cmd_desc xp_cmd;
......@@ -2345,14 +2347,13 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
/* map our MMIO region
*/
ioaddr = pci_resource_start(pdev, 1);
ioaddr = (unsigned long) ioremap(ioaddr, 128);
if(!ioaddr) {
ioaddr_mapped = ioremap(ioaddr, 128);
if (!ioaddr_mapped) {
printk(ERR_PFX "%s: cannot remap MMIO, aborting\n",
pci_name(pdev));
err = -EIO;
goto error_out_regions;
}
dev->base_addr = ioaddr;
/* allocate pci dma space for rx and tx descriptor rings
*/
......@@ -2371,8 +2372,8 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
tp->shared_dma = shared_dma;
tp->pdev = pdev;
tp->tx_pdev = pdev;
tp->ioaddr = dev->base_addr;
tp->tx_ioaddr = dev->base_addr;
tp->ioaddr = ioaddr_mapped;
tp->tx_ioaddr = ioaddr_mapped;
tp->dev = dev;
/* need to be able to restore PCI state after a suspend */
......@@ -2385,7 +2386,7 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
* 4) Get the hardware address.
* 5) Put the card to sleep.
*/
if(typhoon_reset(ioaddr, WaitSleep) < 0) {
if (typhoon_reset(ioaddr_mapped, WaitSleep) < 0) {
printk(ERR_PFX "%s: could not reset 3XP\n", pci_name(pdev));
err = -EIO;
goto error_out_dma;
......@@ -2518,13 +2519,13 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
return 0;
error_out_reset:
typhoon_reset(ioaddr, NoWait);
typhoon_reset(ioaddr_mapped, NoWait);
error_out_dma:
pci_free_consistent(pdev, sizeof(struct typhoon_shared),
shared, shared_dma);
error_out_remap:
iounmap((void *) ioaddr);
iounmap(ioaddr_mapped);
error_out_regions:
pci_release_regions(pdev);
error_out_dev:
......@@ -2542,8 +2543,8 @@ typhoon_remove_one(struct pci_dev *pdev)
unregister_netdev(dev);
pci_set_power_state(pdev, 0);
pci_restore_state(pdev, tp->pci_state);
typhoon_reset(dev->base_addr, NoWait);
iounmap((char *) (dev->base_addr));
typhoon_reset(tp->ioaddr, NoWait);
iounmap(tp->ioaddr);
pci_free_consistent(pdev, sizeof(struct typhoon_shared),
tp->shared, tp->shared_dma);
pci_release_regions(pdev);
......
......@@ -118,40 +118,26 @@
* UNKNOWN, MAGICAL MYSTERY REGISTER
*
*/
struct wd_timer_regblk {
volatile __u16 dcntr; /* down counter - hw */
volatile __u16 dcntr_pad;
volatile __u16 limit; /* limit register - hw */
volatile __u16 limit_pad;
volatile __u8 status; /* status register - b */
volatile __u8 status_pad;
volatile __u16 status_pad2;
volatile __u32 pad32; /* yet more padding */
};
#define WD_TIMER_REGSZ 16
#define WD0_OFF 0
#define WD1_OFF (WD_TIMER_REGSZ * 1)
#define WD2_OFF (WD_TIMER_REGSZ * 2)
#define PLD_OFF (WD_TIMER_REGSZ * 3)
struct wd_pld_regblk {
volatile __u8 intr_mask; /* interrupt mask - b */
volatile __u8 intr_mask_pad;
volatile __u16 intr_mask_pad2;
volatile __u8 status; /* device status - b */
volatile __u8 status_pad;
volatile __u16 status_pad2;
};
#define WD_DCNTR 0x00
#define WD_LIMIT 0x04
#define WD_STATUS 0x08
struct wd_regblk {
volatile struct wd_timer_regblk wd0_regs;
volatile struct wd_timer_regblk wd1_regs;
volatile struct wd_timer_regblk wd2_regs;
volatile struct wd_pld_regblk pld_regs;
};
#define PLD_IMASK (PLD_OFF + 0x00)
#define PLD_STATUS (PLD_OFF + 0x04)
/* Individual timer structure
*/
struct wd_timer {
__u16 timeout;
__u8 intr_mask;
unsigned char runstatus;
volatile struct wd_timer_regblk* regs;
unsigned char runstatus;
void __iomem *regs;
};
/* Device structure
......@@ -165,7 +151,7 @@ struct wd_device {
unsigned short opt_timeout;
unsigned char initialized;
struct wd_timer watchdog[WD_NUMDEVS];
volatile struct wd_regblk* regs;
void __iomem *regs;
};
static struct wd_device wd_dev = {
......@@ -495,12 +481,12 @@ static void wd_dumpregs(void)
i,
wd_getstatus(&wd_dev.watchdog[i]));
}
printk("\tintr_mask at 0x%lx: 0x%x\n",
(unsigned long)(&wd_dev.regs->pld_regs.intr_mask),
readb(&wd_dev.regs->pld_regs.intr_mask));
printk("\tpld_status at 0x%lx: 0x%x\n",
(unsigned long)(&wd_dev.regs->pld_regs.status),
readb(&wd_dev.regs->pld_regs.status));
printk("\tintr_mask at %p: 0x%x\n",
wd_dev.regs + PLD_IMASK,
readb(wd_dev.regs + PLD_IMASK));
printk("\tpld_status at %p: 0x%x\n",
wd_dev.regs + PLD_STATUS,
readb(wd_dev.regs + PLD_STATUS));
}
#endif
......@@ -513,7 +499,7 @@ static void wd_dumpregs(void)
*/
static void wd_toggleintr(struct wd_timer* pTimer, int enable)
{
unsigned char curregs = wd_readb(&wd_dev.regs->pld_regs.intr_mask);
unsigned char curregs = wd_readb(wd_dev.regs + PLD_IMASK);
unsigned char setregs =
(NULL == pTimer) ?
(WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
......@@ -523,7 +509,7 @@ static void wd_toggleintr(struct wd_timer* pTimer, int enable)
(curregs &= ~setregs):
(curregs |= setregs);
wd_writeb(curregs, &wd_dev.regs->pld_regs.intr_mask);
wd_writeb(curregs, wd_dev.regs + PLD_IMASK);
return;
}
......@@ -534,8 +520,8 @@ static void wd_toggleintr(struct wd_timer* pTimer, int enable)
*/
static void wd_pingtimer(struct wd_timer* pTimer)
{
if(wd_readb(&pTimer->regs->status) & WD_S_RUNNING) {
wd_readw(&pTimer->regs->dcntr);
if (wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) {
wd_readw(pTimer->regs + WD_DCNTR);
}
}
......@@ -547,7 +533,7 @@ static void wd_pingtimer(struct wd_timer* pTimer)
*/
static void wd_stoptimer(struct wd_timer* pTimer)
{
if(wd_readb(&pTimer->regs->status) & WD_S_RUNNING) {
if(wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) {
wd_toggleintr(pTimer, WD_INTR_OFF);
if(wd_dev.isbaddoggie) {
......@@ -574,7 +560,7 @@ static void wd_starttimer(struct wd_timer* pTimer)
}
pTimer->runstatus &= ~WD_STAT_SVCD;
wd_writew(pTimer->timeout, &pTimer->regs->limit);
wd_writew(pTimer->timeout, pTimer->regs + WD_LIMIT);
wd_toggleintr(pTimer, WD_INTR_ON);
}
......@@ -584,7 +570,7 @@ static void wd_starttimer(struct wd_timer* pTimer)
static void wd_resetbrokentimer(struct wd_timer* pTimer)
{
wd_toggleintr(pTimer, WD_INTR_ON);
wd_writew(WD_BLIMIT, &pTimer->regs->limit);
wd_writew(WD_BLIMIT, pTimer->regs + WD_LIMIT);
}
/* Timer device initialization helper.
......@@ -593,7 +579,7 @@ static void wd_resetbrokentimer(struct wd_timer* pTimer)
static int wd_inittimer(int whichdog)
{
struct miscdevice *whichmisc;
volatile struct wd_timer_regblk *whichregs;
void __iomem *whichregs;
char whichident[8];
int whichmask;
__u16 whichlimit;
......@@ -603,7 +589,7 @@ static int wd_inittimer(int whichdog)
case WD0_ID:
whichmisc = &wd0_miscdev;
strcpy(whichident, "RIC");
whichregs = &wd_dev.regs->wd0_regs;
whichregs = wd_dev.regs + WD0_OFF;
whichmask = WD0_INTR_MASK;
whichlimit= (0 == wd0_timeout) ?
(wd_dev.opt_timeout):
......@@ -612,7 +598,7 @@ static int wd_inittimer(int whichdog)
case WD1_ID:
whichmisc = &wd1_miscdev;
strcpy(whichident, "XIR");
whichregs = &wd_dev.regs->wd1_regs;
whichregs = wd_dev.regs + WD1_OFF;
whichmask = WD1_INTR_MASK;
whichlimit= (0 == wd1_timeout) ?
(wd_dev.opt_timeout):
......@@ -621,7 +607,7 @@ static int wd_inittimer(int whichdog)
case WD2_ID:
whichmisc = &wd2_miscdev;
strcpy(whichident, "POR");
whichregs = &wd_dev.regs->wd2_regs;
whichregs = wd_dev.regs + WD2_OFF;
whichmask = WD2_INTR_MASK;
whichlimit= (0 == wd2_timeout) ?
(wd_dev.opt_timeout):
......@@ -686,8 +672,8 @@ static void wd_brokentimer(unsigned long data)
static int wd_getstatus(struct wd_timer* pTimer)
{
unsigned char stat = wd_readb(&pTimer->regs->status);
unsigned char intr = wd_readb(&wd_dev.regs->pld_regs.intr_mask);
unsigned char stat = wd_readb(pTimer->regs + WD_STATUS);
unsigned char intr = wd_readb(wd_dev.regs + PLD_IMASK);
unsigned char ret = WD_STOPPED;
/* determine STOPPED */
......@@ -805,7 +791,7 @@ static void __exit wd_cleanup(void)
* also now eventually trip.
*/
for(id = WD0_ID; id < WD_NUMDEVS; ++id) {
if(WD_S_RUNNING == wd_readb(&wd_dev.watchdog[id].regs->status)) {
if(WD_S_RUNNING == wd_readb(wd_dev.watchdog[id].regs + WD_STATUS)) {
if(wd_dev.opt_enable) {
printk(KERN_WARNING "%s%i: timer not stopped at release\n",
WD_OBPNAME, id);
......@@ -818,7 +804,7 @@ static void __exit wd_cleanup(void)
"%s%i: defect workaround disabled at release, "\
"timer expires in ~%01i sec\n",
WD_OBPNAME, id,
wd_readw(&wd_dev.watchdog[id].regs->limit) / 10);
wd_readw(wd_dev.watchdog[id].regs + WD_LIMIT) / 10);
}
}
}
......
......@@ -70,7 +70,7 @@ MODULE_SUPPORTED_DEVICE
* FLIP - Inverts display for upside-down mounted board
* bits 0-4 - 7-segment display contents
*/
volatile u8* d7s_regs = NULL;
static void __iomem* d7s_regs;
static inline void d7s_free(void)
{
......
......@@ -130,10 +130,8 @@ static int errno;
*/
#define ENVCTRL_CPCI_IGNORED_NODE 0x70
struct pcf8584_reg {
unsigned char data;
unsigned char csr;
};
#define PCF8584_DATA 0x00
#define PCF8584_CSR 0x01
/* Each child device can be monitored by up to PCF8584_MAX_CHANNELS.
* Property of a port or channel as defined by the firmware.
......@@ -175,7 +173,7 @@ struct i2c_child_t {
char mon_type[PCF8584_MAX_CHANNELS];
};
volatile static struct pcf8584_reg *i2c = NULL;
static void __iomem *i2c;
static struct i2c_child_t i2c_childlist[ENVCTRL_MAX_CPU*2];
static unsigned char chnls_mask[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
static unsigned int warning_temperature = 0;
......@@ -185,22 +183,6 @@ static char read_cpu;
/* Forward declarations. */
static struct i2c_child_t *envctrl_get_i2c_child(unsigned char);
/* Function description: Read a byte from an i2c controller register.
* Return: A byte from the passed in address.
*/
static inline unsigned char envctrl_readb(volatile unsigned char *p)
{
return readb(p);
}
/* Function description: Write a byte to an i2c controller register.
* Return: Nothing.
*/
static inline void envctrl_writeb(unsigned char val, volatile unsigned char *p)
{
writeb(val, p);
}
/* Function Description: Test the PIN bit (Pending Interrupt Not)
* to test when serial transmission is completed .
* Return : None.
......@@ -210,7 +192,7 @@ static void envtrl_i2c_test_pin(void)
int limit = 1000000;
while (--limit > 0) {
if (!(envctrl_readb(&i2c->csr) & STATUS_PIN))
if (!(readb(i2c + PCF8584_CSR) & STATUS_PIN))
break;
udelay(1);
}
......@@ -228,7 +210,7 @@ static void envctrl_i2c_test_bb(void)
while (--limit > 0) {
/* Busy bit 0 means busy. */
if (envctrl_readb(&i2c->csr) & STATUS_BB)
if (readb(i2c + PCF8584_CSR) & STATUS_BB)
break;
udelay(1);
}
......@@ -245,20 +227,20 @@ static int envctrl_i2c_read_addr(unsigned char addr)
envctrl_i2c_test_bb();
/* Load address. */
envctrl_writeb(addr + 1, &i2c->data);
writeb(addr + 1, i2c + PCF8584_DATA);
envctrl_i2c_test_bb();
envctrl_writeb(OBD_SEND_START, &i2c->csr);
writeb(OBD_SEND_START, i2c + PCF8584_CSR);
/* Wait for PIN. */
envtrl_i2c_test_pin();
/* CSR 0 means acknowledged. */
if (!(envctrl_readb(&i2c->csr) & STATUS_LRB)) {
return envctrl_readb(&i2c->data);
if (!(readb(i2c + PCF8584_CSR) & STATUS_LRB)) {
return readb(i2c + PCF8584_DATA);
} else {
envctrl_writeb(OBD_SEND_STOP, &i2c->csr);
writeb(OBD_SEND_STOP, i2c + PCF8584_CSR);
return 0;
}
}
......@@ -269,10 +251,10 @@ static int envctrl_i2c_read_addr(unsigned char addr)
static void envctrl_i2c_write_addr(unsigned char addr)
{
envctrl_i2c_test_bb();
envctrl_writeb(addr, &i2c->data);
writeb(addr, i2c + PCF8584_DATA);
/* Generate Start condition. */
envctrl_writeb(OBD_SEND_START, &i2c->csr);
writeb(OBD_SEND_START, i2c + PCF8584_CSR);
}
/* Function Description: Read 1 byte of data from addr
......@@ -282,8 +264,8 @@ static void envctrl_i2c_write_addr(unsigned char addr)
static unsigned char envctrl_i2c_read_data(void)
{
envtrl_i2c_test_pin();
envctrl_writeb(CONTROL_ES0, &i2c->csr); /* Send neg ack. */
return envctrl_readb(&i2c->data);
writeb(CONTROL_ES0, i2c + PCF8584_CSR); /* Send neg ack. */
return readb(i2c + PCF8584_DATA);
}
/* Function Description: Instruct the device which port to read data from.
......@@ -292,7 +274,7 @@ static unsigned char envctrl_i2c_read_data(void)
static void envctrl_i2c_write_data(unsigned char port)
{
envtrl_i2c_test_pin();
envctrl_writeb(port, &i2c->data);
writeb(port, i2c + PCF8584_DATA);
}
/* Function Description: Generate Stop condition after last byte is sent.
......@@ -301,7 +283,7 @@ static void envctrl_i2c_write_data(unsigned char port)
static void envctrl_i2c_stop(void)
{
envtrl_i2c_test_pin();
envctrl_writeb(OBD_SEND_STOP, &i2c->csr);
writeb(OBD_SEND_STOP, i2c + PCF8584_CSR);
}
/* Function Description: Read adc device.
......@@ -323,7 +305,7 @@ static unsigned char envctrl_i2c_read_8591(unsigned char addr, unsigned char por
envctrl_i2c_read_data();
envctrl_i2c_stop();
return envctrl_readb(&i2c->data);
return readb(i2c + PCF8584_DATA);
}
/* Function Description: Read gpio device.
......@@ -1084,8 +1066,7 @@ static int __init envctrl_init(void)
for_each_ebus(ebus) {
for_each_ebusdev(edev, ebus) {
if (!strcmp(edev->prom_name, "i2c")) {
i2c = ioremap( edev->resource[0].start,
sizeof(struct pcf8584_reg));
i2c = ioremap(edev->resource[0].start, 0x2);
for_each_edevchild(edev, edev_child) {
if (!strcmp("gpio", edev_child->prom_name)) {
i2c_childlist[i].i2ctype = I2C_GPIO;
......@@ -1108,15 +1089,15 @@ static int __init envctrl_init(void)
}
/* Set device address. */
envctrl_writeb(CONTROL_PIN, &i2c->csr);
envctrl_writeb(PCF8584_ADDRESS, &i2c->data);
writeb(CONTROL_PIN, i2c + PCF8584_CSR);
writeb(PCF8584_ADDRESS, i2c + PCF8584_DATA);
/* Set system clock and SCL frequencies. */
envctrl_writeb(CONTROL_PIN | CONTROL_ES1, &i2c->csr);
envctrl_writeb(CLK_4_43 | BUS_CLK_90, &i2c->data);
writeb(CONTROL_PIN | CONTROL_ES1, i2c + PCF8584_CSR);
writeb(CLK_4_43 | BUS_CLK_90, i2c + PCF8584_DATA);
/* Enable serial interface. */
envctrl_writeb(CONTROL_PIN | CONTROL_ES0 | CONTROL_ACK, &i2c->csr);
writeb(CONTROL_PIN | CONTROL_ES0 | CONTROL_ACK, i2c + PCF8584_CSR);
udelay(200);
/* Register the device as a minor miscellaneous device. */
......
......@@ -22,6 +22,7 @@
#include <asm/io.h>
#include <asm/sbus.h>
#include <asm/ebus.h>
#include <asm/upa.h>
static spinlock_t flash_lock = SPIN_LOCK_UNLOCKED;
static struct {
......@@ -115,7 +116,7 @@ flash_read(struct file * file, char __user * buf,
count = flash.read_size - p;
for (i = 0; i < count; i++) {
u8 data = readb(flash.read_base + p + i);
u8 data = upa_readb(flash.read_base + p + i);
if (put_user(data, buf))
return -EFAULT;
buf++;
......
......@@ -17,14 +17,6 @@
struct sbus_dma *dma_chain;
/* Print out the current values in the DMA control registers */
extern __inline__ void dump_dma_regs(unsigned long dregs)
{
printk("DMA CONTROL<%08x> ADDR<%08x> CNT<%08x> TEST<%08x>\n",
sbus_readl(dregs + DMA_CSR), sbus_readl(dregs + DMA_ADDR),
sbus_readl(dregs + DMA_COUNT), sbus_readl(dregs + DMA_TEST));
}
void __init init_one_dvma(struct sbus_dma *dma, int num_dma)
{
printk("dma%d: ", num_dma);
......@@ -64,9 +56,6 @@ void __init init_one_dvma(struct sbus_dma *dma, int num_dma)
break;
}
printk("\n");
#if 0 /* Clutters up the screen */
dump_dma_regs(dma->regs);
#endif
}
/* Probe this SBus DMA module(s) */
......
......@@ -77,8 +77,8 @@ struct scsi_cmnd;
/* We get one of these for each ESP probed. */
struct esp {
unsigned long eregs; /* ESP controller registers */
unsigned long dregs; /* DMA controller registers */
void __iomem *eregs; /* ESP controller registers */
void __iomem *dregs; /* DMA controller registers */
struct sbus_dma *dma; /* DMA controller sw state */
struct Scsi_Host *ehost; /* Backpointer to SCSI Host */
struct sbus_dev *sdev; /* Pointer to SBus entry */
......
......@@ -987,7 +987,7 @@ const char *qlogicpti_info(struct Scsi_Host *host)
static char buf[80];
struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %s regs at %lx",
sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %s regs at %p",
__irq_itoa(qpti->qhost->irq), qpti->qregs);
return buf;
}
......
......@@ -335,7 +335,7 @@ struct scsi_cmnd;
/* Software state for the driver. */
struct qlogicpti {
/* These are the hot elements in the cache, so they come first. */
unsigned long qregs; /* Adapter registers */
void __iomem *qregs; /* Adapter registers */
struct pti_queue_entry *res_cpu; /* Ptr to RESPONSE bufs (CPU) */
struct pti_queue_entry *req_cpu; /* Ptr to REQUEST bufs (CPU) */
......@@ -370,7 +370,7 @@ struct qlogicpti {
struct host_param host_param;
struct dev_param dev_param[MAX_TARGETS];
unsigned long sreg;
void __iomem *sreg;
#define SREG_TPOWER 0x80 /* State of termpwr */
#define SREG_FUSE 0x40 /* State of on board fuse */
#define SREG_PDISAB 0x20 /* Disable state for power on */
......
......@@ -62,7 +62,7 @@ enum dvma_rev {
struct sbus_dma {
struct sbus_dma *next;
struct sbus_dev *sdev;
unsigned long regs;
void __iomem *regs;
/* Status, misc info */
int node; /* Prom node for this DMA device */
......
......@@ -38,7 +38,7 @@
#define __ide_mm_outsw __ide_outsw
#define __ide_mm_outsl __ide_outsl
static __inline__ unsigned int inw_be(unsigned long addr)
static inline unsigned int inw_be(void __iomem *addr)
{
unsigned int ret;
......@@ -49,9 +49,7 @@ static __inline__ unsigned int inw_be(unsigned long addr)
return ret;
}
static __inline__ void __ide_insw(unsigned long port,
void *dst,
u32 count)
static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
{
#if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
unsigned long end = (unsigned long)dst + (count << 1);
......@@ -81,16 +79,14 @@ static __inline__ void __ide_insw(unsigned long port,
#endif
}
static __inline__ void outw_be(unsigned short w, unsigned long addr)
static inline void outw_be(unsigned short w, void __iomem *addr)
{
__asm__ __volatile__("stha %0, [%1] %2"
: /* no outputs */
: "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}
static __inline__ void __ide_outsw(unsigned long port,
void *src,
u32 count)
static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
{
#if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
unsigned long end = (unsigned long)src + (count << 1);
......
......@@ -100,12 +100,18 @@ static __inline__ void _outl(u32 l, unsigned long addr)
#define inl_p(__addr) inl(__addr)
#define outl_p(__l, __addr) outl(__l, __addr)
extern void outsb(unsigned long addr, const void *src, unsigned long count);
extern void outsw(unsigned long addr, const void *src, unsigned long count);
extern void outsl(unsigned long addr, const void *src, unsigned long count);
extern void insb(unsigned long addr, void *dst, unsigned long count);
extern void insw(unsigned long addr, void *dst, unsigned long count);
extern void insl(unsigned long addr, void *dst, unsigned long count);
extern void outsb(void __iomem *addr, const void *src, unsigned long count);
extern void outsw(void __iomem *addr, const void *src, unsigned long count);
extern void outsl(void __iomem *addr, const void *src, unsigned long count);
extern void insb(void __iomem *addr, void *dst, unsigned long count);
extern void insw(void __iomem *addr, void *dst, unsigned long count);
extern void insl(void __iomem *addr, void *dst, unsigned long count);
#define ioread8_rep(a,d,c) insb(a,d,c)
#define ioread16_rep(a,d,c) insw(a,d,c)
#define ioread32_rep(a,d,c) insl(a,d,c)
#define iowrite8_rep(a,s,c) outsb(a,s,c)
#define iowrite16_rep(a,s,c) outsw(a,s,c)
#define iowrite32_rep(a,s,c) outsl(a,s,c)
/* Memory functions, same as I/O accesses on Ultra. */
static inline u8 _readb(void __iomem *addr)
......
......@@ -126,10 +126,14 @@ static int parport_pc_find_nonpci_ports (int autoirq, int autodma)
if (ebus_ecpp_p(edev)) {
unsigned long base = edev->resource[0].start;
unsigned long config = edev->resource[1].start;
unsigned long d_base = edev->resource[2].start;
unsigned long d_len;
spin_lock_init(&sparc_ebus_dmas[count].info.lock);
d_len = (edev->resource[2].end -
d_base) + 1;
sparc_ebus_dmas[count].info.regs =
edev->resource[2].start;
ioremap(d_base, d_len);
if (!sparc_ebus_dmas[count].info.regs)
continue;
sparc_ebus_dmas[count].info.flags = 0;
......
......@@ -314,7 +314,7 @@ struct amd7930_map {
typedef struct snd_amd7930 {
spinlock_t lock;
unsigned long regs;
void __iomem *regs;
u32 flags;
#define AMD7930_FLAG_PLAYBACK 0x00000001
#define AMD7930_FLAG_CAPTURE 0x00000002
......
......@@ -64,7 +64,7 @@ MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
typedef struct snd_cs4231 {
spinlock_t lock;
unsigned long port;
void __iomem *port;
#ifdef EBUS_SUPPORT
struct ebus_dma_info eb2c;
struct ebus_dma_info eb2p;
......@@ -357,7 +357,7 @@ static unsigned char snd_cs4231_original_image[32] =
0x00, /* 1f/31 - cbrl */
};
static u8 __cs4231_readb(cs4231_t *cp, unsigned long reg_addr)
static u8 __cs4231_readb(cs4231_t *cp, void __iomem *reg_addr)
{
#ifdef EBUS_SUPPORT
if (cp->flags & CS4231_FLAG_EBUS) {
......@@ -372,7 +372,7 @@ static u8 __cs4231_readb(cs4231_t *cp, unsigned long reg_addr)
#endif
}
static void __cs4231_writeb(cs4231_t *cp, u8 val, unsigned long reg_addr)
static void __cs4231_writeb(cs4231_t *cp, u8 val, void __iomem *reg_addr)
{
#ifdef EBUS_SUPPORT
if (cp->flags & CS4231_FLAG_EBUS) {
......@@ -551,7 +551,7 @@ static void snd_cs4231_mce_up(cs4231_t *chip)
chip->mce_bit |= CS4231_MCE;
timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
if (timeout == 0x80)
snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
snd_printk("mce_up [%p]: serious init problem - codec still busy\n", chip->port);
if (!(timeout & CS4231_MCE))
__cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
spin_unlock_irqrestore(&chip->lock, flags);
......@@ -576,7 +576,7 @@ static void snd_cs4231_mce_down(cs4231_t *chip)
timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
__cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
if (timeout == 0x80)
snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
snd_printk("mce_down [%p]: serious init problem - codec still busy\n", chip->port);
if ((timeout & CS4231_MCE) == 0) {
spin_unlock_irqrestore(&chip->lock, flags);
return;
......@@ -2107,9 +2107,9 @@ static int __init snd_cs4231_ebus_create(snd_card_t *card,
chip->eb2p.client_cookie = chip;
chip->eb2p.irq = edev->irqs[1];
chip->port = (unsigned long) ioremap(edev->resource[0].start, 0x10);
chip->eb2p.regs = (unsigned long) ioremap(edev->resource[1].start, 0x10);
chip->eb2c.regs = (unsigned long) ioremap(edev->resource[2].start, 0x10);
chip->port = ioremap(edev->resource[0].start, 0x10);
chip->eb2p.regs = ioremap(edev->resource[1].start, 0x10);
chip->eb2c.regs = ioremap(edev->resource[2].start, 0x10);
if (!chip->port || !chip->eb2p.regs || !chip->eb2c.regs) {
snd_cs4231_ebus_free(chip);
snd_printk("cs4231-%d: Unable to map chip registers.\n", dev);
......
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