[SPARC64]: Correct FIRE_IOMMU_FLUSHINV register offset.

Signed-off-by: David S. Miller <davem@davemloft.net>

[SPARC64]: Correct FIRE_IOMMU_FLUSHINV register offset.
Signed-off-by: David S. Miller <davem@davemloft.net>
95d71e66 · David S. Miller · e1a39fbb · 95d71e66
Commit 95d71e66 authored May 11, 2007 by David S. Miller
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arch/sparc64/kernel/pci_fire.c arch/sparc64/kernel/pci_fire.c +1 -1

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--- a/arch/sparc64/kernel/pci_fire.c
+++ b/arch/sparc64/kernel/pci_fire.c
@@ -37,7 +37,7 @@ static void pci_fire_scan_bus(struct pci_pbm_info *pbm)
 #define FIRE_IOMMU_CONTROL	0x40000UL
 #define FIRE_IOMMU_TSBBASE	0x40008UL
 #define FIRE_IOMMU_FLUSH	0x40100UL
-#define FIRE_IOMMU_FLUSHINV	0x40100UL
+#define FIRE_IOMMU_FLUSHINV	0x40108UL

 static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
 {