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Commit 9864ca20 authored by Florian Tobias Schandinat's avatar Florian Tobias Schandinat
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viafb: modetable conversion 

This patch converts the modetables used in viafb to
- remove the strange thing that sync_end and blanking_end contained
  the length and not the absolute value
- remove hundreds of useless defines
- use fb_videomode and not our own definition so modes defined in
  the subsystem and received via EDID are compatible with ours

As the modes are now stored in a flat structure and no longer in a
tree like thing the lookup time was increased but as it is a rare
event anyway it shouldn't matter. Otherwise the behaviour should be
the same as before.
Signed-off-by: default avatarFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
parent 91dc1be8
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Showing with 120 additions and 1035 deletions
drivers/video/via/dvi.c
View file @ 9864ca20
......@@ -176,7 +176,7 @@ void viafb_dvi_set_mode(const struct fb_var_screeninfo *var,
u16 cxres, u16 cyres, int iga)
{
struct fb_var_screeninfo dvi_var = *var;
struct crt_mode_table *rb_mode;
const struct fb_videomode *rb_mode;
int maxPixelClock;
maxPixelClock = viaparinfo->shared->tmds_setting_info.max_pixel_clock;
......
drivers/video/via/hw.c
View file @ 9864ca20
......@@ -1467,7 +1467,8 @@ void viafb_set_vclock(u32 clk, int set_iga)
via_write_misc_reg_mask(0x0C, 0x0C); /* select external clock */
}
static struct display_timing var_to_timing(const struct fb_var_screeninfo *var, u16 cxres, u16 cyres)
struct display_timing var_to_timing(const struct fb_var_screeninfo *var,
u16 cxres, u16 cyres)
{
struct display_timing timing;
u16 dx = (var->xres - cxres) / 2, dy = (var->yres - cyres) / 2;
......@@ -2007,20 +2008,20 @@ int viafb_setmode(void)
int viafb_get_refresh(int hres, int vres, u32 long_refresh)
{
struct crt_mode_table *best;
const struct fb_videomode *best;
best = viafb_get_best_mode(hres, vres, long_refresh);
if (!best)
return 60;
if (abs(best->refresh_rate - long_refresh) > 3) {
if (abs(best->refresh - long_refresh) > 3) {
if (hres == 1200 && vres == 900)
return 49; /* OLPC DCON only supports 50 Hz */
else
return 60;
}
return best->refresh_rate;
return best->refresh;
}
static void device_off(void)
......@@ -2114,26 +2115,16 @@ void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
}
void viafb_fill_var_timing_info(struct fb_var_screeninfo *var,
struct crt_mode_table *mode)
const struct fb_videomode *mode)
{
struct display_timing crt_reg;
crt_reg = mode->crtc;
var->pixclock = 1000000000 / (crt_reg.hor_total * crt_reg.ver_total)
* 1000 / mode->refresh_rate;
var->xres = crt_reg.hor_addr;
var->yres = crt_reg.ver_addr;
var->left_margin =
crt_reg.hor_total - (crt_reg.hor_sync_start + crt_reg.hor_sync_end);
var->right_margin = crt_reg.hor_sync_start - crt_reg.hor_addr;
var->hsync_len = crt_reg.hor_sync_end;
var->upper_margin =
crt_reg.ver_total - (crt_reg.ver_sync_start + crt_reg.ver_sync_end);
var->lower_margin = crt_reg.ver_sync_start - crt_reg.ver_addr;
var->vsync_len = crt_reg.ver_sync_end;
var->sync = 0;
if (mode->h_sync_polarity == POSITIVE)
var->sync |= FB_SYNC_HOR_HIGH_ACT;
if (mode->v_sync_polarity == POSITIVE)
var->sync |= FB_SYNC_VERT_HIGH_ACT;
var->pixclock = mode->pixclock;
var->xres = mode->xres;
var->yres = mode->yres;
var->left_margin = mode->left_margin;
var->right_margin = mode->right_margin;
var->hsync_len = mode->hsync_len;
var->upper_margin = mode->upper_margin;
var->lower_margin = mode->lower_margin;
var->vsync_len = mode->vsync_len;
var->sync = mode->sync;
}
drivers/video/via/hw.h
View file @ 9864ca20
......@@ -637,6 +637,8 @@ extern int viafb_LCD_ON;
extern int viafb_DVI_ON;
extern int viafb_hotplug;
struct display_timing var_to_timing(const struct fb_var_screeninfo *var,
u16 cxres, u16 cyres);
void viafb_fill_crtc_timing(const struct fb_var_screeninfo *var,
u16 cxres, u16 cyres, int iga);
void viafb_set_vclock(u32 CLK, int set_iga);
......@@ -660,7 +662,7 @@ void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
int viafb_setmode(void);
void viafb_fill_var_timing_info(struct fb_var_screeninfo *var,
struct crt_mode_table *mode);
const struct fb_videomode *mode);
void __devinit viafb_init_chip_info(int chip_type);
void __devinit viafb_init_dac(int set_iga);
int viafb_get_refresh(int hres, int vres, u32 float_refresh);
......
drivers/video/via/lcd.c
View file @ 9864ca20
......@@ -75,9 +75,6 @@ static void check_diport_of_integrated_lvds(
struct lvds_chip_information *plvds_chip_info,
struct lvds_setting_information
*plvds_setting_info);
static struct display_timing lcd_centering_timging(struct display_timing
mode_crt_reg,
struct display_timing panel_crt_reg);
static inline bool check_lvds_chip(int device_id_subaddr, int device_id)
{
......@@ -552,39 +549,34 @@ void viafb_lcd_set_mode(const struct fb_var_screeninfo *var, u16 cxres,
int panel_hres = plvds_setting_info->lcd_panel_hres;
int panel_vres = plvds_setting_info->lcd_panel_vres;
u32 clock;
struct display_timing mode_crt_reg, panel_crt_reg, timing;
struct crt_mode_table *mode_crt_table, *panel_crt_table;
struct display_timing timing;
struct fb_var_screeninfo panel_var;
const struct fb_videomode *mode_crt_table, *panel_crt_table;
DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n");
/* Get mode table */
mode_crt_table = viafb_get_best_mode(set_hres, set_vres, 60);
mode_crt_reg = mode_crt_table->crtc;
/* Get panel table Pointer */
panel_crt_table = viafb_get_best_mode(panel_hres, panel_vres, 60);
panel_crt_reg = panel_crt_table->crtc;
viafb_fill_var_timing_info(&panel_var, panel_crt_table);
DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
if (VT1636_LVDS == plvds_chip_info->lvds_chip_name)
viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info);
clock = panel_crt_reg.hor_total * panel_crt_reg.ver_total
* panel_crt_table->refresh_rate;
clock = PICOS2KHZ(panel_crt_table->pixclock) * 1000;
plvds_setting_info->vclk = clock;
if (set_iga == IGA2 && (set_hres < panel_hres || set_vres < panel_vres)
&& plvds_setting_info->display_method == LCD_EXPANDSION) {
timing = panel_crt_reg;
timing = var_to_timing(&panel_var, panel_hres, panel_vres);
load_lcd_scaling(set_hres, set_vres, panel_hres, panel_vres);
} else {
timing = lcd_centering_timging(mode_crt_reg, panel_crt_reg);
timing = var_to_timing(&panel_var, set_hres, set_vres);
if (set_iga == IGA2)
/* disable scaling */
via_write_reg_mask(VIACR, 0x79, 0x00,
BIT0 + BIT1 + BIT2);
}
timing.hor_blank_end += timing.hor_blank_start;
timing.hor_sync_end += timing.hor_sync_start;
timing.ver_blank_end += timing.ver_blank_start;
timing.ver_sync_end += timing.ver_sync_start;
if (set_iga == IGA1)
via_set_primary_timing(&timing);
else if (set_iga == IGA2)
......@@ -968,37 +960,6 @@ void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information
}
}
static struct display_timing lcd_centering_timging(struct display_timing
mode_crt_reg,
struct display_timing panel_crt_reg)
{
struct display_timing crt_reg;
crt_reg.hor_total = panel_crt_reg.hor_total;
crt_reg.hor_addr = mode_crt_reg.hor_addr;
crt_reg.hor_blank_start =
(panel_crt_reg.hor_addr - mode_crt_reg.hor_addr) / 2 +
crt_reg.hor_addr;
crt_reg.hor_blank_end = panel_crt_reg.hor_blank_end;
crt_reg.hor_sync_start =
(panel_crt_reg.hor_sync_start -
panel_crt_reg.hor_blank_start) + crt_reg.hor_blank_start;
crt_reg.hor_sync_end = panel_crt_reg.hor_sync_end;
crt_reg.ver_total = panel_crt_reg.ver_total;
crt_reg.ver_addr = mode_crt_reg.ver_addr;
crt_reg.ver_blank_start =
(panel_crt_reg.ver_addr - mode_crt_reg.ver_addr) / 2 +
crt_reg.ver_addr;
crt_reg.ver_blank_end = panel_crt_reg.ver_blank_end;
crt_reg.ver_sync_start =
(panel_crt_reg.ver_sync_start -
panel_crt_reg.ver_blank_start) + crt_reg.ver_blank_start;
crt_reg.ver_sync_end = panel_crt_reg.ver_sync_end;
return crt_reg;
}
bool viafb_lcd_get_mobile_state(bool *mobile)
{
unsigned char __iomem *romptr, *tableptr, *biosptr;
......
drivers/video/via/share.h
View file @ 9864ca20
......@@ -283,337 +283,6 @@
#define HW_LAYOUT_LCD1_LCD2 0x04
#define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10
/* Definition Refresh Rate */
#define REFRESH_49 49
#define REFRESH_50 50
#define REFRESH_60 60
#define REFRESH_75 75
#define REFRESH_85 85
#define REFRESH_100 100
#define REFRESH_120 120
/* Definition Sync Polarity*/
#define NEGATIVE 1
#define POSITIVE 0
/*480x640@60 Sync Polarity (GTF)
*/
#define M480X640_R60_HSP NEGATIVE
#define M480X640_R60_VSP POSITIVE
/*640x480@60 Sync Polarity (VESA Mode)
*/
#define M640X480_R60_HSP NEGATIVE
#define M640X480_R60_VSP NEGATIVE
/*640x480@75 Sync Polarity (VESA Mode)
*/
#define M640X480_R75_HSP NEGATIVE
#define M640X480_R75_VSP NEGATIVE
/*640x480@85 Sync Polarity (VESA Mode)
*/
#define M640X480_R85_HSP NEGATIVE
#define M640X480_R85_VSP NEGATIVE
/*640x480@100 Sync Polarity (GTF Mode)
*/
#define M640X480_R100_HSP NEGATIVE
#define M640X480_R100_VSP POSITIVE
/*640x480@120 Sync Polarity (GTF Mode)
*/
#define M640X480_R120_HSP NEGATIVE
#define M640X480_R120_VSP POSITIVE
/*720x480@60 Sync Polarity (GTF Mode)
*/
#define M720X480_R60_HSP NEGATIVE
#define M720X480_R60_VSP POSITIVE
/*720x576@60 Sync Polarity (GTF Mode)
*/
#define M720X576_R60_HSP NEGATIVE
#define M720X576_R60_VSP POSITIVE
/*800x600@60 Sync Polarity (VESA Mode)
*/
#define M800X600_R60_HSP POSITIVE
#define M800X600_R60_VSP POSITIVE
/*800x600@75 Sync Polarity (VESA Mode)
*/
#define M800X600_R75_HSP POSITIVE
#define M800X600_R75_VSP POSITIVE
/*800x600@85 Sync Polarity (VESA Mode)
*/
#define M800X600_R85_HSP POSITIVE
#define M800X600_R85_VSP POSITIVE
/*800x600@100 Sync Polarity (GTF Mode)
*/
#define M800X600_R100_HSP NEGATIVE
#define M800X600_R100_VSP POSITIVE
/*800x600@120 Sync Polarity (GTF Mode)
*/
#define M800X600_R120_HSP NEGATIVE
#define M800X600_R120_VSP POSITIVE
/*800x480@60 Sync Polarity (CVT Mode)
*/
#define M800X480_R60_HSP NEGATIVE
#define M800X480_R60_VSP POSITIVE
/*848x480@60 Sync Polarity (CVT Mode)
*/
#define M848X480_R60_HSP NEGATIVE
#define M848X480_R60_VSP POSITIVE
/*852x480@60 Sync Polarity (GTF Mode)
*/
#define M852X480_R60_HSP NEGATIVE
#define M852X480_R60_VSP POSITIVE
/*1024x512@60 Sync Polarity (GTF Mode)
*/
#define M1024X512_R60_HSP NEGATIVE
#define M1024X512_R60_VSP POSITIVE
/*1024x600@60 Sync Polarity (GTF Mode)
*/
#define M1024X600_R60_HSP NEGATIVE
#define M1024X600_R60_VSP POSITIVE
/*1024x768@60 Sync Polarity (VESA Mode)
*/
#define M1024X768_R60_HSP NEGATIVE
#define M1024X768_R60_VSP NEGATIVE
/*1024x768@75 Sync Polarity (VESA Mode)
*/
#define M1024X768_R75_HSP POSITIVE
#define M1024X768_R75_VSP POSITIVE
/*1024x768@85 Sync Polarity (VESA Mode)
*/
#define M1024X768_R85_HSP POSITIVE
#define M1024X768_R85_VSP POSITIVE
/*1024x768@100 Sync Polarity (GTF Mode)
*/
#define M1024X768_R100_HSP NEGATIVE
#define M1024X768_R100_VSP POSITIVE
/*1152x864@75 Sync Polarity (VESA Mode)
*/
#define M1152X864_R75_HSP POSITIVE
#define M1152X864_R75_VSP POSITIVE
/*1280x720@60 Sync Polarity (GTF Mode)
*/
#define M1280X720_R60_HSP NEGATIVE
#define M1280X720_R60_VSP POSITIVE
/* 1280x768@50 Sync Polarity (GTF Mode) */
#define M1280X768_R50_HSP NEGATIVE
#define M1280X768_R50_VSP POSITIVE
/*1280x768@60 Sync Polarity (GTF Mode)
*/
#define M1280X768_R60_HSP NEGATIVE
#define M1280X768_R60_VSP POSITIVE
/*1280x800@60 Sync Polarity (CVT Mode)
*/
#define M1280X800_R60_HSP NEGATIVE
#define M1280X800_R60_VSP POSITIVE
/*1280x960@60 Sync Polarity (VESA Mode)
*/
#define M1280X960_R60_HSP POSITIVE
#define M1280X960_R60_VSP POSITIVE
/*1280x1024@60 Sync Polarity (VESA Mode)
*/
#define M1280X1024_R60_HSP POSITIVE
#define M1280X1024_R60_VSP POSITIVE
/* 1360x768@60 Sync Polarity (CVT Mode) */
#define M1360X768_R60_HSP POSITIVE
#define M1360X768_R60_VSP POSITIVE
/* 1360x768@60 Sync Polarity (CVT Reduce Blanking Mode) */
#define M1360X768_RB_R60_HSP POSITIVE
#define M1360X768_RB_R60_VSP NEGATIVE
/* 1368x768@50 Sync Polarity (GTF Mode) */
#define M1368X768_R50_HSP NEGATIVE
#define M1368X768_R50_VSP POSITIVE
/* 1368x768@60 Sync Polarity (VESA Mode) */
#define M1368X768_R60_HSP NEGATIVE
#define M1368X768_R60_VSP POSITIVE
/*1280x1024@75 Sync Polarity (VESA Mode)
*/
#define M1280X1024_R75_HSP POSITIVE
#define M1280X1024_R75_VSP POSITIVE
/*1280x1024@85 Sync Polarity (VESA Mode)
*/
#define M1280X1024_R85_HSP POSITIVE
#define M1280X1024_R85_VSP POSITIVE
/*1440x1050@60 Sync Polarity (GTF Mode)
*/
#define M1440X1050_R60_HSP NEGATIVE
#define M1440X1050_R60_VSP POSITIVE
/*1600x1200@60 Sync Polarity (VESA Mode)
*/
#define M1600X1200_R60_HSP POSITIVE
#define M1600X1200_R60_VSP POSITIVE
/*1600x1200@75 Sync Polarity (VESA Mode)
*/
#define M1600X1200_R75_HSP POSITIVE
#define M1600X1200_R75_VSP POSITIVE
/* 1680x1050@60 Sync Polarity (CVT Mode) */
#define M1680x1050_R60_HSP NEGATIVE
#define M1680x1050_R60_VSP NEGATIVE
/* 1680x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
#define M1680x1050_RB_R60_HSP POSITIVE
#define M1680x1050_RB_R60_VSP NEGATIVE
/* 1680x1050@75 Sync Polarity (CVT Mode) */
#define M1680x1050_R75_HSP NEGATIVE
#define M1680x1050_R75_VSP POSITIVE
/*1920x1080@60 Sync Polarity (CVT Mode)
*/
#define M1920X1080_R60_HSP NEGATIVE
#define M1920X1080_R60_VSP POSITIVE
/* 1920x1080@60 Sync Polarity (CVT Reduce Blanking Mode) */
#define M1920X1080_RB_R60_HSP POSITIVE
#define M1920X1080_RB_R60_VSP NEGATIVE
/*1920x1440@60 Sync Polarity (VESA Mode)
*/
#define M1920X1440_R60_HSP NEGATIVE
#define M1920X1440_R60_VSP POSITIVE
/*1920x1440@75 Sync Polarity (VESA Mode)
*/
#define M1920X1440_R75_HSP NEGATIVE
#define M1920X1440_R75_VSP POSITIVE
#if 0
/* 1400x1050@60 Sync Polarity (VESA Mode) */
#define M1400X1050_R60_HSP NEGATIVE
#define M1400X1050_R60_VSP NEGATIVE
#endif
/* 1400x1050@60 Sync Polarity (CVT Mode) */
#define M1400X1050_R60_HSP NEGATIVE
#define M1400X1050_R60_VSP POSITIVE
/* 1400x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
#define M1400X1050_RB_R60_HSP POSITIVE
#define M1400X1050_RB_R60_VSP NEGATIVE
/* 1400x1050@75 Sync Polarity (CVT Mode) */
#define M1400X1050_R75_HSP NEGATIVE
#define M1400X1050_R75_VSP POSITIVE
/* 960x600@60 Sync Polarity (CVT Mode) */
#define M960X600_R60_HSP NEGATIVE
#define M960X600_R60_VSP POSITIVE
/* 1000x600@60 Sync Polarity (GTF Mode) */
#define M1000X600_R60_HSP NEGATIVE
#define M1000X600_R60_VSP POSITIVE
/* 1024x576@60 Sync Polarity (GTF Mode) */
#define M1024X576_R60_HSP NEGATIVE
#define M1024X576_R60_VSP POSITIVE
/*1024x600@60 Sync Polarity (GTF Mode)*/
#define M1024X600_R60_HSP NEGATIVE
#define M1024X600_R60_VSP POSITIVE
/* 1088x612@60 Sync Polarity (CVT Mode) */
#define M1088X612_R60_HSP NEGATIVE
#define M1088X612_R60_VSP POSITIVE
/* 1152x720@60 Sync Polarity (CVT Mode) */
#define M1152X720_R60_HSP NEGATIVE
#define M1152X720_R60_VSP POSITIVE
/* 1200x720@60 Sync Polarity (GTF Mode) */
#define M1200X720_R60_HSP NEGATIVE
#define M1200X720_R60_VSP POSITIVE
/* 1200x900@60 Sync Polarity (DCON) */
#define M1200X900_R60_HSP POSITIVE
#define M1200X900_R60_VSP POSITIVE
/* 1280x600@60 Sync Polarity (GTF Mode) */
#define M1280x600_R60_HSP NEGATIVE
#define M1280x600_R60_VSP POSITIVE
/* 1280x720@50 Sync Polarity (GTF Mode) */
#define M1280X720_R50_HSP NEGATIVE
#define M1280X720_R50_VSP POSITIVE
/* 1440x900@60 Sync Polarity (CVT Mode) */
#define M1440X900_R60_HSP NEGATIVE
#define M1440X900_R60_VSP POSITIVE
/* 1440x900@75 Sync Polarity (CVT Mode) */
#define M1440X900_R75_HSP NEGATIVE
#define M1440X900_R75_VSP POSITIVE
/* 1440x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
#define M1440X900_RB_R60_HSP POSITIVE
#define M1440X900_RB_R60_VSP NEGATIVE
/* 1600x900@60 Sync Polarity (CVT Mode) */
#define M1600X900_R60_HSP NEGATIVE
#define M1600X900_R60_VSP POSITIVE
/* 1600x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
#define M1600X900_RB_R60_HSP POSITIVE
#define M1600X900_RB_R60_VSP NEGATIVE
/* 1600x1024@60 Sync Polarity (GTF Mode) */
#define M1600X1024_R60_HSP NEGATIVE
#define M1600X1024_R60_VSP POSITIVE
/* 1792x1344@60 Sync Polarity (DMT Mode) */
#define M1792x1344_R60_HSP NEGATIVE
#define M1792x1344_R60_VSP POSITIVE
/* 1856x1392@60 Sync Polarity (DMT Mode) */
#define M1856x1392_R60_HSP NEGATIVE
#define M1856x1392_R60_VSP POSITIVE
/* 1920x1200@60 Sync Polarity (CVT Mode) */
#define M1920X1200_R60_HSP NEGATIVE
#define M1920X1200_R60_VSP POSITIVE
/* 1920x1200@60 Sync Polarity (CVT Reduce Blanking Mode) */
#define M1920X1200_RB_R60_HSP POSITIVE
#define M1920X1200_RB_R60_VSP NEGATIVE
/* 2048x1536@60 Sync Polarity (CVT Mode) */
#define M2048x1536_R60_HSP NEGATIVE
#define M2048x1536_R60_VSP POSITIVE
/* Definition CRTC Timing Index */
#define H_TOTAL_INDEX 0
#define H_ADDR_INDEX 1
......
drivers/video/via/viamode.c
View file @ 9864ca20
This diff is collapsed.
drivers/video/via/viamode.h
View file @ 9864ca20
......@@ -31,11 +31,6 @@ struct VPITTable {
unsigned char AR[StdAR];
};
struct VideoModeTable {
struct crt_mode_table *crtc;
int mode_array;
};
struct patch_table {
int table_length;
struct io_reg *io_reg_table;
......@@ -60,7 +55,9 @@ extern struct io_reg PM1024x768[];
extern struct patch_table res_patch_table[];
extern struct VPITTable VPIT;
struct crt_mode_table *viafb_get_best_mode(int hres, int vres, int refresh);
struct crt_mode_table *viafb_get_best_rb_mode(int hres, int vres, int refresh);
const struct fb_videomode *viafb_get_best_mode(int hres, int vres,
int refresh);
const struct fb_videomode *viafb_get_best_rb_mode(int hres, int vres,
int refresh);
#endif /* __VIAMODE_H__ */
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