Commit 9ad5897c authored by Tony Lindgren's avatar Tony Lindgren Committed by Russell King

[ARM] 3143/1: OMAP 4/5: Update omap include files

Patch from Tony Lindgren

This patch syncs the mainline kernel with linux-omap tree.

This patch contains changes to common header files for
omap1xxx and omap24xx by various omap developers, and
improved cpu detection by Imre Deak
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 046d6b28
...@@ -34,5 +34,9 @@ ...@@ -34,5 +34,9 @@
#define OMAP24XX_ETHR_START 0x08000300 #define OMAP24XX_ETHR_START 0x08000300
#define OMAP24XX_ETHR_GPIO_IRQ 92 #define OMAP24XX_ETHR_GPIO_IRQ 92
#define H4_CS0_BASE 0x04000000
#define H4_CS0_BASE 0x04000000
#endif /* __ASM_ARCH_OMAP_H4_H */ #endif /* __ASM_ARCH_OMAP_H4_H */
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
#ifndef __ASM_ARCH_OMAP_INNOVATOR_H #ifndef __ASM_ARCH_OMAP_INNOVATOR_H
#define __ASM_ARCH_OMAP_INNOVATOR_H #define __ASM_ARCH_OMAP_INNOVATOR_H
#if defined (CONFIG_ARCH_OMAP1510) #if defined (CONFIG_ARCH_OMAP15XX)
#ifndef OMAP_SDRAM_DEVICE #ifndef OMAP_SDRAM_DEVICE
#define OMAP_SDRAM_DEVICE D256M_1X16_4B #define OMAP_SDRAM_DEVICE D256M_1X16_4B
...@@ -44,7 +44,7 @@ void fpga_write(unsigned char val, int reg); ...@@ -44,7 +44,7 @@ void fpga_write(unsigned char val, int reg);
unsigned char fpga_read(int reg); unsigned char fpga_read(int reg);
#endif #endif
#endif /* CONFIG_ARCH_OMAP1510 */ #endif /* CONFIG_ARCH_OMAP15XX */
#if defined (CONFIG_ARCH_OMAP16XX) #if defined (CONFIG_ARCH_OMAP16XX)
......
/*
* linux/include/asm-arm/arch-omap/clock.h
*
* Copyright (C) 2004 - 2005 Nokia corporation
* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
* Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_OMAP_CLOCK_H
#define __ARCH_ARM_OMAP_CLOCK_H
struct module;
struct clk {
struct list_head node;
struct module *owner;
const char *name;
struct clk *parent;
unsigned long rate;
__u32 flags;
void __iomem *enable_reg;
__u8 enable_bit;
__u8 rate_offset;
__u8 src_offset;
__s8 usecount;
void (*recalc)(struct clk *);
int (*set_rate)(struct clk *, unsigned long);
long (*round_rate)(struct clk *, unsigned long);
void (*init)(struct clk *);
int (*enable)(struct clk *);
void (*disable)(struct clk *);
};
struct clk_functions {
int (*clk_enable)(struct clk *clk);
void (*clk_disable)(struct clk *clk);
int (*clk_use)(struct clk *clk);
void (*clk_unuse)(struct clk *clk);
long (*clk_round_rate)(struct clk *clk, unsigned long rate);
int (*clk_set_rate)(struct clk *clk, unsigned long rate);
int (*clk_set_parent)(struct clk *clk, struct clk *parent);
struct clk * (*clk_get_parent)(struct clk *clk);
void (*clk_allow_idle)(struct clk *clk);
void (*clk_deny_idle)(struct clk *clk);
};
extern unsigned int mpurate;
extern struct list_head clocks;
extern spinlock_t clockfw_lock;
extern int clk_init(struct clk_functions * custom_clocks);
extern int clk_register(struct clk *clk);
extern void clk_unregister(struct clk *clk);
extern void propagate_rate(struct clk *clk);
extern void followparent_recalc(struct clk * clk);
extern void clk_allow_idle(struct clk *clk);
extern void clk_deny_idle(struct clk *clk);
/* Clock flags */
#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */
#define RATE_FIXED (1 << 1) /* Fixed clock rate */
#define RATE_PROPAGATES (1 << 2) /* Program children too */
#define VIRTUAL_CLOCK (1 << 3) /* Composite clock from table */
#define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */
#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */
#define CLOCK_IDLE_CONTROL (1 << 7)
#define CLOCK_NO_IDLE_PARENT (1 << 8)
#define DELAYED_APP (1 << 9) /* Delay application of clock */
#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
#define CM_MPU_SEL1 (1 << 11) /* Domain divider/source */
#define CM_DSP_SEL1 (1 << 12)
#define CM_GFX_SEL1 (1 << 13)
#define CM_MODEM_SEL1 (1 << 14)
#define CM_CORE_SEL1 (1 << 15) /* Sets divider for many */
#define CM_CORE_SEL2 (1 << 16) /* sets parent for GPT */
#define CM_WKUP_SEL1 (1 << 17)
#define CM_PLL_SEL1 (1 << 18)
#define CM_PLL_SEL2 (1 << 19)
#define CM_SYSCLKOUT_SEL1 (1 << 20)
#define CLOCK_IN_OMAP730 (1 << 21)
#define CLOCK_IN_OMAP1510 (1 << 22)
#define CLOCK_IN_OMAP16XX (1 << 23)
#define CLOCK_IN_OMAP242X (1 << 24)
#define CLOCK_IN_OMAP243X (1 << 25)
#endif
...@@ -31,6 +31,6 @@ struct sys_timer; ...@@ -31,6 +31,6 @@ struct sys_timer;
extern void omap_map_common_io(void); extern void omap_map_common_io(void);
extern struct sys_timer omap_timer; extern struct sys_timer omap_timer;
extern void omap_serial_init(int ports[]); extern void omap_serial_init(void);
#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
...@@ -28,12 +28,7 @@ ...@@ -28,12 +28,7 @@
extern unsigned int system_rev; extern unsigned int system_rev;
#define OMAP_DIE_ID_0 0xfffe1800 #define omap2_cpu_rev() ((system_rev >> 8) & 0x0f)
#define OMAP_DIE_ID_1 0xfffe1804
#define OMAP_PRODUCTION_ID_0 0xfffe2000
#define OMAP_PRODUCTION_ID_1 0xfffe2004
#define OMAP32_ID_0 0xfffed400
#define OMAP32_ID_1 0xfffed404
/* /*
* Test if multicore OMAP support is needed * Test if multicore OMAP support is needed
...@@ -50,7 +45,7 @@ extern unsigned int system_rev; ...@@ -50,7 +45,7 @@ extern unsigned int system_rev;
# define OMAP_NAME omap730 # define OMAP_NAME omap730
# endif # endif
#endif #endif
#ifdef CONFIG_ARCH_OMAP1510 #ifdef CONFIG_ARCH_OMAP15XX
# ifdef OMAP_NAME # ifdef OMAP_NAME
# undef MULTI_OMAP1 # undef MULTI_OMAP1
# define MULTI_OMAP1 # define MULTI_OMAP1
...@@ -79,9 +74,11 @@ extern unsigned int system_rev; ...@@ -79,9 +74,11 @@ extern unsigned int system_rev;
* Macros to group OMAP into cpu classes. * Macros to group OMAP into cpu classes.
* These can be used in most places. * These can be used in most places.
* cpu_is_omap7xx(): True for OMAP730 * cpu_is_omap7xx(): True for OMAP730
* cpu_is_omap15xx(): True for OMAP1510 and OMAP5910 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
* cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
* cpu_is_omap24xx(): True for OMAP2420 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
* cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
* cpu_is_omap243x(): True for OMAP2430
*/ */
#define GET_OMAP_CLASS (system_rev & 0xff) #define GET_OMAP_CLASS (system_rev & 0xff)
...@@ -91,22 +88,35 @@ static inline int is_omap ##class (void) \ ...@@ -91,22 +88,35 @@ static inline int is_omap ##class (void) \
return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
} }
#define GET_OMAP_SUBCLASS ((system_rev >> 20) & 0x0fff)
#define IS_OMAP_SUBCLASS(subclass, id) \
static inline int is_omap ##subclass (void) \
{ \
return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
}
IS_OMAP_CLASS(7xx, 0x07) IS_OMAP_CLASS(7xx, 0x07)
IS_OMAP_CLASS(15xx, 0x15) IS_OMAP_CLASS(15xx, 0x15)
IS_OMAP_CLASS(16xx, 0x16) IS_OMAP_CLASS(16xx, 0x16)
IS_OMAP_CLASS(24xx, 0x24) IS_OMAP_CLASS(24xx, 0x24)
IS_OMAP_SUBCLASS(242x, 0x242)
IS_OMAP_SUBCLASS(243x, 0x243)
#define cpu_is_omap7xx() 0 #define cpu_is_omap7xx() 0
#define cpu_is_omap15xx() 0 #define cpu_is_omap15xx() 0
#define cpu_is_omap16xx() 0 #define cpu_is_omap16xx() 0
#define cpu_is_omap24xx() 0 #define cpu_is_omap24xx() 0
#define cpu_is_omap242x() 0
#define cpu_is_omap243x() 0
#if defined(MULTI_OMAP1) #if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730) # if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap7xx # undef cpu_is_omap7xx
# define cpu_is_omap7xx() is_omap7xx() # define cpu_is_omap7xx() is_omap7xx()
# endif # endif
# if defined(CONFIG_ARCH_OMAP1510) # if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap15xx # undef cpu_is_omap15xx
# define cpu_is_omap15xx() is_omap15xx() # define cpu_is_omap15xx() is_omap15xx()
# endif # endif
...@@ -119,7 +129,7 @@ IS_OMAP_CLASS(24xx, 0x24) ...@@ -119,7 +129,7 @@ IS_OMAP_CLASS(24xx, 0x24)
# undef cpu_is_omap7xx # undef cpu_is_omap7xx
# define cpu_is_omap7xx() 1 # define cpu_is_omap7xx() 1
# endif # endif
# if defined(CONFIG_ARCH_OMAP1510) # if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap15xx # undef cpu_is_omap15xx
# define cpu_is_omap15xx() 1 # define cpu_is_omap15xx() 1
# endif # endif
...@@ -129,13 +139,18 @@ IS_OMAP_CLASS(24xx, 0x24) ...@@ -129,13 +139,18 @@ IS_OMAP_CLASS(24xx, 0x24)
# endif # endif
# if defined(CONFIG_ARCH_OMAP24XX) # if defined(CONFIG_ARCH_OMAP24XX)
# undef cpu_is_omap24xx # undef cpu_is_omap24xx
# undef cpu_is_omap242x
# undef cpu_is_omap243x
# define cpu_is_omap24xx() 1 # define cpu_is_omap24xx() 1
# define cpu_is_omap242x() is_omap242x()
# define cpu_is_omap243x() is_omap243x()
# endif # endif
#endif #endif
/* /*
* Macros to detect individual cpu types. * Macros to detect individual cpu types.
* These are only rarely needed. * These are only rarely needed.
* cpu_is_omap330(): True for OMAP330
* cpu_is_omap730(): True for OMAP730 * cpu_is_omap730(): True for OMAP730
* cpu_is_omap1510(): True for OMAP1510 * cpu_is_omap1510(): True for OMAP1510
* cpu_is_omap1610(): True for OMAP1610 * cpu_is_omap1610(): True for OMAP1610
...@@ -144,6 +159,9 @@ IS_OMAP_CLASS(24xx, 0x24) ...@@ -144,6 +159,9 @@ IS_OMAP_CLASS(24xx, 0x24)
* cpu_is_omap1621(): True for OMAP1621 * cpu_is_omap1621(): True for OMAP1621
* cpu_is_omap1710(): True for OMAP1710 * cpu_is_omap1710(): True for OMAP1710
* cpu_is_omap2420(): True for OMAP2420 * cpu_is_omap2420(): True for OMAP2420
* cpu_is_omap2422(): True for OMAP2422
* cpu_is_omap2423(): True for OMAP2423
* cpu_is_omap2430(): True for OMAP2430
*/ */
#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) #define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff)
...@@ -153,6 +171,7 @@ static inline int is_omap ##type (void) \ ...@@ -153,6 +171,7 @@ static inline int is_omap ##type (void) \
return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
} }
IS_OMAP_TYPE(310, 0x0310)
IS_OMAP_TYPE(730, 0x0730) IS_OMAP_TYPE(730, 0x0730)
IS_OMAP_TYPE(1510, 0x1510) IS_OMAP_TYPE(1510, 0x1510)
IS_OMAP_TYPE(1610, 0x1610) IS_OMAP_TYPE(1610, 0x1610)
...@@ -161,7 +180,11 @@ IS_OMAP_TYPE(5912, 0x1611) ...@@ -161,7 +180,11 @@ IS_OMAP_TYPE(5912, 0x1611)
IS_OMAP_TYPE(1621, 0x1621) IS_OMAP_TYPE(1621, 0x1621)
IS_OMAP_TYPE(1710, 0x1710) IS_OMAP_TYPE(1710, 0x1710)
IS_OMAP_TYPE(2420, 0x2420) IS_OMAP_TYPE(2420, 0x2420)
IS_OMAP_TYPE(2422, 0x2422)
IS_OMAP_TYPE(2423, 0x2423)
IS_OMAP_TYPE(2430, 0x2430)
#define cpu_is_omap310() 0
#define cpu_is_omap730() 0 #define cpu_is_omap730() 0
#define cpu_is_omap1510() 0 #define cpu_is_omap1510() 0
#define cpu_is_omap1610() 0 #define cpu_is_omap1610() 0
...@@ -170,31 +193,33 @@ IS_OMAP_TYPE(2420, 0x2420) ...@@ -170,31 +193,33 @@ IS_OMAP_TYPE(2420, 0x2420)
#define cpu_is_omap1621() 0 #define cpu_is_omap1621() 0
#define cpu_is_omap1710() 0 #define cpu_is_omap1710() 0
#define cpu_is_omap2420() 0 #define cpu_is_omap2420() 0
#define cpu_is_omap2422() 0
#define cpu_is_omap2423() 0
#define cpu_is_omap2430() 0
#if defined(MULTI_OMAP1) #if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730) # if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730 # undef cpu_is_omap730
# define cpu_is_omap730() is_omap730() # define cpu_is_omap730() is_omap730()
# endif # endif
# if defined(CONFIG_ARCH_OMAP1510)
# undef cpu_is_omap1510
# define cpu_is_omap1510() is_omap1510()
# endif
#else #else
# if defined(CONFIG_ARCH_OMAP730) # if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730 # undef cpu_is_omap730
# define cpu_is_omap730() 1 # define cpu_is_omap730() 1
# endif # endif
# if defined(CONFIG_ARCH_OMAP1510)
# undef cpu_is_omap1510
# define cpu_is_omap1510() 1
# endif
#endif #endif
/* /*
* Whether we have MULTI_OMAP1 or not, we still need to distinguish * Whether we have MULTI_OMAP1 or not, we still need to distinguish
* between 1611B/5912 and 1710. * between 330 vs. 1510 and 1611B/5912 vs. 1710.
*/ */
#if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap310
# undef cpu_is_omap1510
# define cpu_is_omap310() is_omap310()
# define cpu_is_omap1510() is_omap1510()
#endif
#if defined(CONFIG_ARCH_OMAP16XX) #if defined(CONFIG_ARCH_OMAP16XX)
# undef cpu_is_omap1610 # undef cpu_is_omap1610
# undef cpu_is_omap1611 # undef cpu_is_omap1611
...@@ -208,9 +233,20 @@ IS_OMAP_TYPE(2420, 0x2420) ...@@ -208,9 +233,20 @@ IS_OMAP_TYPE(2420, 0x2420)
# define cpu_is_omap1710() is_omap1710() # define cpu_is_omap1710() is_omap1710()
#endif #endif
#if defined(CONFIG_ARCH_OMAP2420) #if defined(CONFIG_ARCH_OMAP24XX)
# undef cpu_is_omap2420 # undef cpu_is_omap2420
# define cpu_is_omap2420() 1 # undef cpu_is_omap2422
# undef cpu_is_omap2423
# undef cpu_is_omap2430
# define cpu_is_omap2420() is_omap2420()
# define cpu_is_omap2422() is_omap2422()
# define cpu_is_omap2423() is_omap2423()
# define cpu_is_omap2430() is_omap2430()
#endif #endif
/* Macros to detect if we have OMAP1 or OMAP2 */
#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \
cpu_is_omap16xx())
#define cpu_class_is_omap2() cpu_is_omap24xx()
#endif #endif
This diff is collapsed.
...@@ -10,6 +10,20 @@ ...@@ -10,6 +10,20 @@
#if defined(CONFIG_ARCH_OMAP1) #if defined(CONFIG_ARCH_OMAP1)
#if defined(CONFIG_ARCH_OMAP730) && \
(defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
#error "FIXME: OMAP730 doesn't support multiple-OMAP"
#elif defined(CONFIG_ARCH_OMAP730)
#define INT_IH2_IRQ INT_730_IH2_IRQ
#elif defined(CONFIG_ARCH_OMAP15XX)
#define INT_IH2_IRQ INT_1510_IH2_IRQ
#elif defined(CONFIG_ARCH_OMAP16XX)
#define INT_IH2_IRQ INT_1610_IH2_IRQ
#else
#warning "IH2 IRQ defaulted"
#define INT_IH2_IRQ INT_1510_IH2_IRQ
#endif
.macro disable_fiq .macro disable_fiq
.endm .endm
......
...@@ -19,7 +19,7 @@ ...@@ -19,7 +19,7 @@
#ifndef __ASM_ARCH_OMAP_FPGA_H #ifndef __ASM_ARCH_OMAP_FPGA_H
#define __ASM_ARCH_OMAP_FPGA_H #define __ASM_ARCH_OMAP_FPGA_H
#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP1510) #if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
extern void omap1510_fpga_init_irq(void); extern void omap1510_fpga_init_irq(void);
#else #else
#define omap1510_fpga_init_irq() (0) #define omap1510_fpga_init_irq() (0)
...@@ -77,6 +77,8 @@ struct h2p2_dbg_fpga { ...@@ -77,6 +77,8 @@ struct h2p2_dbg_fpga {
#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 #define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) #define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
/* /*
* --------------------------------------------------------------------------- * ---------------------------------------------------------------------------
......
...@@ -67,7 +67,7 @@ ...@@ -67,7 +67,7 @@
#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \ #define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \
IH_MPUIO_BASE + ((nr) & 0x0f) : \ IH_MPUIO_BASE + ((nr) & 0x0f) : \
IH_GPIO_BASE + ((nr) & 0x3f)) IH_GPIO_BASE + (nr))
extern int omap_gpio_init(void); /* Call from board init only */ extern int omap_gpio_init(void); /* Call from board init only */
extern int omap_request_gpio(int gpio); extern int omap_request_gpio(int gpio);
......
...@@ -267,8 +267,6 @@ ...@@ -267,8 +267,6 @@
#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00) #define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) #define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
#ifndef __ASSEMBLER__
/* /*
* --------------------------------------------------------------------------- * ---------------------------------------------------------------------------
* Processor specific defines * Processor specific defines
...@@ -277,13 +275,11 @@ ...@@ -277,13 +275,11 @@
#include "omap730.h" #include "omap730.h"
#include "omap1510.h" #include "omap1510.h"
#ifdef CONFIG_ARCH_OMAP24XX
#include "omap24xx.h" #include "omap24xx.h"
#endif
#include "omap16xx.h" #include "omap16xx.h"
#ifndef __ASSEMBLER__
/* /*
* --------------------------------------------------------------------------- * ---------------------------------------------------------------------------
* Board specific defines * Board specific defines
......
...@@ -52,23 +52,33 @@ ...@@ -52,23 +52,33 @@
* ---------------------------------------------------------------------------- * ----------------------------------------------------------------------------
*/ */
#define PCIO_BASE 0
#if defined(CONFIG_ARCH_OMAP1) #if defined(CONFIG_ARCH_OMAP1)
#define IO_PHYS 0xFFFB0000 #define IO_PHYS 0xFFFB0000
#define IO_OFFSET -0x01000000 /* Virtual IO = 0xfefb0000 */ #define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
#define IO_SIZE 0x40000 #define IO_SIZE 0x40000
#define IO_VIRT (IO_PHYS - IO_OFFSET)
#define IO_ADDRESS(pa) ((pa) - IO_OFFSET)
#define io_p2v(pa) ((pa) - IO_OFFSET)
#define io_v2p(va) ((va) + IO_OFFSET)
#elif defined(CONFIG_ARCH_OMAP2) #elif defined(CONFIG_ARCH_OMAP2)
#define IO_PHYS 0x48000000 /* L4 peripherals; other stuff has to be mapped *
* manually. */
#define IO_OFFSET 0x90000000 /* Virtual IO = 0xd8000000 */
#define IO_SIZE 0x08000000
#endif
#define IO_VIRT (IO_PHYS + IO_OFFSET) /* We map both L3 and L4 on OMAP2 */
#define IO_ADDRESS(x) ((x) + IO_OFFSET) #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */
#define PCIO_BASE 0 #define L3_24XX_VIRT 0xf8000000
#define io_p2v(x) ((x) + IO_OFFSET) #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
#define io_v2p(x) ((x) - IO_OFFSET) #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */
#define L4_24XX_VIRT 0xd8000000
#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
#define IO_OFFSET 0x90000000
#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
#endif
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
......
...@@ -22,8 +22,8 @@ ...@@ -22,8 +22,8 @@
* are different. * are different.
*/ */
#ifndef __ASM_ARCH_OMAP1510_IRQS_H #ifndef __ASM_ARCH_OMAP15XX_IRQS_H
#define __ASM_ARCH_OMAP1510_IRQS_H #define __ASM_ARCH_OMAP15XX_IRQS_H
/* /*
* IRQ numbers for interrupt handler 1 * IRQ numbers for interrupt handler 1
...@@ -31,7 +31,6 @@ ...@@ -31,7 +31,6 @@
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
* *
*/ */
#define INT_IH2_IRQ 0
#define INT_CAMERA 1 #define INT_CAMERA 1
#define INT_FIQ 3 #define INT_FIQ 3
#define INT_RTDX 6 #define INT_RTDX 6
...@@ -60,6 +59,7 @@ ...@@ -60,6 +59,7 @@
/* /*
* OMAP-1510 specific IRQ numbers for interrupt handler 1 * OMAP-1510 specific IRQ numbers for interrupt handler 1
*/ */
#define INT_1510_IH2_IRQ 0
#define INT_1510_RES2 2 #define INT_1510_RES2 2
#define INT_1510_SPI_TX 4 #define INT_1510_SPI_TX 4
#define INT_1510_SPI_RX 5 #define INT_1510_SPI_RX 5
...@@ -71,6 +71,7 @@ ...@@ -71,6 +71,7 @@
/* /*
* OMAP-1610 specific IRQ numbers for interrupt handler 1 * OMAP-1610 specific IRQ numbers for interrupt handler 1
*/ */
#define INT_1610_IH2_IRQ 0
#define INT_1610_IH2_FIQ 2 #define INT_1610_IH2_FIQ 2
#define INT_1610_McBSP2_TX 4 #define INT_1610_McBSP2_TX 4
#define INT_1610_McBSP2_RX 5 #define INT_1610_McBSP2_RX 5
...@@ -231,6 +232,12 @@ ...@@ -231,6 +232,12 @@
#define INT_730_DMA_CH15 (62 + IH2_BASE) #define INT_730_DMA_CH15 (62 + IH2_BASE)
#define INT_730_NAND (63 + IH2_BASE) #define INT_730_NAND (63 + IH2_BASE)
#define INT_24XX_SYS_NIRQ 7
#define INT_24XX_SDMA_IRQ0 12
#define INT_24XX_SDMA_IRQ1 13
#define INT_24XX_SDMA_IRQ2 14
#define INT_24XX_SDMA_IRQ3 15
#define INT_24XX_DSS_IRQ 25
#define INT_24XX_GPIO_BANK1 29 #define INT_24XX_GPIO_BANK1 29
#define INT_24XX_GPIO_BANK2 30 #define INT_24XX_GPIO_BANK2 30
#define INT_24XX_GPIO_BANK3 31 #define INT_24XX_GPIO_BANK3 31
......
...@@ -61,7 +61,7 @@ ...@@ -61,7 +61,7 @@
* Note that the is_lbus_device() test is not very efficient on 1510 * Note that the is_lbus_device() test is not very efficient on 1510
* because of the strncmp(). * because of the strncmp().
*/ */
#ifdef CONFIG_ARCH_OMAP1510 #ifdef CONFIG_ARCH_OMAP15XX
/* /*
* OMAP-1510 Local Bus address offset * OMAP-1510 Local Bus address offset
...@@ -84,7 +84,7 @@ ...@@ -84,7 +84,7 @@
virt_to_lbus(addr) : \ virt_to_lbus(addr) : \
__virt_to_bus(addr);}) __virt_to_bus(addr);})
#endif /* CONFIG_ARCH_OMAP1510 */ #endif /* CONFIG_ARCH_OMAP15XX */
#endif #endif
/*
* linux/include/asm-arm/arch-omap/menelaus.h
*
* Functions to access Menelaus power management chip
*/
#ifndef __ASM_ARCH_MENELAUS_H
#define __ASM_ARCH_MENELAUS_H
extern void menelaus_mmc_register(void (*callback)(u8 card_mask),
unsigned long data);
extern void menelaus_mmc_remove(void);
extern void menelaus_mmc_opendrain(int enable);
#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS)
#define omap_has_menelaus() 1
#else
#define omap_has_menelaus() 0
#endif
#endif
This diff is collapsed.
...@@ -25,8 +25,8 @@ ...@@ -25,8 +25,8 @@
* 675 Mass Ave, Cambridge, MA 02139, USA. * 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
#ifndef __ASM_ARCH_OMAP1510_H #ifndef __ASM_ARCH_OMAP15XX_H
#define __ASM_ARCH_OMAP1510_H #define __ASM_ARCH_OMAP15XX_H
/* /*
* ---------------------------------------------------------------------------- * ----------------------------------------------------------------------------
...@@ -44,5 +44,5 @@ ...@@ -44,5 +44,5 @@
#define OMAP1510_DSPREG_SIZE SZ_128K #define OMAP1510_DSPREG_SIZE SZ_128K
#define OMAP1510_DSPREG_START 0xE1000000 #define OMAP1510_DSPREG_START 0xE1000000
#endif /* __ASM_ARCH_OMAP1510_H */ #endif /* __ASM_ARCH_OMAP15XX_H */
#ifndef __ASM_ARCH_OMAP24XX_H #ifndef __ASM_ARCH_OMAP24XX_H
#define __ASM_ARCH_OMAP24XX_H #define __ASM_ARCH_OMAP24XX_H
#define OMAP24XX_L4_IO_BASE 0x48000000 /*
* Please place only base defines here and put the rest in device
* specific headers. Note also that some of these defines are needed
* for omap1 to compile without adding ifdefs.
*/
#define L4_24XX_BASE 0x48000000
#define L3_24XX_BASE 0x68000000
/* interrupt controller */ /* interrupt controller */
#define OMAP24XX_IC_BASE (OMAP24XX_L4_IO_BASE + 0xfe000) #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) #define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
#define OMAP24XX_IVA_INTC_BASE 0x40000000 #define OMAP24XX_IVA_INTC_BASE 0x40000000
#define IRQ_SIR_IRQ 0x0040 #define IRQ_SIR_IRQ 0x0040
#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000)
#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000)
#endif /* __ASM_ARCH_OMAP24XX_H */ #endif /* __ASM_ARCH_OMAP24XX_H */
/*
* File: include/asm-arm/arch-omap/omapfb.h
*
* Framebuffer driver for TI OMAP boards
*
* Copyright (C) 2004 Nokia Corporation
* Author: Imre Deak <imre.deak@nokia.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#ifndef __OMAPFB_H
#define __OMAPFB_H
/* IOCTL commands. */
#define OMAP_IOW(num, dtype) _IOW('O', num, dtype)
#define OMAP_IOR(num, dtype) _IOR('O', num, dtype)
#define OMAP_IOWR(num, dtype) _IOWR('O', num, dtype)
#define OMAP_IO(num) _IO('O', num)
#define OMAPFB_MIRROR OMAP_IOW(31, int)
#define OMAPFB_SYNC_GFX OMAP_IO(37)
#define OMAPFB_VSYNC OMAP_IO(38)
#define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, enum omapfb_update_mode)
#define OMAPFB_GET_CAPS OMAP_IOR(42, unsigned long)
#define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, enum omapfb_update_mode)
#define OMAPFB_LCD_TEST OMAP_IOW(45, int)
#define OMAPFB_CTRL_TEST OMAP_IOW(46, int)
#define OMAPFB_UPDATE_WINDOW OMAP_IOW(47, struct omapfb_update_window)
#define OMAPFB_SETUP_PLANE OMAP_IOW(48, struct omapfb_setup_plane)
#define OMAPFB_ENABLE_PLANE OMAP_IOW(49, struct omapfb_enable_plane)
#define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key)
#define OMAPFB_CAPS_GENERIC_MASK 0x00000fff
#define OMAPFB_CAPS_LCDC_MASK 0x00fff000
#define OMAPFB_CAPS_PANEL_MASK 0xff000000
#define OMAPFB_CAPS_MANUAL_UPDATE 0x00001000
#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000
/* Values from DSP must map to lower 16-bits */
#define OMAPFB_FORMAT_MASK 0x00ff
#define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100
enum omapfb_color_format {
OMAPFB_COLOR_RGB565 = 0,
OMAPFB_COLOR_YUV422,
OMAPFB_COLOR_YUV420,
OMAPFB_COLOR_CLUT_8BPP,
OMAPFB_COLOR_CLUT_4BPP,
OMAPFB_COLOR_CLUT_2BPP,
OMAPFB_COLOR_CLUT_1BPP,
};
struct omapfb_update_window {
u32 x, y;
u32 width, height;
u32 format;
};
enum omapfb_plane {
OMAPFB_PLANE_GFX = 0,
OMAPFB_PLANE_VID1,
OMAPFB_PLANE_VID2,
};
enum omapfb_channel_out {
OMAPFB_CHANNEL_OUT_LCD = 0,
OMAPFB_CHANNEL_OUT_DIGIT,
};
struct omapfb_setup_plane {
u8 plane;
u8 channel_out;
u32 offset;
u32 pos_x, pos_y;
u32 width, height;
u32 color_mode;
};
struct omapfb_enable_plane {
u8 plane;
u8 enable;
};
enum omapfb_color_key_type {
OMAPFB_COLOR_KEY_DISABLED = 0,
OMAPFB_COLOR_KEY_GFX_DST,
OMAPFB_COLOR_KEY_VID_SRC,
};
struct omapfb_color_key {
u8 channel_out;
u32 background;
u32 trans_key;
u8 key_type;
};
enum omapfb_update_mode {
OMAPFB_UPDATE_DISABLED = 0,
OMAPFB_AUTO_UPDATE,
OMAPFB_MANUAL_UPDATE
};
#ifdef __KERNEL__
#include <linux/completion.h>
#include <linux/interrupt.h>
#include <linux/fb.h>
#define OMAP_LCDC_INV_VSYNC 0x0001
#define OMAP_LCDC_INV_HSYNC 0x0002
#define OMAP_LCDC_INV_PIX_CLOCK 0x0004
#define OMAP_LCDC_INV_OUTPUT_EN 0x0008
#define OMAP_LCDC_HSVS_RISING_EDGE 0x0010
#define OMAP_LCDC_HSVS_OPPOSITE 0x0020
#define OMAP_LCDC_SIGNAL_MASK 0x003f
#define OMAP_LCDC_PANEL_TFT 0x0100
#ifdef CONFIG_ARCH_OMAP1
#define OMAPFB_PLANE_NUM 1
#else
#define OMAPFB_PLANE_NUM 3
#endif
struct omapfb_device;
struct lcd_panel {
const char *name;
int config; /* TFT/STN, signal inversion */
int bpp; /* Pixel format in fb mem */
int data_lines; /* Lines on LCD HW interface */
int x_res, y_res;
int pixel_clock; /* In kHz */
int hsw; /* Horizontal synchronization
pulse width */
int hfp; /* Horizontal front porch */
int hbp; /* Horizontal back porch */
int vsw; /* Vertical synchronization
pulse width */
int vfp; /* Vertical front porch */
int vbp; /* Vertical back porch */
int acb; /* ac-bias pin frequency */
int pcd; /* pixel clock divider.
Obsolete use pixel_clock instead */
int (*init) (struct omapfb_device *fbdev);
void (*cleanup) (void);
int (*enable) (void);
void (*disable) (void);
unsigned long (*get_caps) (void);
int (*set_bklight_level)(unsigned int level);
unsigned int (*get_bklight_level)(void);
unsigned int (*get_bklight_max) (void);
int (*run_test) (int test_num);
};
struct omapfb_device;
struct extif_timings {
int cs_on_time;
int cs_off_time;
int we_on_time;
int we_off_time;
int re_on_time;
int re_off_time;
int we_cycle_time;
int re_cycle_time;
int cs_pulse_width;
int access_time;
};
struct lcd_ctrl_extif {
int (*init) (void);
void (*cleanup) (void);
void (*set_timings) (const struct extif_timings *timings);
void (*write_command) (u32 cmd);
u32 (*read_data) (void);
void (*write_data) (u32 data);
void (*transfer_area) (int width, int height,
void (callback)(void * data), void *data);
};
struct lcd_ctrl {
const char *name;
void *data;
int (*init) (struct omapfb_device *fbdev,
int ext_mode, int req_vram_size);
void (*cleanup) (void);
void (*get_vram_layout)(unsigned long *size,
void **virt_base,
dma_addr_t *phys_base);
unsigned long (*get_caps) (void);
int (*set_update_mode)(enum omapfb_update_mode mode);
enum omapfb_update_mode (*get_update_mode)(void);
int (*setup_plane) (int plane, int channel_out,
unsigned long offset,
int screen_width,
int pos_x, int pos_y, int width,
int height, int color_mode);
int (*enable_plane) (int plane, int enable);
int (*update_window) (struct omapfb_update_window *win,
void (*callback)(void *),
void *callback_data);
void (*sync) (void);
void (*suspend) (void);
void (*resume) (void);
int (*run_test) (int test_num);
int (*setcolreg) (u_int regno, u16 red, u16 green,
u16 blue, u16 transp,
int update_hw_mem);
int (*set_color_key) (struct omapfb_color_key *ck);
};
enum omapfb_state {
OMAPFB_DISABLED = 0,
OMAPFB_SUSPENDED= 99,
OMAPFB_ACTIVE = 100
};
struct omapfb_device {
int state;
int ext_lcdc; /* Using external
LCD controller */
struct semaphore rqueue_sema;
void *vram_virt_base;
dma_addr_t vram_phys_base;
unsigned long vram_size;
int color_mode;
int palette_size;
int mirror;
u32 pseudo_palette[17];
struct lcd_panel *panel; /* LCD panel */
struct lcd_ctrl *ctrl; /* LCD controller */
struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */
struct lcd_ctrl_extif *ext_if; /* LCD ctrl external
interface */
struct fb_info *fb_info;
struct device *dev;
};
extern struct lcd_panel h3_panel;
extern struct lcd_panel h2_panel;
extern struct lcd_panel p2_panel;
extern struct lcd_panel osk_panel;
extern struct lcd_panel innovator1610_panel;
extern struct lcd_panel innovator1510_panel;
#ifdef CONFIG_ARCH_OMAP1
extern struct lcd_ctrl omap1_lcd_ctrl;
#else
extern struct lcd_ctrl omap2_disp_ctrl;
#endif
extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval);
#endif /* __KERNEL__ */
#endif /* __OMAPFB_H */
...@@ -98,7 +98,14 @@ ...@@ -98,7 +98,14 @@
#define OMAP1610_IDLECT3 0xfffece24 #define OMAP1610_IDLECT3 0xfffece24
#define OMAP1610_IDLE_LOOP_REQUEST 0x0400 #define OMAP1610_IDLE_LOOP_REQUEST 0x0400
#if !defined(CONFIG_ARCH_OMAP1510) && \ #define OMAP730_IDLECT1_SLEEP_VAL 0x16c7
#define OMAP730_IDLECT2_SLEEP_VAL 0x09c7
#define OMAP730_IDLECT3_VAL 0x3f
#define OMAP730_IDLECT3 0xfffece24
#define OMAP730_IDLE_LOOP_REQUEST 0x0C00
#if !defined(CONFIG_ARCH_OMAP730) && \
!defined(CONFIG_ARCH_OMAP15XX) && \
!defined(CONFIG_ARCH_OMAP16XX) && \ !defined(CONFIG_ARCH_OMAP16XX) && \
!defined(CONFIG_ARCH_OMAP24XX) !defined(CONFIG_ARCH_OMAP24XX)
#error "Power management for this processor not implemented yet" #error "Power management for this processor not implemented yet"
...@@ -107,8 +114,10 @@ ...@@ -107,8 +114,10 @@
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
extern void omap_pm_idle(void); extern void omap_pm_idle(void);
extern void omap_pm_suspend(void); extern void omap_pm_suspend(void);
extern void omap730_cpu_suspend(unsigned short, unsigned short);
extern void omap1510_cpu_suspend(unsigned short, unsigned short); extern void omap1510_cpu_suspend(unsigned short, unsigned short);
extern void omap1610_cpu_suspend(unsigned short, unsigned short); extern void omap1610_cpu_suspend(unsigned short, unsigned short);
extern void omap730_idle_loop_suspend(void);
extern void omap1510_idle_loop_suspend(void); extern void omap1510_idle_loop_suspend(void);
extern void omap1610_idle_loop_suspend(void); extern void omap1610_idle_loop_suspend(void);
...@@ -118,6 +127,8 @@ extern void omap_serial_wake_trigger(int enable); ...@@ -118,6 +127,8 @@ extern void omap_serial_wake_trigger(int enable);
#define omap_serial_wake_trigger(x) {} #define omap_serial_wake_trigger(x) {}
#endif /* CONFIG_OMAP_SERIAL_WAKE */ #endif /* CONFIG_OMAP_SERIAL_WAKE */
extern unsigned int omap730_cpu_suspend_sz;
extern unsigned int omap730_idle_loop_suspend_sz;
extern unsigned int omap1510_cpu_suspend_sz; extern unsigned int omap1510_cpu_suspend_sz;
extern unsigned int omap1510_idle_loop_suspend_sz; extern unsigned int omap1510_idle_loop_suspend_sz;
extern unsigned int omap1610_cpu_suspend_sz; extern unsigned int omap1610_cpu_suspend_sz;
...@@ -131,6 +142,10 @@ extern unsigned int omap1610_idle_loop_suspend_sz; ...@@ -131,6 +142,10 @@ extern unsigned int omap1610_idle_loop_suspend_sz;
#define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x))
#define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]
#define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x)
#define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x))
#define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]
#define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x)
#define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x))
#define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] #define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]
...@@ -188,13 +203,34 @@ enum mpui1510_save_state { ...@@ -188,13 +203,34 @@ enum mpui1510_save_state {
MPUI1510_SLEEP_SAVE_EMIFS_CONFIG, MPUI1510_SLEEP_SAVE_EMIFS_CONFIG,
MPUI1510_SLEEP_SAVE_OMAP_IH1_MIR, MPUI1510_SLEEP_SAVE_OMAP_IH1_MIR,
MPUI1510_SLEEP_SAVE_OMAP_IH2_MIR, MPUI1510_SLEEP_SAVE_OMAP_IH2_MIR,
#if defined(CONFIG_ARCH_OMAP1510) #if defined(CONFIG_ARCH_OMAP15XX)
MPUI1510_SLEEP_SAVE_SIZE MPUI1510_SLEEP_SAVE_SIZE
#else #else
MPUI1510_SLEEP_SAVE_SIZE = 0 MPUI1510_SLEEP_SAVE_SIZE = 0
#endif #endif
}; };
enum mpui730_save_state {
MPUI730_SLEEP_SAVE_START = 0,
/*
* MPUI registers 32 bits
*/
MPUI730_SLEEP_SAVE_MPUI_CTRL,
MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG,
MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG,
MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS,
MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG,
MPUI730_SLEEP_SAVE_EMIFS_CONFIG,
MPUI730_SLEEP_SAVE_OMAP_IH1_MIR,
MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR,
MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR,
#if defined(CONFIG_ARCH_OMAP730)
MPUI730_SLEEP_SAVE_SIZE
#else
MPUI730_SLEEP_SAVE_SIZE = 0
#endif
};
enum mpui1610_save_state { enum mpui1610_save_state {
MPUI1610_SLEEP_SAVE_START = 0, MPUI1610_SLEEP_SAVE_START = 0,
/* /*
......
This diff is collapsed.
/*
* linux/include/asm-arm/arch-omap/sram.h
*
* Interface for functions that need to be run in internal SRAM
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_OMAP_SRAM_H
#define __ARCH_ARM_OMAP_SRAM_H
extern void * omap_sram_push(void * start, unsigned long size);
extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
u32 mem_type);
extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
/* Do not use these */
extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long sram_reprogram_clock_sz;
extern void sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern unsigned long sram_ddr_init_sz;
extern u32 sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
extern unsigned long sram_set_prcm_sz;
extern void sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type);
extern unsigned long sram_reprogram_sdrc_sz;
#endif
...@@ -6,18 +6,21 @@ ...@@ -6,18 +6,21 @@
#define __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H
#include <linux/config.h> #include <linux/config.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/hardware/clock.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include <asm/mach-types.h> #include <asm/arch/prcm.h>
#ifndef CONFIG_MACH_VOICEBLUE
#define voiceblue_reset() do {} while (0)
#endif
static inline void arch_idle(void) static inline void arch_idle(void)
{ {
cpu_do_idle(); cpu_do_idle();
} }
static inline void arch_reset(char mode) static inline void omap1_arch_reset(char mode)
{ {
#ifdef CONFIG_ARCH_OMAP16XX
/* /*
* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
* "Global Software Reset Affects Traffic Controller Frequency". * "Global Software Reset Affects Traffic Controller Frequency".
...@@ -27,13 +30,31 @@ static inline void arch_reset(char mode) ...@@ -27,13 +30,31 @@ static inline void arch_reset(char mode)
DPLL_CTL); DPLL_CTL);
omap_writew(0x8, ARM_RSTCT1); omap_writew(0x8, ARM_RSTCT1);
} }
#endif
#ifdef CONFIG_MACH_VOICEBLUE
if (machine_is_voiceblue()) if (machine_is_voiceblue())
voiceblue_reset(); voiceblue_reset();
else else
#endif
omap_writew(1, ARM_RSTCT1); omap_writew(1, ARM_RSTCT1);
} }
static inline void omap2_arch_reset(char mode)
{
u32 rate;
struct clk *vclk, *sclk;
vclk = clk_get(NULL, "virt_prcm_set");
sclk = clk_get(NULL, "sys_ck");
rate = clk_get_rate(sclk);
clk_set_rate(vclk, rate); /* go to bypass for OMAP limitation */
RM_RSTCTRL_WKUP |= 2;
}
static inline void arch_reset(char mode)
{
if (!cpu_is_omap24xx())
omap1_arch_reset(mode);
else
omap2_arch_reset(mode);
}
#endif #endif
...@@ -28,6 +28,14 @@ ...@@ -28,6 +28,14 @@
#if !defined(__ASM_ARCH_OMAP_TIMEX_H) #if !defined(__ASM_ARCH_OMAP_TIMEX_H)
#define __ASM_ARCH_OMAP_TIMEX_H #define __ASM_ARCH_OMAP_TIMEX_H
/*
* OMAP 32KHz timer updates time one jiffie at a time from a secondary timer,
* and that's why the CLOCK_TICK_RATE is not 32768.
*/
#ifdef CONFIG_OMAP_32K_TIMER
#define CLOCK_TICK_RATE (CONFIG_OMAP_32K_TIMER_HZ)
#else
#define CLOCK_TICK_RATE (HZ * 100000UL) #define CLOCK_TICK_RATE (HZ * 100000UL)
#endif
#endif /* __ASM_ARCH_OMAP_TIMEX_H */ #endif /* __ASM_ARCH_OMAP_TIMEX_H */
...@@ -36,10 +36,14 @@ putstr(const char *s) ...@@ -36,10 +36,14 @@ putstr(const char *s)
volatile u8 * uart = 0; volatile u8 * uart = 0;
int shift = 2; int shift = 2;
#ifdef CONFIG_MACH_OMAP_PALMTE
return;
#endif
#ifdef CONFIG_ARCH_OMAP #ifdef CONFIG_ARCH_OMAP
#ifdef CONFIG_OMAP_LL_DEBUG_UART3 #ifdef CONFIG_OMAP_LL_DEBUG_UART3
uart = (volatile u8 *)(OMAP_UART3_BASE); uart = (volatile u8 *)(OMAP_UART3_BASE);
#elif CONFIG_OMAP_LL_DEBUG_UART2 #elif defined(CONFIG_OMAP_LL_DEBUG_UART2)
uart = (volatile u8 *)(OMAP_UART2_BASE); uart = (volatile u8 *)(OMAP_UART2_BASE);
#else #else
uart = (volatile u8 *)(OMAP_UART1_BASE); uart = (volatile u8 *)(OMAP_UART1_BASE);
......
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