Merge intel.com:/home/lenb/bk/linux-2.6.0

into intel.com:/home/lenb/bk/linux-acpi-test-2.6.0

Documentation/kernel-parameters.txt

@@ -91,6 +91,11 @@ running once the system is up.
 			ht -- run only enough ACPI to enable Hyper Threading
 			See also Documentation/pm.txt.
  
+	acpi_pic_sci=	[HW,ACPI] ACPI System Control Interrupt trigger mode
+			Format: { level | edge }
+			level   Force PIC-mode SCI to Level Trigger (default)
+			edge    Force PIC-mode SCI to Edge Trigge
+
 	ad1816=		[HW,OSS]
 			Format: <io>,<irq>,<dma>,<dma2>
 			See also Documentation/sound/oss/AD1816.

arch/i386/kernel/acpi/boot.c

@@ -249,29 +249,66 @@ acpi_parse_nmi_src (
 
 #ifdef	CONFIG_ACPI_BUS
 /*
- * Set specified PIC IRQ to level triggered mode.
+ * "acpi_pic_sci=level" (current default)
+ * programs the PIC-mode SCI to Level Trigger.
+ * (NO-OP if the BIOS set Level Trigger already)
+ *
+ * If a PIC-mode SCI is not recogznied or gives spurious IRQ7's
+ * it may require Edge Trigger -- use "acpi_pic_sci=edge"
+ * (NO-OP if the BIOS set Edge Trigger already)
  *
  * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
  * for the 8259 PIC.  bit[n] = 1 means irq[n] is Level, otherwise Edge.
  * ECLR1 is IRQ's 0-7 (IRQ 0, 1, 2 must be 0)
  * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0)
- *
- * As the BIOS should have done this for us,
- * print a warning if the IRQ wasn't already set to level.
  */
 
-void acpi_pic_set_level_irq(unsigned int irq)
+static __initdata	acpi_pic_sci_trigger;	/* 0: level, 1: edge */
+
+void __init
+acpi_pic_sci_set_trigger(unsigned int irq)
 {
 	unsigned char mask = 1 << (irq & 7);
 	unsigned int port = 0x4d0 + (irq >> 3);
 	unsigned char val = inb(port);
 
+	
+	printk(PREFIX "IRQ%d SCI:", irq);
 	if (!(val & mask)) {
-		printk(KERN_WARNING PREFIX "IRQ %d was Edge Triggered, "
-			"setting to Level Triggerd\n", irq);
-		outb(val | mask, port);
+		printk(" Edge");
+
+		if (!acpi_pic_sci_trigger) {
+			printk(" set to Level");
+			outb(val | mask, port);
+		}
+	} else {
+		printk(" Level");
+
+		if (acpi_pic_sci_trigger) {
+			printk(" set to Edge");
+			outb(val | mask, port);
+		}
 	}
+	printk(" Trigger.\n");
 }
+
+int __init
+acpi_pic_sci_setup(char *str)
+{
+	while (str && *str) {
+		if (strncmp(str, "level", 5) == 0)
+			acpi_pic_sci_trigger = 0;	/* force level trigger */
+		if (strncmp(str, "edge", 4) == 0)
+			acpi_pic_sci_trigger = 1;	/* force edge trigger */
+		str = strchr(str, ',');
+		if (str)
+			str += strspn(str, ", \t");
+	}
+	return 1;
+}
+
+__setup("acpi_pic_sci=", acpi_pic_sci_setup);
+
 #endif /* CONFIG_ACPI_BUS */
 
 

arch/i386/kernel/dmi_scan.c

@@ -1011,6 +1011,7 @@ static __init void dmi_check_blacklist(void)
 				printk(KERN_NOTICE "ACPI disabled because your bios is from %s and too old\n", s);
 				printk(KERN_NOTICE "You can enable it with acpi=force\n");
 				acpi_disabled = 1; 
+				acpi_ht = 0;
 			} 
 		}
 	}

arch/i386/kernel/io_apic.c

@@ -1624,10 +1624,6 @@ static void __init setup_ioapic_ids_from_mpc(void)
 	unsigned char old_id;
 	unsigned long flags;
 
-	if (acpi_ioapic)
-		/* This gets done during IOAPIC enumeration for ACPI. */
-		return;
-
 	/*
 	 * This is broken; anything with a real cpu count has to
 	 * circumvent this idiocy regardless.
@@ -2217,12 +2213,14 @@ void __init setup_IO_APIC(void)
 	/*
 	 * Set up IO-APIC IRQ routing.
 	 */
-	setup_ioapic_ids_from_mpc();
+	if (!acpi_ioapic)
+		setup_ioapic_ids_from_mpc();
 	sync_Arb_IDs();
 	setup_IO_APIC_irqs();
 	init_IO_APIC_traps();
 	check_timer();
-	print_IO_APIC();
+	if (!acpi_ioapic)
+		print_IO_APIC();
 }
 
 /*

arch/i386/kernel/mpparse.c

@@ -1162,6 +1162,10 @@ void __init mp_parse_prt (void)
 			mp_ioapic_routing[ioapic].apic_id, ioapic_pin, 
 			entry->irq);
 	}
+
+	print_IO_APIC();
+
+	return;
 }
 
 #endif /*CONFIG_ACPI_PCI*/

arch/x86_64/kernel/acpi/boot.c

@@ -253,29 +253,66 @@ acpi_parse_hpet (
 
 #ifdef CONFIG_ACPI_BUS
 /*
- * Set specified PIC IRQ to level triggered mode.
+ * "acpi_pic_sci=level" (current default)
+ * programs the PIC-mode SCI to Level Trigger.
+ * (NO-OP if the BIOS set Level Trigger already)
+ *
+ * If a PIC-mode SCI is not recogznied or gives spurious IRQ7's
+ * it may require Edge Trigger -- use "acpi_pic_sci=edge"
+ * (NO-OP if the BIOS set Edge Trigger already)
  *
  * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
  * for the 8259 PIC.  bit[n] = 1 means irq[n] is Level, otherwise Edge.
  * ECLR1 is IRQ's 0-7 (IRQ 0, 1, 2 must be 0)
  * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0)
- *
- * As the BIOS should have done this for us,
- * print a warning if the IRQ wasn't already set to level.
  */
 
-void acpi_pic_set_level_irq(unsigned int irq)
+static __initdata	acpi_pic_sci_trigger;	/* 0: level, 1: edge */
+
+void __init
+acpi_pic_sci_set_trigger(unsigned int irq)
 {
 	unsigned char mask = 1 << (irq & 7);
 	unsigned int port = 0x4d0 + (irq >> 3);
 	unsigned char val = inb(port);
 
+	
+	printk(PREFIX "IRQ%d SCI:", irq);
 	if (!(val & mask)) {
-		printk(KERN_WARNING PREFIX "IRQ %d was Edge Triggered, "
-			"setting to Level Triggerd\n", irq);
-		outb(val | mask, port);
+		printk(" Edge");
+
+		if (!acpi_pic_sci_trigger) {
+			printk(" set to Level");
+			outb(val | mask, port);
+		}
+	} else {
+		printk(" Level");
+
+		if (acpi_pic_sci_trigger) {
+			printk(" set to Edge");
+			outb(val | mask, port);
+		}
+	}
+	printk(" Trigger.\n");
+}
+
+int __init
+acpi_pic_sci_setup(char *str)
+{
+	while (str && *str) {
+		if (strncmp(str, "level", 5) == 0)
+			acpi_pic_sci_trigger = 0;	/* force level trigger */
+		if (strncmp(str, "edge", 4) == 0)
+			acpi_pic_sci_trigger = 1;	/* force edge trigger */
+		str = strchr(str, ',');
+		if (str)
+			str += strspn(str, ", \t");
 	}
+	return 1;
 }
+
+__setup("acpi_pic_sci=", acpi_pic_sci_setup);
+
 #endif /* CONFIG_ACPI_BUS */
 
 static unsigned long __init

arch/x86_64/kernel/io_apic.c

@@ -1087,8 +1087,6 @@ static void __init setup_ioapic_ids_from_mpc (void)
 	unsigned char old_id;
 	unsigned long flags;
 
-	if (acpi_ioapic) return; /* ACPI does that already */
-
 	/*
 	 * Set the IOAPIC ID to the value stored in the MPC table.
 	 */
@@ -1673,12 +1671,14 @@ void __init setup_IO_APIC(void)
 	/*
 	 * Set up the IO-APIC IRQ routing table.
 	 */
-	setup_ioapic_ids_from_mpc();
+	if (!acpi_ioapic)
+		setup_ioapic_ids_from_mpc();
 	sync_Arb_IDs();
 	setup_IO_APIC_irqs();
 	init_IO_APIC_traps();
 	check_timer();
-	print_IO_APIC();
+	if (!acpi_ioapic)
+		print_IO_APIC();
 }
 
 /* Ensure the ACPI SCI interrupt level is active low, edge-triggered */

arch/x86_64/kernel/mpparse.c

@@ -950,6 +950,8 @@ void __init mp_parse_prt (void)
 			entry->irq);
 	}
 	
+	print_IO_APIC();
+
 	return;
 }
 

drivers/acpi/bus.c

@@ -39,7 +39,7 @@
 #define _COMPONENT		ACPI_BUS_COMPONENT
 ACPI_MODULE_NAME		("acpi_bus")
 
-extern void acpi_pic_set_level_irq(unsigned int irq);
+extern void __init acpi_pic_sci_set_trigger(unsigned int irq);
 
 FADT_DESCRIPTOR			acpi_fadt;
 struct acpi_device		*acpi_root;
@@ -615,7 +615,7 @@ acpi_bus_init (void)
 	if (acpi_ioapic)
 		mp_config_ioapic_for_sci(acpi_fadt.sci_int);
 	else
-		acpi_pic_set_level_irq(acpi_fadt.sci_int);
+		acpi_pic_sci_set_trigger(acpi_fadt.sci_int);
 #endif
 
 	status = acpi_enable_subsystem(ACPI_FULL_INITIALIZATION);