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Commit 9dafbbf7 authored by Kai Germaschewski's avatar Kai Germaschewski
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ISDN/HiSax: Shared sched_event() for D-channel 

No reason to duplicate sched_event() all over the drivers...
parent c2d10f68
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Inline Side-by-side
Showing with 70 additions and 148 deletions
drivers/isdn/hisax/amd7930_fn.c
View file @ 9dafbbf7
...@@ -268,18 +268,6 @@ Amd7930_bh(void *data) ...@@ -268,18 +268,6 @@ Amd7930_bh(void *data)
} }
void
Amd7930_sched_event(struct IsdnCardState *cs, int event) // ok
{
if (cs->debug & L1_DEB_ISAC) {
debugl1(cs, "AMD7930: sched_event 0x%X", event);
}
test_and_set_bit(event, &cs->event);
schedule_work(&cs->work);
}
static void static void
Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag) Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag)
{ {
...@@ -339,7 +327,7 @@ Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag) ...@@ -339,7 +327,7 @@ Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag)
/* throw damaged packets away, reset recieve-buffer, indicate RX */ /* throw damaged packets away, reset recieve-buffer, indicate RX */
ptr = cs->rcvbuf; ptr = cs->rcvbuf;
cs->rcvidx = 0; cs->rcvidx = 0;
Amd7930_sched_event(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} }
} }
/* Packet to long, overflow */ /* Packet to long, overflow */
...@@ -455,7 +443,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags) ...@@ -455,7 +443,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
Amd7930_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
/* restart frame */ /* restart frame */
if (cs->tx_skb) { if (cs->tx_skb) {
skb_push(cs->tx_skb, cs->tx_cnt); skb_push(cs->tx_skb, cs->tx_cnt);
...@@ -473,7 +461,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags) ...@@ -473,7 +461,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
Amd7930_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
/* restart TX-Frame */ /* restart TX-Frame */
if (cs->tx_skb) { if (cs->tx_skb) {
skb_push(cs->tx_skb, cs->tx_cnt); skb_push(cs->tx_skb, cs->tx_cnt);
...@@ -494,7 +482,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags) ...@@ -494,7 +482,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
Amd7930_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) if (cs->tx_skb->len)
Amd7930_fill_Dfifo(cs); Amd7930_fill_Dfifo(cs);
...@@ -523,7 +511,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags) ...@@ -523,7 +511,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
Amd7930_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
...@@ -541,7 +529,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags) ...@@ -541,7 +529,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags)
Amd7930_fill_Dfifo(cs); Amd7930_fill_Dfifo(cs);
} }
else else
Amd7930_sched_event(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
/* AMD interrupts on */ /* AMD interrupts on */
AmdIrqOn(cs); AmdIrqOn(cs);
} }
...@@ -556,7 +544,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags) ...@@ -556,7 +544,7 @@ void Amd7930_interrupt(struct IsdnCardState *cs, u8 irflags)
cs->dc.amd7930.ph_state = (lsr & 0x7) + 2; cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
Amd7930_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
/* AMD interrupts on */ /* AMD interrupts on */
AmdIrqOn(cs); AmdIrqOn(cs);
} }
...@@ -662,7 +650,7 @@ Amd7930_l1hw(struct PStack *st, int pr, void *arg) ...@@ -662,7 +650,7 @@ Amd7930_l1hw(struct PStack *st, int pr, void *arg)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
Amd7930_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
break; break;
default: default:
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
......
drivers/isdn/hisax/config.c
View file @ 9dafbbf7
...@@ -1798,12 +1798,6 @@ void hisax_unregister(struct hisax_d_if *hisax_d_if) ...@@ -1798,12 +1798,6 @@ void hisax_unregister(struct hisax_d_if *hisax_d_if)
#include "isdnl1.h" #include "isdnl1.h"
static void hisax_sched_event(struct IsdnCardState *cs, int event)
{
cs->event |= 1 << event;
schedule_work(&cs->work);
}
static void hisax_bh(void *data) static void hisax_bh(void *data)
{ {
struct IsdnCardState *cs = data; struct IsdnCardState *cs = data;
...@@ -1847,15 +1841,15 @@ static void hisax_d_l1l2(struct hisax_if *ifc, int pr, void *arg) ...@@ -1847,15 +1841,15 @@ static void hisax_d_l1l2(struct hisax_if *ifc, int pr, void *arg)
switch (pr) { switch (pr) {
case PH_ACTIVATE | INDICATION: case PH_ACTIVATE | INDICATION:
set_bit(0, &d_if->ph_state); set_bit(0, &d_if->ph_state);
hisax_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
break; break;
case PH_DEACTIVATE | INDICATION: case PH_DEACTIVATE | INDICATION:
clear_bit(0, &d_if->ph_state); clear_bit(0, &d_if->ph_state);
hisax_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
break; break;
case PH_DATA | INDICATION: case PH_DATA | INDICATION:
skb_queue_tail(&cs->rq, arg); skb_queue_tail(&cs->rq, arg);
hisax_sched_event(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
break; break;
case PH_DATA | CONFIRM: case PH_DATA | CONFIRM:
skb = skb_dequeue(&cs->sq); skb = skb_dequeue(&cs->sq);
...@@ -1873,7 +1867,7 @@ static void hisax_d_l1l2(struct hisax_if *ifc, int pr, void *arg) ...@@ -1873,7 +1867,7 @@ static void hisax_d_l1l2(struct hisax_if *ifc, int pr, void *arg)
break; break;
case PH_DATA_E | INDICATION: case PH_DATA_E | INDICATION:
skb_queue_tail(&d_if->erq, arg); skb_queue_tail(&d_if->erq, arg);
hisax_sched_event(cs, E_RCVBUFREADY); sched_d_event(cs, E_RCVBUFREADY);
break; break;
default: default:
printk("pr %#x\n", pr); printk("pr %#x\n", pr);
......
drivers/isdn/hisax/hfc_2bds0.c
View file @ 9dafbbf7
...@@ -603,13 +603,6 @@ hfcd_bh(void *data) ...@@ -603,13 +603,6 @@ hfcd_bh(void *data)
DChannel_proc_xmt(cs); DChannel_proc_xmt(cs);
} }
void
sched_event_D(struct IsdnCardState *cs, int event)
{
test_and_set_bit(event, &cs->event);
schedule_work(&cs->work);
}
static static
int receive_dmsg(struct IsdnCardState *cs) int receive_dmsg(struct IsdnCardState *cs)
{ {
...@@ -707,7 +700,7 @@ int receive_dmsg(struct IsdnCardState *cs) ...@@ -707,7 +700,7 @@ int receive_dmsg(struct IsdnCardState *cs)
#endif #endif
} else { } else {
skb_queue_tail(&cs->rq, skb); skb_queue_tail(&cs->rq, skb);
sched_event_D(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} }
} }
} else } else
...@@ -838,7 +831,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -838,7 +831,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcd.ph_state, debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcd.ph_state,
exval); exval);
cs->dc.hfcd.ph_state = exval; cs->dc.hfcd.ph_state = exval;
sched_event_D(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
val &= ~0x40; val &= ~0x40;
} }
while (val) { while (val) {
...@@ -907,7 +900,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -907,7 +900,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
sched_event_D(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) { if (cs->tx_skb->len) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
...@@ -932,7 +925,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -932,7 +925,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
debugl1(cs, "hfc_fill_dfifo irq blocked"); debugl1(cs, "hfc_fill_dfifo irq blocked");
} }
} else } else
sched_event_D(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
} }
afterXPR: afterXPR:
if (cs->hw.hfcD.int_s1 && count--) { if (cs->hw.hfcD.int_s1 && count--) {
......
drivers/isdn/hisax/hfc_pci.c
View file @ 9dafbbf7
...@@ -186,17 +186,6 @@ hfcpci_Timer(struct IsdnCardState *cs) ...@@ -186,17 +186,6 @@ hfcpci_Timer(struct IsdnCardState *cs)
*/ */
} }
/*********************************/
/* schedule a new D-channel task */
/*********************************/
static void
sched_event_D_pci(struct IsdnCardState *cs, int event)
{
test_and_set_bit(event, &cs->event);
schedule_work(&cs->work);
}
/************************************************/ /************************************************/
/* select a b-channel entry matching and active */ /* select a b-channel entry matching and active */
/************************************************/ /************************************************/
...@@ -389,7 +378,7 @@ receive_dmsg(struct IsdnCardState *cs) ...@@ -389,7 +378,7 @@ receive_dmsg(struct IsdnCardState *cs)
df->za[df->f2 & D_FREG_MASK].z2 = cpu_to_le16((le16_to_cpu(zp->z2) + total) & (D_FIFO_SIZE - 1)); df->za[df->f2 & D_FREG_MASK].z2 = cpu_to_le16((le16_to_cpu(zp->z2) + total) & (D_FIFO_SIZE - 1));
skb_queue_tail(&cs->rq, skb); skb_queue_tail(&cs->rq, skb);
sched_event_D_pci(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} else } else
printk(KERN_WARNING "HFC-PCI: D receive out of memory\n"); printk(KERN_WARNING "HFC-PCI: D receive out of memory\n");
} }
...@@ -984,13 +973,13 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -984,13 +973,13 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcpci.ph_state, debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcpci.ph_state,
exval); exval);
cs->dc.hfcpci.ph_state = exval; cs->dc.hfcpci.ph_state = exval;
sched_event_D_pci(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
val &= ~0x40; val &= ~0x40;
} }
if (val & 0x80) { /* timer irq */ if (val & 0x80) { /* timer irq */
if (cs->hw.hfcpci.nt_mode) { if (cs->hw.hfcpci.nt_mode) {
if ((--cs->hw.hfcpci.nt_timer) < 0) if ((--cs->hw.hfcpci.nt_timer) < 0)
sched_event_D_pci(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
} }
val &= ~0x80; val &= ~0x80;
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER); Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
...@@ -1063,7 +1052,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -1063,7 +1052,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
sched_event_D_pci(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) { if (cs->tx_skb->len) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
...@@ -1088,7 +1077,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -1088,7 +1077,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "hfcpci_fill_dfifo irq blocked"); debugl1(cs, "hfcpci_fill_dfifo irq blocked");
} }
} else } else
sched_event_D_pci(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
} }
afterXPR: afterXPR:
if (cs->hw.hfcpci.int_s1 && count--) { if (cs->hw.hfcpci.int_s1 && count--) {
......
drivers/isdn/hisax/hfc_sx.c
View file @ 9dafbbf7
...@@ -457,16 +457,6 @@ hfcsx_Timer(struct IsdnCardState *cs) ...@@ -457,16 +457,6 @@ hfcsx_Timer(struct IsdnCardState *cs)
} }
/*********************************/
/* schedule a new D-channel task */
/*********************************/
static void
sched_event_D_sx(struct IsdnCardState *cs, int event)
{
test_and_set_bit(event, &cs->event);
schedule_work(&cs->work);
}
/************************************************/ /************************************************/
/* select a b-channel entry matching and active */ /* select a b-channel entry matching and active */
/************************************************/ /************************************************/
...@@ -501,7 +491,7 @@ receive_dmsg(struct IsdnCardState *cs) ...@@ -501,7 +491,7 @@ receive_dmsg(struct IsdnCardState *cs)
skb = read_fifo(cs, HFCSX_SEL_D_RX, 0); skb = read_fifo(cs, HFCSX_SEL_D_RX, 0);
if (skb) { if (skb) {
skb_queue_tail(&cs->rq, skb); skb_queue_tail(&cs->rq, skb);
sched_event_D_sx(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} }
} while (--count && skb); } while (--count && skb);
...@@ -783,13 +773,13 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -783,13 +773,13 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcsx.ph_state, debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcsx.ph_state,
exval); exval);
cs->dc.hfcsx.ph_state = exval; cs->dc.hfcsx.ph_state = exval;
sched_event_D_sx(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
val &= ~0x40; val &= ~0x40;
} }
if (val & 0x80) { /* timer irq */ if (val & 0x80) { /* timer irq */
if (cs->hw.hfcsx.nt_mode) { if (cs->hw.hfcsx.nt_mode) {
if ((--cs->hw.hfcsx.nt_timer) < 0) if ((--cs->hw.hfcsx.nt_timer) < 0)
sched_event_D_sx(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
} }
val &= ~0x80; val &= ~0x80;
Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt | HFCSX_CLTIMER); Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt | HFCSX_CLTIMER);
...@@ -862,7 +852,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -862,7 +852,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
sched_event_D_sx(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) { if (cs->tx_skb->len) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
...@@ -887,7 +877,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -887,7 +877,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "hfcsx_fill_dfifo irq blocked"); debugl1(cs, "hfcsx_fill_dfifo irq blocked");
} }
} else } else
sched_event_D_sx(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
} }
afterXPR: afterXPR:
if (cs->hw.hfcsx.int_s1 && count--) { if (cs->hw.hfcsx.int_s1 && count--) {
......
drivers/isdn/hisax/icc.c
View file @ 9dafbbf7
...@@ -166,13 +166,6 @@ icc_fill_fifo(struct IsdnCardState *cs) ...@@ -166,13 +166,6 @@ icc_fill_fifo(struct IsdnCardState *cs)
spin_unlock_irqrestore(&icc_lock, flags); spin_unlock_irqrestore(&icc_lock, flags);
} }
void
icc_sched_event(struct IsdnCardState *cs, int event)
{
test_and_set_bit(event, &cs->event);
schedule_work(&cs->work);
}
void void
icc_interrupt(struct IsdnCardState *cs, u_char val) icc_interrupt(struct IsdnCardState *cs, u_char val)
{ {
...@@ -219,7 +212,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -219,7 +212,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
spin_unlock_irqrestore(&icc_lock, flags); spin_unlock_irqrestore(&icc_lock, flags);
} }
cs->rcvidx = 0; cs->rcvidx = 0;
icc_sched_event(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} }
if (val & 0x40) { /* RPF */ if (val & 0x40) { /* RPF */
icc_empty_fifo(cs, 32); icc_empty_fifo(cs, 32);
...@@ -233,7 +226,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -233,7 +226,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
icc_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) { if (cs->tx_skb->len) {
icc_fill_fifo(cs); icc_fill_fifo(cs);
...@@ -248,7 +241,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -248,7 +241,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
cs->tx_cnt = 0; cs->tx_cnt = 0;
icc_fill_fifo(cs); icc_fill_fifo(cs);
} else } else
icc_sched_event(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
} }
afterXPR: afterXPR:
if (val & 0x04) { /* CISQ */ if (val & 0x04) { /* CISQ */
...@@ -259,7 +252,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -259,7 +252,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
cs->dc.icc.ph_state = (exval >> 2) & 0xf; cs->dc.icc.ph_state = (exval >> 2) & 0xf;
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ph_state change %x", cs->dc.icc.ph_state); debugl1(cs, "ph_state change %x", cs->dc.icc.ph_state);
icc_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
} }
if (exval & 1) { if (exval & 1) {
exval = cs->readisac(cs, ICC_CIR1); exval = cs->readisac(cs, ICC_CIR1);
...@@ -289,7 +282,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -289,7 +282,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
icc_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { /* Restart frame */ if (cs->tx_skb) { /* Restart frame */
skb_push(cs->tx_skb, cs->tx_cnt); skb_push(cs->tx_skb, cs->tx_cnt);
cs->tx_cnt = 0; cs->tx_cnt = 0;
...@@ -367,14 +360,14 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -367,14 +360,14 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
cs->dc.icc.mocr |= 0x0a; cs->dc.icc.mocr |= 0x0a;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
icc_sched_event(cs, D_RX_MON0); sched_d_event(cs, D_RX_MON0);
} }
if (v1 & 0x40) { if (v1 & 0x40) {
cs->dc.icc.mocr &= 0x0f; cs->dc.icc.mocr &= 0x0f;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
cs->dc.icc.mocr |= 0xa0; cs->dc.icc.mocr |= 0xa0;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
icc_sched_event(cs, D_RX_MON1); sched_d_event(cs, D_RX_MON1);
} }
if (v1 & 0x02) { if (v1 & 0x02) {
if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc && if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc &&
...@@ -386,11 +379,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -386,11 +379,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
if (cs->dc.icc.mon_txc && if (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
icc_sched_event(cs, D_TX_MON0); sched_d_event(cs, D_TX_MON0);
goto AfterMOX0; goto AfterMOX0;
} }
if (cs->dc.icc.mon_txc && (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) { if (cs->dc.icc.mon_txc && (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) {
icc_sched_event(cs, D_TX_MON0); sched_d_event(cs, D_TX_MON0);
goto AfterMOX0; goto AfterMOX0;
} }
cs->writeisac(cs, ICC_MOX0, cs->writeisac(cs, ICC_MOX0,
...@@ -409,11 +402,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -409,11 +402,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
if (cs->dc.icc.mon_txc && if (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
icc_sched_event(cs, D_TX_MON1); sched_d_event(cs, D_TX_MON1);
goto AfterMOX1; goto AfterMOX1;
} }
if (cs->dc.icc.mon_txc && (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) { if (cs->dc.icc.mon_txc && (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) {
icc_sched_event(cs, D_TX_MON1); sched_d_event(cs, D_TX_MON1);
goto AfterMOX1; goto AfterMOX1;
} }
cs->writeisac(cs, ICC_MOX1, cs->writeisac(cs, ICC_MOX1,
...@@ -536,7 +529,7 @@ ICC_l1hw(struct PStack *st, int pr, void *arg) ...@@ -536,7 +529,7 @@ ICC_l1hw(struct PStack *st, int pr, void *arg)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
icc_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
break; break;
default: default:
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
...@@ -628,7 +621,7 @@ initicc(struct IsdnCardState *cs) ...@@ -628,7 +621,7 @@ initicc(struct IsdnCardState *cs)
val = cs->readisac(cs, ICC_CIR0); val = cs->readisac(cs, ICC_CIR0);
debugl1(cs, "ICC CIR0 %x", val); debugl1(cs, "ICC CIR0 %x", val);
cs->dc.icc.ph_state = (val >> 2) & 0xf; cs->dc.icc.ph_state = (val >> 2) & 0xf;
icc_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
/* Disable all IRQ */ /* Disable all IRQ */
cs->writeisac(cs, ICC_MASK, 0xFF); cs->writeisac(cs, ICC_MASK, 0xFF);
......
drivers/isdn/hisax/ipacx.c
View file @ 9dafbbf7
...@@ -38,7 +38,6 @@ static void dch_l2l1(struct PStack *st, int pr, void *arg); ...@@ -38,7 +38,6 @@ static void dch_l2l1(struct PStack *st, int pr, void *arg);
static void dbusy_timer_handler(struct IsdnCardState *cs); static void dbusy_timer_handler(struct IsdnCardState *cs);
static void ipacx_new_ph(struct IsdnCardState *cs); static void ipacx_new_ph(struct IsdnCardState *cs);
static void dch_bh(void *data); static void dch_bh(void *data);
static void dch_sched_event(struct IsdnCardState *cs, int event);
static void dch_empty_fifo(struct IsdnCardState *cs, int count); static void dch_empty_fifo(struct IsdnCardState *cs, int count);
static void dch_fill_fifo(struct IsdnCardState *cs); static void dch_fill_fifo(struct IsdnCardState *cs);
static inline void dch_int(struct IsdnCardState *cs); static inline void dch_int(struct IsdnCardState *cs);
...@@ -76,8 +75,8 @@ cic_int(struct IsdnCardState *cs) ...@@ -76,8 +75,8 @@ cic_int(struct IsdnCardState *cs)
event = cs->readisac(cs, IPACX_CIR0) >> 4; event = cs->readisac(cs, IPACX_CIR0) >> 4;
if (cs->debug &L1_DEB_ISAC) debugl1(cs, "cic_int(event=%#x)", event); if (cs->debug &L1_DEB_ISAC) debugl1(cs, "cic_int(event=%#x)", event);
cs->dc.isac.ph_state = event; cs->dc.isac.ph_state = event;
dch_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
} }
//========================================================== //==========================================================
...@@ -296,16 +295,6 @@ dch_bh(void *data) ...@@ -296,16 +295,6 @@ dch_bh(void *data)
} }
} }
//----------------------------------------------------------
// proceed with bottom half handler dch_bh()
//----------------------------------------------------------
static void
dch_sched_event(struct IsdnCardState *cs, int event)
{
set_bit(event, &cs->event);
schedule_work(&cs->work);
}
//---------------------------------------------------------- //----------------------------------------------------------
// Fill buffer from receive FIFO // Fill buffer from receive FIFO
//---------------------------------------------------------- //----------------------------------------------------------
...@@ -415,7 +404,7 @@ dch_int(struct IsdnCardState *cs) ...@@ -415,7 +404,7 @@ dch_int(struct IsdnCardState *cs)
} }
} }
cs->rcvidx = 0; cs->rcvidx = 0;
dch_sched_event(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} }
if (istad &0x40) { // RPF if (istad &0x40) { // RPF
...@@ -431,7 +420,7 @@ dch_int(struct IsdnCardState *cs) ...@@ -431,7 +420,7 @@ dch_int(struct IsdnCardState *cs)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
dch_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) { if (cs->tx_skb->len) {
dch_fill_fifo(cs); dch_fill_fifo(cs);
...@@ -448,7 +437,7 @@ dch_int(struct IsdnCardState *cs) ...@@ -448,7 +437,7 @@ dch_int(struct IsdnCardState *cs)
dch_fill_fifo(cs); dch_fill_fifo(cs);
} }
else { else {
dch_sched_event(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
} }
} }
afterXPR: afterXPR:
......
drivers/isdn/hisax/isac.c
View file @ 9dafbbf7
...@@ -170,13 +170,6 @@ isac_fill_fifo(struct IsdnCardState *cs) ...@@ -170,13 +170,6 @@ isac_fill_fifo(struct IsdnCardState *cs)
spin_unlock_irqrestore(&isac_lock, flags); spin_unlock_irqrestore(&isac_lock, flags);
} }
void
isac_sched_event(struct IsdnCardState *cs, int event)
{
test_and_set_bit(event, &cs->event);
schedule_work(&cs->work);
}
void void
isac_interrupt(struct IsdnCardState *cs, u_char val) isac_interrupt(struct IsdnCardState *cs, u_char val)
{ {
...@@ -223,7 +216,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -223,7 +216,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
spin_unlock_irqrestore(&isac_lock, flags); spin_unlock_irqrestore(&isac_lock, flags);
} }
cs->rcvidx = 0; cs->rcvidx = 0;
isac_sched_event(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} }
if (val & 0x40) { /* RPF */ if (val & 0x40) { /* RPF */
isac_empty_fifo(cs, 32); isac_empty_fifo(cs, 32);
...@@ -237,7 +230,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -237,7 +230,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
isac_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) { if (cs->tx_skb->len) {
isac_fill_fifo(cs); isac_fill_fifo(cs);
...@@ -252,7 +245,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -252,7 +245,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
cs->tx_cnt = 0; cs->tx_cnt = 0;
isac_fill_fifo(cs); isac_fill_fifo(cs);
} else } else
isac_sched_event(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
} }
afterXPR: afterXPR:
if (val & 0x04) { /* CISQ */ if (val & 0x04) { /* CISQ */
...@@ -263,7 +256,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -263,7 +256,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
cs->dc.isac.ph_state = (exval >> 2) & 0xf; cs->dc.isac.ph_state = (exval >> 2) & 0xf;
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ph_state change %x", cs->dc.isac.ph_state); debugl1(cs, "ph_state change %x", cs->dc.isac.ph_state);
isac_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
} }
if (exval & 1) { if (exval & 1) {
exval = cs->readisac(cs, ISAC_CIR1); exval = cs->readisac(cs, ISAC_CIR1);
...@@ -293,7 +286,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -293,7 +286,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
isac_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { /* Restart frame */ if (cs->tx_skb) { /* Restart frame */
skb_push(cs->tx_skb, cs->tx_cnt); skb_push(cs->tx_skb, cs->tx_cnt);
cs->tx_cnt = 0; cs->tx_cnt = 0;
...@@ -371,14 +364,14 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -371,14 +364,14 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0x0a; cs->dc.isac.mocr |= 0x0a;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
isac_sched_event(cs, D_RX_MON0); sched_d_event(cs, D_RX_MON0);
} }
if (v1 & 0x40) { if (v1 & 0x40) {
cs->dc.isac.mocr &= 0x0f; cs->dc.isac.mocr &= 0x0f;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0xa0; cs->dc.isac.mocr |= 0xa0;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
isac_sched_event(cs, D_RX_MON1); sched_d_event(cs, D_RX_MON1);
} }
if (v1 & 0x02) { if (v1 & 0x02) {
if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc && if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc &&
...@@ -390,11 +383,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -390,11 +383,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
if (cs->dc.isac.mon_txc && if (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
isac_sched_event(cs, D_TX_MON0); sched_d_event(cs, D_TX_MON0);
goto AfterMOX0; goto AfterMOX0;
} }
if (cs->dc.isac.mon_txc && (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) { if (cs->dc.isac.mon_txc && (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) {
isac_sched_event(cs, D_TX_MON0); sched_d_event(cs, D_TX_MON0);
goto AfterMOX0; goto AfterMOX0;
} }
cs->writeisac(cs, ISAC_MOX0, cs->writeisac(cs, ISAC_MOX0,
...@@ -413,11 +406,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val) ...@@ -413,11 +406,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
if (cs->dc.isac.mon_txc && if (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
isac_sched_event(cs, D_TX_MON1); sched_d_event(cs, D_TX_MON1);
goto AfterMOX1; goto AfterMOX1;
} }
if (cs->dc.isac.mon_txc && (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) { if (cs->dc.isac.mon_txc && (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) {
isac_sched_event(cs, D_TX_MON1); sched_d_event(cs, D_TX_MON1);
goto AfterMOX1; goto AfterMOX1;
} }
cs->writeisac(cs, ISAC_MOX1, cs->writeisac(cs, ISAC_MOX1,
...@@ -538,7 +531,7 @@ ISAC_l1hw(struct PStack *st, int pr, void *arg) ...@@ -538,7 +531,7 @@ ISAC_l1hw(struct PStack *st, int pr, void *arg)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
isac_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
break; break;
default: default:
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
...@@ -656,7 +649,7 @@ initisac(struct IsdnCardState *cs) ...@@ -656,7 +649,7 @@ initisac(struct IsdnCardState *cs)
val = cs->readisac(cs, ISAC_CIR0); val = cs->readisac(cs, ISAC_CIR0);
debugl1(cs, "ISAC CIR0 %x", val); debugl1(cs, "ISAC CIR0 %x", val);
cs->dc.isac.ph_state = (val >> 2) & 0xf; cs->dc.isac.ph_state = (val >> 2) & 0xf;
isac_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
/* RESET Receiver and Transmitter */ /* RESET Receiver and Transmitter */
cs->writeisac(cs, ISAC_CMDR, 0x41); cs->writeisac(cs, ISAC_CMDR, 0x41);
......
drivers/isdn/hisax/isdnl1.h
View file @ 9dafbbf7
...@@ -42,6 +42,13 @@ sched_b_event(struct BCState *bcs, int event) ...@@ -42,6 +42,13 @@ sched_b_event(struct BCState *bcs, int event)
schedule_work(&bcs->work); schedule_work(&bcs->work);
} }
static inline void
sched_d_event(struct IsdnCardState *cs, int event)
{
set_bit(event, &cs->event);
schedule_work(&cs->work);
}
/* called with the card lock held */ /* called with the card lock held */
static inline void static inline void
xmit_complete_b(struct BCState *bcs) xmit_complete_b(struct BCState *bcs)
......
drivers/isdn/hisax/jade.c
View file @ 9dafbbf7
...@@ -134,13 +134,6 @@ modejade(struct BCState *bcs, int mode, int bc) ...@@ -134,13 +134,6 @@ modejade(struct BCState *bcs, int mode, int bc)
cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00); cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00);
} }
void
jade_sched_event(struct BCState *bcs, int event)
{
bcs->event |= 1 << event;
schedule_work(&bcs->work);
}
static void static void
jade_l2l1(struct PStack *st, int pr, void *arg) jade_l2l1(struct PStack *st, int pr, void *arg)
{ {
......
drivers/isdn/hisax/w6692.c
View file @ 9dafbbf7
...@@ -132,13 +132,6 @@ W6692_bh(void *data) ...@@ -132,13 +132,6 @@ W6692_bh(void *data)
*/ */
} }
void
W6692_sched_event(struct IsdnCardState *cs, int event)
{
test_and_set_bit(event, &cs->event);
schedule_work(&cs->work);
}
static void static void
W6692_empty_fifo(struct IsdnCardState *cs, int count) W6692_empty_fifo(struct IsdnCardState *cs, int count)
{ {
...@@ -356,7 +349,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -356,7 +349,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs)
} }
} }
cs->rcvidx = 0; cs->rcvidx = 0;
W6692_sched_event(cs, D_RCVBUFREADY); sched_d_event(cs, D_RCVBUFREADY);
} }
if (val & W_INT_D_RMR) { /* RMR */ if (val & W_INT_D_RMR) { /* RMR */
W6692_empty_fifo(cs, W_D_FIFO_THRESH); W6692_empty_fifo(cs, W_D_FIFO_THRESH);
...@@ -365,7 +358,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -365,7 +358,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
W6692_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { if (cs->tx_skb) {
if (cs->tx_skb->len) { if (cs->tx_skb->len) {
W6692_fill_fifo(cs); W6692_fill_fifo(cs);
...@@ -380,7 +373,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -380,7 +373,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs)
cs->tx_cnt = 0; cs->tx_cnt = 0;
W6692_fill_fifo(cs); W6692_fill_fifo(cs);
} else } else
W6692_sched_event(cs, D_XMTBUFREADY); sched_d_event(cs, D_XMTBUFREADY);
} }
afterXFR: afterXFR:
if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */ if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */
...@@ -397,7 +390,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -397,7 +390,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
W6692_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) { /* Restart frame */ if (cs->tx_skb) { /* Restart frame */
skb_push(cs->tx_skb, cs->tx_cnt); skb_push(cs->tx_skb, cs->tx_cnt);
cs->tx_cnt = 0; cs->tx_cnt = 0;
...@@ -429,7 +422,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -429,7 +422,7 @@ W6692_interrupt(int intno, void *dev_id, struct pt_regs *regs)
cs->dc.w6692.ph_state = v1 & W_CIR_COD_MASK; cs->dc.w6692.ph_state = v1 & W_CIR_COD_MASK;
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ph_state_change %x", cs->dc.w6692.ph_state); debugl1(cs, "ph_state_change %x", cs->dc.w6692.ph_state);
W6692_sched_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
} }
if (v1 & W_CIR_SCC) { if (v1 & W_CIR_SCC) {
v1 = cs->readW6692(cs, W_SQR); v1 = cs->readW6692(cs, W_SQR);
...@@ -555,7 +548,7 @@ W6692_l1hw(struct PStack *st, int pr, void *arg) ...@@ -555,7 +548,7 @@ W6692_l1hw(struct PStack *st, int pr, void *arg)
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
W6692_sched_event(cs, D_CLEARBUSY); sched_d_event(cs, D_CLEARBUSY);
break; break;
default: default:
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
......
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