Commit a0743c15 authored by Romain Perier's avatar Romain Perier Committed by Herbert Xu

arm64: dts: marvell: add TRNG description for Armada 8K CP

This commits adds the devicetree description of the SafeXcel IP-76 TRNG
found in the two Armada CP110.
Signed-off-by: default avatarRomain Perier <romain.perier@free-electrons.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 38321242
...@@ -164,6 +164,14 @@ cpm_i2c1: i2c@701100 { ...@@ -164,6 +164,14 @@ cpm_i2c1: i2c@701100 {
clocks = <&cpm_syscon0 1 21>; clocks = <&cpm_syscon0 1 21>;
status = "disabled"; status = "disabled";
}; };
cpm_trng: trng@760000 {
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 25>;
status = "okay";
};
}; };
cpm_pcie0: pcie@f2600000 { cpm_pcie0: pcie@f2600000 {
......
...@@ -164,6 +164,14 @@ cps_i2c1: i2c@701100 { ...@@ -164,6 +164,14 @@ cps_i2c1: i2c@701100 {
clocks = <&cps_syscon0 1 21>; clocks = <&cps_syscon0 1 21>;
status = "disabled"; status = "disabled";
}; };
cps_trng: trng@760000 {
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 25>;
status = "okay";
};
}; };
cps_pcie0: pcie@f4600000 { cps_pcie0: pcie@f4600000 {
......
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