Commit a1f0bccc authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblaze

Pull microblaze updates from Michal Simek.

* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
  microblaze: Enable IRQ in arch_cpu_idle
  microblaze: Fix uaccess_ok macro
  microblaze: Add support for new cpu versions and target architecture
  microblaze: Do not select OPT_LIB_ASM by default
  microblaze: Fix initrd support
  microblaze: Do not use r6 in head.S
  microblaze: pci: Remove duplicated header
  microblaze: Set the default irq_domain
  microblaze: pci: Remove duplicated include from pci-common.c
parents 70eba422 a047775e
......@@ -17,7 +17,6 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
# CONFIG_EFI_PARTITION is not set
CONFIG_OPT_LIB_ASM=y
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
......
......@@ -153,7 +153,5 @@ extern void __init xilinx_pci_init(void);
static inline void __init xilinx_pci_init(void) { return; }
#endif
#include <asm-generic/pci-dma-compat.h>
#endif /* __KERNEL__ */
#endif /* __ASM_MICROBLAZE_PCI_H */
......@@ -90,17 +90,25 @@ static inline int ___range_ok(unsigned long addr, unsigned long size)
#else
/*
* Address is valid if:
* - "addr", "addr + size" and "size" are all below the limit
*/
#define access_ok(type, addr, size) \
(get_fs().seg >= (((unsigned long)(addr)) | \
(size) | ((unsigned long)(addr) + (size))))
/* || printk("access_ok failed for %s at 0x%08lx (size %d), seg 0x%08x\n",
type?"WRITE":"READ",addr,size,get_fs().seg)) */
static inline int access_ok(int type, const void __user *addr,
unsigned long size)
{
if (!size)
goto ok;
if ((get_fs().seg < ((unsigned long)addr)) ||
(get_fs().seg < ((unsigned long)addr + size - 1))) {
pr_debug("ACCESS fail: %s at 0x%08x (size 0x%x), seg 0x%08x\n",
type ? "WRITE" : "READ ", (u32)addr, (u32)size,
(u32)get_fs().seg);
return 0;
}
ok:
pr_debug("ACCESS OK: %s at 0x%08x (size 0x%x), seg 0x%08x\n",
type ? "WRITE" : "READ ", (u32)addr, (u32)size,
(u32)get_fs().seg);
return 1;
}
#endif
#ifdef CONFIG_MMU
......
......@@ -37,6 +37,8 @@ const struct cpu_ver_key cpu_ver_lookup[] = {
{"8.20.a", 0x15},
{"8.20.b", 0x16},
{"8.30.a", 0x17},
{"8.40.a", 0x18},
{"8.40.b", 0x19},
{NULL, 0},
};
......@@ -57,6 +59,9 @@ const struct family_string_key family_string_lookup[] = {
{"virtex6", 0xe},
/* FIXME There is no key code defined for spartan2 */
{"spartan2", 0xf0},
{"kintex7", 0x10},
{"artix7", 0x11},
{"zynq7000", 0x12},
{NULL, 0},
};
......
......@@ -112,16 +112,16 @@ no_fdt_arg:
* copy command line directly to cmd_line placed in data section.
*/
beqid r5, skip /* Skip if NULL pointer */
or r6, r0, r0 /* incremment */
or r11, r0, r0 /* incremment */
ori r4, r0, cmd_line /* load address of command line */
tophys(r4,r4) /* convert to phys address */
ori r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */
_copy_command_line:
/* r2=r5+r6 - r5 contain pointer to command line */
lbu r2, r5, r6
lbu r2, r5, r11
beqid r2, skip /* Skip if no data */
sb r2, r4, r6 /* addr[r4+r6]= r2*/
addik r6, r6, 1 /* increment counting */
sb r2, r4, r11 /* addr[r4+r6]= r2 */
addik r11, r11, 1 /* increment counting */
bgtid r3, _copy_command_line /* loop for all entries */
addik r3, r3, -1 /* decrement loop */
addik r5, r4, 0 /* add new space for command line */
......@@ -131,13 +131,13 @@ skip:
#ifdef NOT_COMPILE
/* save bram context */
or r6, r0, r0 /* incremment */
or r11, r0, r0 /* incremment */
ori r4, r0, TOPHYS(_bram_load_start) /* save bram context */
ori r3, r0, (LMB_SIZE - 4)
_copy_bram:
lw r7, r0, r6 /* r7 = r0 + r6 */
sw r7, r4, r6 /* addr[r4 + r6] = r7*/
addik r6, r6, 4 /* increment counting */
lw r7, r0, r11 /* r7 = r0 + r6 */
sw r7, r4, r11 /* addr[r4 + r6] = r7 */
addik r11, r11, 4 /* increment counting */
bgtid r3, _copy_bram /* loop for all entries */
addik r3, r3, -4 /* descrement loop */
#endif
......@@ -303,8 +303,8 @@ jump_over2:
* the exception vectors, using a 4k real==virtual mapping.
*/
/* Use temporary TLB_ID for LMB - clear this temporary mapping later */
ori r6, r0, MICROBLAZE_LMB_TLB_ID
mts rtlbx,r6
ori r11, r0, MICROBLAZE_LMB_TLB_ID
mts rtlbx,r11
ori r4,r0,(TLB_WR | TLB_EX)
ori r3,r0,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K))
......
......@@ -172,4 +172,6 @@ void __init init_IRQ(void)
* and commits this patch. ~~gcl */
root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops,
(void *)intr_mask);
irq_set_default_host(root_domain);
}
......@@ -160,3 +160,8 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
return 0; /* MicroBlaze has no separate FPU registers */
}
#endif /* CONFIG_MMU */
void arch_cpu_idle(void)
{
local_irq_enable();
}
......@@ -404,10 +404,11 @@ asmlinkage void __init mmu_init(void)
#if defined(CONFIG_BLK_DEV_INITRD)
/* Remove the init RAM disk from the available memory. */
/* if (initrd_start) {
mem_pieces_remove(&phys_avail, __pa(initrd_start),
initrd_end - initrd_start, 1);
}*/
if (initrd_start) {
unsigned long size;
size = initrd_end - initrd_start;
memblock_reserve(virt_to_phys(initrd_start), size);
}
#endif /* CONFIG_BLK_DEV_INITRD */
/* Initialize the MMU hardware */
......
......@@ -30,7 +30,6 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_pci.h>
#include <linux/pci.h>
#include <linux/export.h>
#include <asm/processor.h>
......
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