Commit a6908cd0 authored by Anton Blanchard's avatar Anton Blanchard Committed by Paul Mackerras

[PATCH] ppc64: Use num_pmcs in oprofile code

Change oprofile to use num_pmcs from the cpu feature struct.
Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 8530935d
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/pmc.h> #include <asm/pmc.h>
#include <asm/cputable.h>
#include "op_impl.h" #include "op_impl.h"
...@@ -131,7 +132,6 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) ...@@ -131,7 +132,6 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
case PV_630: case PV_630:
case PV_630p: case PV_630p:
model = &op_model_rs64; model = &op_model_rs64;
model->num_counters = 8;
ops->cpu_type = "ppc64/power3"; ops->cpu_type = "ppc64/power3";
break; break;
...@@ -140,14 +140,12 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) ...@@ -140,14 +140,12 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
case PV_ICESTAR: case PV_ICESTAR:
case PV_SSTAR: case PV_SSTAR:
model = &op_model_rs64; model = &op_model_rs64;
model->num_counters = 8;
ops->cpu_type = "ppc64/rs64"; ops->cpu_type = "ppc64/rs64";
break; break;
case PV_POWER4: case PV_POWER4:
case PV_POWER4p: case PV_POWER4p:
model = &op_model_power4; model = &op_model_power4;
model->num_counters = 8;
ops->cpu_type = "ppc64/power4"; ops->cpu_type = "ppc64/power4";
break; break;
...@@ -155,14 +153,12 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) ...@@ -155,14 +153,12 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
case PV_970FX: case PV_970FX:
case PV_970MP: case PV_970MP:
model = &op_model_power4; model = &op_model_power4;
model->num_counters = 8;
ops->cpu_type = "ppc64/970"; ops->cpu_type = "ppc64/970";
break; break;
case PV_POWER5: case PV_POWER5:
case PV_POWER5p: case PV_POWER5p:
model = &op_model_power4; model = &op_model_power4;
model->num_counters = 6;
ops->cpu_type = "ppc64/power5"; ops->cpu_type = "ppc64/power5";
break; break;
...@@ -170,6 +166,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) ...@@ -170,6 +166,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
return -ENODEV; return -ENODEV;
} }
model->num_counters = cur_cpu_spec->num_pmcs;
ops->create_files = op_ppc64_create_files; ops->create_files = op_ppc64_create_files;
ops->setup = op_ppc64_setup; ops->setup = op_ppc64_setup;
ops->shutdown = op_ppc64_shutdown; ops->shutdown = op_ppc64_shutdown;
......
...@@ -23,7 +23,6 @@ ...@@ -23,7 +23,6 @@
static unsigned long reset_value[OP_MAX_COUNTER]; static unsigned long reset_value[OP_MAX_COUNTER];
static int num_counters;
static int oprofile_running; static int oprofile_running;
static int mmcra_has_sihv; static int mmcra_has_sihv;
...@@ -45,8 +44,6 @@ static void power4_reg_setup(struct op_counter_config *ctr, ...@@ -45,8 +44,6 @@ static void power4_reg_setup(struct op_counter_config *ctr,
{ {
int i; int i;
num_counters = num_ctrs;
/* /*
* SIHV / SIPR bits are only implemented on POWER4+ (GQ) and above. * SIHV / SIPR bits are only implemented on POWER4+ (GQ) and above.
* However we disable it on all POWER4 until we verify it works * However we disable it on all POWER4 until we verify it works
...@@ -68,7 +65,7 @@ static void power4_reg_setup(struct op_counter_config *ctr, ...@@ -68,7 +65,7 @@ static void power4_reg_setup(struct op_counter_config *ctr,
backtrace_spinlocks = sys->backtrace_spinlocks; backtrace_spinlocks = sys->backtrace_spinlocks;
for (i = 0; i < num_counters; ++i) for (i = 0; i < cur_cpu_spec->num_pmcs; ++i)
reset_value[i] = 0x80000000UL - ctr[i].count; reset_value[i] = 0x80000000UL - ctr[i].count;
/* setup user and kernel profiling */ /* setup user and kernel profiling */
...@@ -121,7 +118,7 @@ static void power4_start(struct op_counter_config *ctr) ...@@ -121,7 +118,7 @@ static void power4_start(struct op_counter_config *ctr)
/* set the PMM bit (see comment below) */ /* set the PMM bit (see comment below) */
mtmsrd(mfmsr() | MSR_PMM); mtmsrd(mfmsr() | MSR_PMM);
for (i = 0; i < num_counters; ++i) { for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
if (ctr[i].enabled) { if (ctr[i].enabled) {
ctr_write(i, reset_value[i]); ctr_write(i, reset_value[i]);
} else { } else {
...@@ -272,7 +269,7 @@ static void power4_handle_interrupt(struct pt_regs *regs, ...@@ -272,7 +269,7 @@ static void power4_handle_interrupt(struct pt_regs *regs,
/* set the PMM bit (see comment below) */ /* set the PMM bit (see comment below) */
mtmsrd(mfmsr() | MSR_PMM); mtmsrd(mfmsr() | MSR_PMM);
for (i = 0; i < num_counters; ++i) { for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
val = ctr_read(i); val = ctr_read(i);
if (val < 0) { if (val < 0) {
if (oprofile_running && ctr[i].enabled) { if (oprofile_running && ctr[i].enabled) {
......
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