Commit aa45ba90 authored by Tony Zelenoff's avatar Tony Zelenoff Committed by David S. Miller

atl1: add value to check ability of reenabling IRQs

Unfortunately it is not clear from code is usage of
IMR register possible or not. So, to prevent possible
side-effects of reading this register i prefer store
interrupts enable flag separately.
Signed-off-by: default avatarTony Zelenoff <antonz@parallels.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 02d5d11b
......@@ -783,6 +783,12 @@ struct atl1_adapter {
u16 ict; /* interrupt clear timer (2us resolution */
struct mii_if_info mii; /* MII interface info */
/*
* Use this value to check is napi handler allowed to
* enable ints or not
*/
bool int_enabled;
u32 bd_number; /* board number */
bool pci_using_64;
struct atl1_hw hw;
......
......@@ -169,6 +169,7 @@ static inline void atlx_imr_set(struct atlx_adapter *adapter,
static void atlx_irq_enable(struct atlx_adapter *adapter)
{
atlx_imr_set(adapter, IMR_NORMAL_MASK);
adapter->int_enabled = true;
}
/*
......@@ -177,6 +178,7 @@ static void atlx_irq_enable(struct atlx_adapter *adapter)
*/
static void atlx_irq_disable(struct atlx_adapter *adapter)
{
adapter->int_enabled = false;
atlx_imr_set(adapter, 0);
synchronize_irq(adapter->pdev->irq);
}
......
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