Commit afbaade3 authored by Paul Bolle's avatar Paul Bolle Committed by Greg Kroah-Hartman

delete seven tty headers

Commit 51c9d654 ("Staging: delete tty
drivers") left seven headers unused: nothing in the tree includes them
anymore. Two of those headers were still exported, but since nothing in
the kernel actually uses the things those two headers provide, that
seems pointless. Delete these seven tty headers too.
Signed-off-by: default avatarPaul Bolle <pebolle@tiscali.nl>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jiri Slaby <jslaby@suse.cz>
Acked-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent cfaf0251
......@@ -84,7 +84,6 @@ header-y += capability.h
header-y += capi.h
header-y += cciss_defs.h
header-y += cciss_ioctl.h
header-y += cdk.h
header-y += cdrom.h
header-y += cgroupstats.h
header-y += chio.h
......@@ -93,7 +92,6 @@ header-y += cn_proc.h
header-y += coda.h
header-y += coda_psdev.h
header-y += coff.h
header-y += comstats.h
header-y += connector.h
header-y += const.h
header-y += cramfs_fs.h
......
/*****************************************************************************/
/*
* cd1400.h -- cd1400 UART hardware info.
*
* Copyright (C) 1996-1998 Stallion Technologies
* Copyright (C) 1994-1996 Greg Ungerer.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*****************************************************************************/
#ifndef _CD1400_H
#define _CD1400_H
/*****************************************************************************/
/*
* Define the number of async ports per cd1400 uart chip.
*/
#define CD1400_PORTS 4
/*
* Define the cd1400 uarts internal FIFO sizes.
*/
#define CD1400_TXFIFOSIZE 12
#define CD1400_RXFIFOSIZE 12
/*
* Local RX FIFO thresh hold level. Also define the RTS thresh hold
* based on the RX thresh hold.
*/
#define FIFO_RXTHRESHOLD 6
#define FIFO_RTSTHRESHOLD 7
/*****************************************************************************/
/*
* Define the cd1400 register addresses. These are all the valid
* registers with the cd1400. Some are global, some virtual, some
* per port.
*/
#define GFRCR 0x40
#define CAR 0x68
#define GCR 0x4b
#define SVRR 0x67
#define RICR 0x44
#define TICR 0x45
#define MICR 0x46
#define RIR 0x6b
#define TIR 0x6a
#define MIR 0x69
#define PPR 0x7e
#define RIVR 0x43
#define TIVR 0x42
#define MIVR 0x41
#define TDR 0x63
#define RDSR 0x62
#define MISR 0x4c
#define EOSRR 0x60
#define LIVR 0x18
#define CCR 0x05
#define SRER 0x06
#define COR1 0x08
#define COR2 0x09
#define COR3 0x0a
#define COR4 0x1e
#define COR5 0x1f
#define CCSR 0x0b
#define RDCR 0x0e
#define SCHR1 0x1a
#define SCHR2 0x1b
#define SCHR3 0x1c
#define SCHR4 0x1d
#define SCRL 0x22
#define SCRH 0x23
#define LNC 0x24
#define MCOR1 0x15
#define MCOR2 0x16
#define RTPR 0x21
#define MSVR1 0x6c
#define MSVR2 0x6d
#define PSVR 0x6f
#define RBPR 0x78
#define RCOR 0x7c
#define TBPR 0x72
#define TCOR 0x76
/*****************************************************************************/
/*
* Define the set of baud rate clock divisors.
*/
#define CD1400_CLK0 8
#define CD1400_CLK1 32
#define CD1400_CLK2 128
#define CD1400_CLK3 512
#define CD1400_CLK4 2048
#define CD1400_NUMCLKS 5
/*****************************************************************************/
/*
* Define the clock pre-scalar value to be a 5 ms clock. This should be
* OK for now. It would probably be better to make it 10 ms, but we
* can't fit that divisor into 8 bits!
*/
#define PPR_SCALAR 244
/*****************************************************************************/
/*
* Define values used to set character size options.
*/
#define COR1_CHL5 0x00
#define COR1_CHL6 0x01
#define COR1_CHL7 0x02
#define COR1_CHL8 0x03
/*
* Define values used to set the number of stop bits.
*/
#define COR1_STOP1 0x00
#define COR1_STOP15 0x04
#define COR1_STOP2 0x08
/*
* Define values used to set the parity scheme in use.
*/
#define COR1_PARNONE 0x00
#define COR1_PARFORCE 0x20
#define COR1_PARENB 0x40
#define COR1_PARIGNORE 0x10
#define COR1_PARODD 0x80
#define COR1_PAREVEN 0x00
#define COR2_IXM 0x80
#define COR2_TXIBE 0x40
#define COR2_ETC 0x20
#define COR2_LLM 0x10
#define COR2_RLM 0x08
#define COR2_RTSAO 0x04
#define COR2_CTSAE 0x02
#define COR3_SCDRNG 0x80
#define COR3_SCD34 0x40
#define COR3_FCT 0x20
#define COR3_SCD12 0x10
/*
* Define values used by COR4.
*/
#define COR4_BRKINT 0x08
#define COR4_IGNBRK 0x18
/*****************************************************************************/
/*
* Define the modem control register values.
* Note that the actual hardware is a little different to the conventional
* pin names on the cd1400.
*/
#define MSVR1_DTR 0x01
#define MSVR1_DSR 0x10
#define MSVR1_RI 0x20
#define MSVR1_CTS 0x40
#define MSVR1_DCD 0x80
#define MSVR2_RTS 0x02
#define MSVR2_DSR 0x10
#define MSVR2_RI 0x20
#define MSVR2_CTS 0x40
#define MSVR2_DCD 0x80
#define MCOR1_DCD 0x80
#define MCOR1_CTS 0x40
#define MCOR1_RI 0x20
#define MCOR1_DSR 0x10
#define MCOR2_DCD 0x80
#define MCOR2_CTS 0x40
#define MCOR2_RI 0x20
#define MCOR2_DSR 0x10
/*****************************************************************************/
/*
* Define the bits used with the service (interrupt) enable register.
*/
#define SRER_NNDT 0x01
#define SRER_TXEMPTY 0x02
#define SRER_TXDATA 0x04
#define SRER_RXDATA 0x10
#define SRER_MODEM 0x80
/*****************************************************************************/
/*
* Define operational commands for the command register.
*/
#define CCR_RESET 0x80
#define CCR_CORCHANGE 0x4e
#define CCR_SENDCH 0x20
#define CCR_CHANCTRL 0x10
#define CCR_TXENABLE (CCR_CHANCTRL | 0x08)
#define CCR_TXDISABLE (CCR_CHANCTRL | 0x04)
#define CCR_RXENABLE (CCR_CHANCTRL | 0x02)
#define CCR_RXDISABLE (CCR_CHANCTRL | 0x01)
#define CCR_SENDSCHR1 (CCR_SENDCH | 0x01)
#define CCR_SENDSCHR2 (CCR_SENDCH | 0x02)
#define CCR_SENDSCHR3 (CCR_SENDCH | 0x03)
#define CCR_SENDSCHR4 (CCR_SENDCH | 0x04)
#define CCR_RESETCHAN (CCR_RESET | 0x00)
#define CCR_RESETFULL (CCR_RESET | 0x01)
#define CCR_TXFLUSHFIFO (CCR_RESET | 0x02)
#define CCR_MAXWAIT 10000
/*****************************************************************************/
/*
* Define the valid acknowledgement types (for hw ack cycle).
*/
#define ACK_TYPMASK 0x07
#define ACK_TYPTX 0x02
#define ACK_TYPMDM 0x01
#define ACK_TYPRXGOOD 0x03
#define ACK_TYPRXBAD 0x07
#define SVRR_RX 0x01
#define SVRR_TX 0x02
#define SVRR_MDM 0x04
#define ST_OVERRUN 0x01
#define ST_FRAMING 0x02
#define ST_PARITY 0x04
#define ST_BREAK 0x08
#define ST_SCHAR1 0x10
#define ST_SCHAR2 0x20
#define ST_SCHAR3 0x30
#define ST_SCHAR4 0x40
#define ST_RANGE 0x70
#define ST_SCHARMASK 0x70
#define ST_TIMEOUT 0x80
#define MISR_DCD 0x80
#define MISR_CTS 0x40
#define MISR_RI 0x20
#define MISR_DSR 0x10
/*****************************************************************************/
/*
* Defines for the CCSR status register.
*/
#define CCSR_RXENABLED 0x80
#define CCSR_RXFLOWON 0x40
#define CCSR_RXFLOWOFF 0x20
#define CCSR_TXENABLED 0x08
#define CCSR_TXFLOWON 0x04
#define CCSR_TXFLOWOFF 0x02
/*****************************************************************************/
/*
* Define the embedded commands.
*/
#define ETC_CMD 0x00
#define ETC_STARTBREAK 0x81
#define ETC_DELAY 0x82
#define ETC_STOPBREAK 0x83
/*****************************************************************************/
#endif
This diff is collapsed.
/*****************************************************************************/
/*
* comstats.h -- Serial Port Stats.
*
* Copyright (C) 1996-1998 Stallion Technologies
* Copyright (C) 1994-1996 Greg Ungerer.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*****************************************************************************/
#ifndef _COMSTATS_H
#define _COMSTATS_H
/*****************************************************************************/
/*
* Serial port stats structure. The structure itself is UART
* independent, but some fields may be UART/driver specific (for
* example state).
*/
typedef struct {
unsigned long brd;
unsigned long panel;
unsigned long port;
unsigned long hwid;
unsigned long type;
unsigned long txtotal;
unsigned long rxtotal;
unsigned long txbuffered;
unsigned long rxbuffered;
unsigned long rxoverrun;
unsigned long rxparity;
unsigned long rxframing;
unsigned long rxlost;
unsigned long txbreaks;
unsigned long rxbreaks;
unsigned long txxon;
unsigned long txxoff;
unsigned long rxxon;
unsigned long rxxoff;
unsigned long txctson;
unsigned long txctsoff;
unsigned long rxrtson;
unsigned long rxrtsoff;
unsigned long modem;
unsigned long state;
unsigned long flags;
unsigned long ttystate;
unsigned long cflags;
unsigned long iflags;
unsigned long oflags;
unsigned long lflags;
unsigned long signals;
} comstats_t;
/*
* Board stats structure. Returns useful info about the board.
*/
#define COM_MAXPANELS 8
typedef struct {
unsigned long panel;
unsigned long type;
unsigned long hwid;
unsigned long nrports;
} companel_t;
typedef struct {
unsigned long brd;
unsigned long type;
unsigned long hwid;
unsigned long state;
unsigned long ioaddr;
unsigned long ioaddr2;
unsigned long memaddr;
unsigned long irq;
unsigned long nrpanels;
unsigned long nrports;
companel_t panels[COM_MAXPANELS];
} combrd_t;
/*
* Define the ioctl operations for stats stuff.
*/
#include <linux/ioctl.h>
#define COM_GETPORTSTATS _IO('c',30)
#define COM_CLRPORTSTATS _IO('c',31)
#define COM_GETBRDSTATS _IO('c',32)
/*
* Define the set of ioctls that give user level access to the
* private port, panel and board structures. The argument required
* will be driver dependent!
*/
#define COM_READPORT _IO('c',40)
#define COM_READBOARD _IO('c',41)
#define COM_READPANEL _IO('c',42)
/*****************************************************************************/
#endif
/*****************************************************************************/
/*
* istallion.h -- stallion intelligent multiport serial driver.
*
* Copyright (C) 1996-1998 Stallion Technologies
* Copyright (C) 1994-1996 Greg Ungerer.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*****************************************************************************/
#ifndef _ISTALLION_H
#define _ISTALLION_H
/*****************************************************************************/
/*
* Define important driver constants here.
*/
#define STL_MAXBRDS 4
#define STL_MAXPANELS 4
#define STL_MAXPORTS 64
#define STL_MAXCHANS (STL_MAXPORTS + 1)
#define STL_MAXDEVS (STL_MAXBRDS * STL_MAXPORTS)
/*
* Define a set of structures to hold all the board/panel/port info
* for our ports. These will be dynamically allocated as required at
* driver initialization time.
*/
/*
* Port and board structures to hold status info about each object.
* The board structure contains pointers to structures for each port
* connected to it. Panels are not distinguished here, since
* communication with the slave board will always be on a per port
* basis.
*/
struct stliport {
unsigned long magic;
struct tty_port port;
unsigned int portnr;
unsigned int panelnr;
unsigned int brdnr;
unsigned long state;
unsigned int devnr;
int baud_base;
int custom_divisor;
int closing_wait;
int rc;
int argsize;
void *argp;
unsigned int rxmarkmsk;
wait_queue_head_t raw_wait;
struct asysigs asig;
unsigned long addr;
unsigned long rxoffset;
unsigned long txoffset;
unsigned long sigs;
unsigned long pflag;
unsigned int rxsize;
unsigned int txsize;
unsigned char reqbit;
unsigned char portidx;
unsigned char portbit;
};
/*
* Use a structure of function pointers to do board level operations.
* These include, enable/disable, paging shared memory, interrupting, etc.
*/
struct stlibrd {
unsigned long magic;
unsigned int brdnr;
unsigned int brdtype;
unsigned long state;
unsigned int nrpanels;
unsigned int nrports;
unsigned int nrdevs;
unsigned int iobase;
int iosize;
unsigned long memaddr;
void __iomem *membase;
unsigned long memsize;
int pagesize;
int hostoffset;
int slaveoffset;
int bitsize;
int enabval;
unsigned int panels[STL_MAXPANELS];
int panelids[STL_MAXPANELS];
void (*init)(struct stlibrd *brdp);
void (*enable)(struct stlibrd *brdp);
void (*reenable)(struct stlibrd *brdp);
void (*disable)(struct stlibrd *brdp);
void __iomem *(*getmemptr)(struct stlibrd *brdp, unsigned long offset, int line);
void (*intr)(struct stlibrd *brdp);
void (*reset)(struct stlibrd *brdp);
struct stliport *ports[STL_MAXPORTS];
};
/*
* Define MAGIC numbers used for above structures.
*/
#define STLI_PORTMAGIC 0xe671c7a1
#define STLI_BOARDMAGIC 0x4bc6c825
/*****************************************************************************/
#endif
This diff is collapsed.
/*
* serial167.h
*
* Richard Hirst [richard@sleepie.demon.co.uk]
*
* Based on cyclades.h
*/
struct cyclades_monitor {
unsigned long int_count;
unsigned long char_count;
unsigned long char_max;
unsigned long char_last;
};
/*
* This is our internal structure for each serial port's state.
*
* Many fields are paralleled by the structure used by the serial_struct
* structure.
*
* For definitions of the flags field, see tty.h
*/
struct cyclades_port {
int magic;
int type;
int card;
int line;
int flags; /* defined in tty.h */
struct tty_struct *tty;
int read_status_mask;
int timeout;
int xmit_fifo_size;
int cor1,cor2,cor3,cor4,cor5,cor6,cor7;
int tbpr,tco,rbpr,rco;
int ignore_status_mask;
int close_delay;
int IER; /* Interrupt Enable Register */
unsigned long last_active;
int count; /* # of fd on device */
int x_char; /* to be pushed out ASAP */
int x_break;
int blocked_open; /* # of blocked opens */
unsigned char *xmit_buf;
int xmit_head;
int xmit_tail;
int xmit_cnt;
int default_threshold;
int default_timeout;
wait_queue_head_t open_wait;
wait_queue_head_t close_wait;
struct cyclades_monitor mon;
};
#define CYCLADES_MAGIC 0x4359
#define CYGETMON 0x435901
#define CYGETTHRESH 0x435902
#define CYSETTHRESH 0x435903
#define CYGETDEFTHRESH 0x435904
#define CYSETDEFTHRESH 0x435905
#define CYGETTIMEOUT 0x435906
#define CYSETTIMEOUT 0x435907
#define CYGETDEFTIMEOUT 0x435908
#define CYSETDEFTIMEOUT 0x435909
#define CyMaxChipsPerCard 1
/**** cd2401 registers ****/
#define CyGFRCR (0x81)
#define CyCCR (0x13)
#define CyCLR_CHAN (0x40)
#define CyINIT_CHAN (0x20)
#define CyCHIP_RESET (0x10)
#define CyENB_XMTR (0x08)
#define CyDIS_XMTR (0x04)
#define CyENB_RCVR (0x02)
#define CyDIS_RCVR (0x01)
#define CyCAR (0xee)
#define CyIER (0x11)
#define CyMdmCh (0x80)
#define CyRxExc (0x20)
#define CyRxData (0x08)
#define CyTxMpty (0x02)
#define CyTxRdy (0x01)
#define CyLICR (0x26)
#define CyRISR (0x89)
#define CyTIMEOUT (0x80)
#define CySPECHAR (0x70)
#define CyOVERRUN (0x08)
#define CyPARITY (0x04)
#define CyFRAME (0x02)
#define CyBREAK (0x01)
#define CyREOIR (0x84)
#define CyTEOIR (0x85)
#define CyMEOIR (0x86)
#define CyNOTRANS (0x08)
#define CyRFOC (0x30)
#define CyRDR (0xf8)
#define CyTDR (0xf8)
#define CyMISR (0x8b)
#define CyRISR (0x89)
#define CyTISR (0x8a)
#define CyMSVR1 (0xde)
#define CyMSVR2 (0xdf)
#define CyDSR (0x80)
#define CyDCD (0x40)
#define CyCTS (0x20)
#define CyDTR (0x02)
#define CyRTS (0x01)
#define CyRTPRL (0x25)
#define CyRTPRH (0x24)
#define CyCOR1 (0x10)
#define CyPARITY_NONE (0x00)
#define CyPARITY_E (0x40)
#define CyPARITY_O (0xC0)
#define Cy_5_BITS (0x04)
#define Cy_6_BITS (0x05)
#define Cy_7_BITS (0x06)
#define Cy_8_BITS (0x07)
#define CyCOR2 (0x17)
#define CyETC (0x20)
#define CyCtsAE (0x02)
#define CyCOR3 (0x16)
#define Cy_1_STOP (0x02)
#define Cy_2_STOP (0x04)
#define CyCOR4 (0x15)
#define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
#define CyCOR5 (0x14)
#define CyCOR6 (0x18)
#define CyCOR7 (0x07)
#define CyRBPR (0xcb)
#define CyRCOR (0xc8)
#define CyTBPR (0xc3)
#define CyTCOR (0xc0)
#define CySCHR1 (0x1f)
#define CySCHR2 (0x1e)
#define CyTPR (0xda)
#define CyPILR1 (0xe3)
#define CyPILR2 (0xe0)
#define CyPILR3 (0xe1)
#define CyCMR (0x1b)
#define CyASYNC (0x02)
#define CyLICR (0x26)
#define CyLIVR (0x09)
#define CySCRL (0x23)
#define CySCRH (0x22)
#define CyTFTC (0x80)
/* max number of chars in the FIFO */
#define CyMAX_CHAR_FIFO 12
/***************************************************************************/
/*****************************************************************************/
/*
* stallion.h -- stallion multiport serial driver.
*
* Copyright (C) 1996-1998 Stallion Technologies
* Copyright (C) 1994-1996 Greg Ungerer.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*****************************************************************************/
#ifndef _STALLION_H
#define _STALLION_H
/*****************************************************************************/
/*
* Define important driver constants here.
*/
#define STL_MAXBRDS 4
#define STL_MAXPANELS 4
#define STL_MAXBANKS 8
#define STL_PORTSPERPANEL 16
#define STL_MAXPORTS 64
#define STL_MAXDEVS (STL_MAXBRDS * STL_MAXPORTS)
/*
* Define a set of structures to hold all the board/panel/port info
* for our ports. These will be dynamically allocated as required.
*/
/*
* Define a ring queue structure for each port. This will hold the
* TX data waiting to be output. Characters are fed into this buffer
* from the line discipline (or even direct from user space!) and
* then fed into the UARTs during interrupts. Will use a classic ring
* queue here for this. The good thing about this type of ring queue
* is that the head and tail pointers can be updated without interrupt
* protection - since "write" code only needs to change the head, and
* interrupt code only needs to change the tail.
*/
struct stlrq {
char *buf;
char *head;
char *tail;
};
/*
* Port, panel and board structures to hold status info about each.
* The board structure contains pointers to structures for each panel
* connected to it, and in turn each panel structure contains pointers
* for each port structure for each port on that panel. Note that
* the port structure also contains the board and panel number that it
* is associated with, this makes it (fairly) easy to get back to the
* board/panel info for a port.
*/
struct stlport {
unsigned long magic;
struct tty_port port;
unsigned int portnr;
unsigned int panelnr;
unsigned int brdnr;
int ioaddr;
int uartaddr;
unsigned int pagenr;
unsigned long istate;
int baud_base;
int custom_divisor;
int close_delay;
int closing_wait;
int openwaitcnt;
int brklen;
unsigned int sigs;
unsigned int rxignoremsk;
unsigned int rxmarkmsk;
unsigned int imr;
unsigned int crenable;
unsigned long clk;
unsigned long hwid;
void *uartp;
comstats_t stats;
struct stlrq tx;
};
struct stlpanel {
unsigned long magic;
unsigned int panelnr;
unsigned int brdnr;
unsigned int pagenr;
unsigned int nrports;
int iobase;
void *uartp;
void (*isr)(struct stlpanel *panelp, unsigned int iobase);
unsigned int hwid;
unsigned int ackmask;
struct stlport *ports[STL_PORTSPERPANEL];
};
struct stlbrd {
unsigned long magic;
unsigned int brdnr;
unsigned int brdtype;
unsigned int state;
unsigned int nrpanels;
unsigned int nrports;
unsigned int nrbnks;
int irq;
int irqtype;
int (*isr)(struct stlbrd *brdp);
unsigned int ioaddr1;
unsigned int ioaddr2;
unsigned int iosize1;
unsigned int iosize2;
unsigned int iostatus;
unsigned int ioctrl;
unsigned int ioctrlval;
unsigned int hwid;
unsigned long clk;
unsigned int bnkpageaddr[STL_MAXBANKS];
unsigned int bnkstataddr[STL_MAXBANKS];
struct stlpanel *bnk2panel[STL_MAXBANKS];
struct stlpanel *panels[STL_MAXPANELS];
};
/*
* Define MAGIC numbers used for above structures.
*/
#define STL_PORTMAGIC 0x5a7182c9
#define STL_PANELMAGIC 0x7ef621a1
#define STL_BOARDMAGIC 0xa2267f52
/*****************************************************************************/
#endif
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