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nexedi
linux
Commits
b0b0e13e
Commit
b0b0e13e
authored
May 18, 2006
by
Ralf Baechle
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[MIPS] Remove unused instances of prom_build_cpu_map.
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
c583122c
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arch/mips/mips-boards/malta/malta_smp.c
arch/mips/mips-boards/malta/malta_smp.c
+0
-19
arch/mips/mips-boards/sim/sim_smp.c
arch/mips/mips-boards/sim/sim_smp.c
+0
-21
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arch/mips/mips-boards/malta/malta_smp.c
View file @
b0b0e13e
...
...
@@ -33,25 +33,6 @@ void core_send_ipi(int cpu, unsigned int action)
#endif
/* CONFIG_MIPS_MT_SMTC */
}
/*
* Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
*/
void
__init
prom_build_cpu_map
(
void
)
{
int
nextslot
;
/*
* As of November, 2004, MIPSsim only simulates one core
* at a time. However, that core may be a MIPS MT core
* with multiple virtual processors and thread contexts.
*/
if
(
read_c0_config3
()
&
(
1
<<
2
))
{
nextslot
=
mipsmt_build_cpu_map
(
1
);
}
}
/*
* Platform "CPU" startup hook
*/
...
...
arch/mips/mips-boards/sim/sim_smp.c
View file @
b0b0e13e
...
...
@@ -50,27 +50,6 @@ void core_send_ipi(int cpu, unsigned int action)
}
/*
* Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
*/
void
__init
prom_build_cpu_map
(
void
)
{
#ifdef CONFIG_MIPS_MT_SMTC
int
nextslot
;
/*
* As of November, 2004, MIPSsim only simulates one core
* at a time. However, that core may be a MIPS MT core
* with multiple virtual processors and thread contexts.
*/
if
(
read_c0_config3
()
&
(
1
<<
2
))
{
nextslot
=
mipsmt_build_cpu_map
(
1
);
}
#endif
/* CONFIG_MIPS_MT_SMTC */
}
/*
* Platform "CPU" startup hook
*/
...
...
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