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nexedi
linux
Commits
b25e3a80
Commit
b25e3a80
authored
Feb 02, 2004
by
Linus Torvalds
Browse files
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Merge
bk://kernel.bkbits.net/davem/tg3-2.6
into home.osdl.org:/home/torvalds/v2.5/linux
parents
642b7fde
b32b2542
Changes
1
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1 changed file
with
48 additions
and
19 deletions
+48
-19
drivers/net/tg3.c
drivers/net/tg3.c
+48
-19
No files found.
drivers/net/tg3.c
View file @
b25e3a80
...
...
@@ -56,8 +56,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
#define DRV_MODULE_VERSION "2.
5
"
#define DRV_MODULE_RELDATE "
December 22, 2003
"
#define DRV_MODULE_VERSION "2.
6
"
#define DRV_MODULE_RELDATE "
February 3, 2004
"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
...
...
@@ -5904,7 +5904,8 @@ do { p = orig_p + (reg); \
GET_REG32_LOOP
(
MSGINT_MODE
,
0x0c
);
GET_REG32_1
(
DMAC_MODE
);
GET_REG32_LOOP
(
GRC_MODE
,
0x4c
);
GET_REG32_LOOP
(
NVRAM_CMD
,
0x24
);
if
(
tp
->
tg3_flags
&
TG3_FLAG_NVRAM
)
GET_REG32_LOOP
(
NVRAM_CMD
,
0x24
);
#undef __GET_REG32
#undef GET_REG32_LOOP
...
...
@@ -7190,26 +7191,33 @@ static int __devinit tg3_do_test_dma(struct tg3 *tp, u32 *buf, dma_addr_t buf_dm
test_desc
.
addr_lo
=
buf_dma
&
0xffffffff
;
test_desc
.
nic_mbuf
=
0x00002100
;
test_desc
.
len
=
size
;
/*
* HP ZX1 was seeing test failures for 5701 cards running at 33Mhz
* the *second* time the tg3 driver was getting loaded after an
* initial scan.
*
* Broadcom tells me:
* ...the DMA engine is connected to the GRC block and a DMA
* reset may affect the GRC block in some unpredictable way...
* The behavior of resets to individual blocks has not been tested.
*
* Broadcom noted the GRC reset will also reset all sub-components.
*/
if
(
to_device
)
{
test_desc
.
cqid_sqid
=
(
13
<<
8
)
|
2
;
tw32
(
RDMAC_MODE
,
RDMAC_MODE_RESET
);
tr32
(
RDMAC_MODE
);
udelay
(
40
);
tw32
(
RDMAC_MODE
,
RDMAC_MODE_ENABLE
);
tr32
(
RDMAC_MODE
);
udelay
(
40
);
}
else
{
test_desc
.
cqid_sqid
=
(
16
<<
8
)
|
7
;
tw32
(
WDMAC_MODE
,
WDMAC_MODE_RESET
);
tr32
(
WDMAC_MODE
);
udelay
(
40
);
tw32
(
WDMAC_MODE
,
WDMAC_MODE_ENABLE
);
tr32
(
WDMAC_MODE
);
udelay
(
40
);
}
test_desc
.
flags
=
0x0000000
4
;
test_desc
.
flags
=
0x0000000
5
;
for
(
i
=
0
;
i
<
(
sizeof
(
test_desc
)
/
sizeof
(
u32
));
i
++
)
{
u32
val
;
...
...
@@ -7368,9 +7376,19 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
GET_ASIC_REV
(
tp
->
pci_chip_rev_id
)
==
ASIC_REV_5701
)
{
/* Remove this if it causes problems for some boards. */
tp
->
dma_rwctrl
|=
DMA_RWCTRL_USE_MEM_READ_MULT
;
}
tp
->
dma_rwctrl
|=
DMA_RWCTRL_ASSERT_ALL_BE
;
/* On 5700/5701 chips, we need to set this bit.
* Otherwise the chip will issue cacheline transactions
* to streamable DMA memory with not all the byte
* enables turned on. This is an error on several
* RISC PCI controllers, in particular sparc64.
*
* On 5703/5704 chips, this bit has been reassigned
* a different meaning. In particular, it is used
* on those chips to enable a PCI-X workaround.
*/
tp
->
dma_rwctrl
|=
DMA_RWCTRL_ASSERT_ALL_BE
;
}
tw32
(
TG3PCI_DMA_RW_CTRL
,
tp
->
dma_rwctrl
);
...
...
@@ -7385,28 +7403,38 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
goto
out
;
while
(
1
)
{
u32
*
p
,
i
;
u32
*
p
=
buf
,
i
;
p
=
buf
;
for
(
i
=
0
;
i
<
TEST_BUFFER_SIZE
/
sizeof
(
u32
);
i
++
)
p
[
i
]
=
i
;
/* Send the buffer to the chip. */
ret
=
tg3_do_test_dma
(
tp
,
buf
,
buf_dma
,
TEST_BUFFER_SIZE
,
1
);
if
(
ret
)
if
(
ret
)
{
printk
(
KERN_ERR
"tg3_test_dma() Write the buffer failed %d
\n
"
,
ret
);
break
;
}
p
=
buf
;
for
(
i
=
0
;
i
<
TEST_BUFFER_SIZE
/
sizeof
(
u32
);
i
++
)
/* validate data reached card RAM correctly. */
for
(
i
=
0
;
i
<
TEST_BUFFER_SIZE
/
sizeof
(
u32
);
i
++
)
{
u32
val
;
tg3_read_mem
(
tp
,
0x2100
+
(
i
*
4
),
&
val
);
if
(
val
!=
p
[
i
])
{
printk
(
KERN_ERR
" tg3_test_dma() Card buffer currupted on write! (%d != %d)
\n
"
,
val
,
i
);
/* ret = -ENODEV here? */
}
p
[
i
]
=
0
;
}
/* Now read it back. */
ret
=
tg3_do_test_dma
(
tp
,
buf
,
buf_dma
,
TEST_BUFFER_SIZE
,
0
);
if
(
ret
)
if
(
ret
)
{
printk
(
KERN_ERR
"tg3_test_dma() Read the buffer failed %d
\n
"
,
ret
);
break
;
}
/* Verify it. */
p
=
buf
;
for
(
i
=
0
;
i
<
TEST_BUFFER_SIZE
/
sizeof
(
u32
);
i
++
)
{
if
(
p
[
i
]
==
i
)
continue
;
...
...
@@ -7417,6 +7445,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
tw32
(
TG3PCI_DMA_RW_CTRL
,
tp
->
dma_rwctrl
);
break
;
}
else
{
printk
(
KERN_ERR
"tg3_test_dma() buffer corrupted on read back! (%d != %d)
\n
"
,
p
[
i
],
i
);
ret
=
-
ENODEV
;
goto
out
;
}
...
...
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