Commit b3ea5757 authored by Leonard Crestez's avatar Leonard Crestez Committed by Shawn Guo

ARM: imx: Add MXC_CPU_IMX6ULL and cpu_is_imx6ull

Support for imx6ull is already present but it's based on
of_machine_is_compatible("fsl,imx6ull") checks. Add it to the MXC_CPU_*
enumeration as well.

This also fixes /sys/devices/soc0/soc_id reading "Unknown".
Signed-off-by: default avatarLeonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent da6ee0c3
...@@ -131,6 +131,9 @@ struct device * __init imx_soc_device_init(void) ...@@ -131,6 +131,9 @@ struct device * __init imx_soc_device_init(void)
case MXC_CPU_IMX6UL: case MXC_CPU_IMX6UL:
soc_id = "i.MX6UL"; soc_id = "i.MX6UL";
break; break;
case MXC_CPU_IMX6ULL:
soc_id = "i.MX6ULL";
break;
case MXC_CPU_IMX7D: case MXC_CPU_IMX7D:
soc_id = "i.MX7D"; soc_id = "i.MX7D";
break; break;
......
...@@ -39,6 +39,7 @@ ...@@ -39,6 +39,7 @@
#define MXC_CPU_IMX6SX 0x62 #define MXC_CPU_IMX6SX 0x62
#define MXC_CPU_IMX6Q 0x63 #define MXC_CPU_IMX6Q 0x63
#define MXC_CPU_IMX6UL 0x64 #define MXC_CPU_IMX6UL 0x64
#define MXC_CPU_IMX6ULL 0x65
#define MXC_CPU_IMX7D 0x72 #define MXC_CPU_IMX7D 0x72
#define IMX_DDR_TYPE_LPDDR2 1 #define IMX_DDR_TYPE_LPDDR2 1
...@@ -73,6 +74,11 @@ static inline bool cpu_is_imx6ul(void) ...@@ -73,6 +74,11 @@ static inline bool cpu_is_imx6ul(void)
return __mxc_cpu_type == MXC_CPU_IMX6UL; return __mxc_cpu_type == MXC_CPU_IMX6UL;
} }
static inline bool cpu_is_imx6ull(void)
{
return __mxc_cpu_type == MXC_CPU_IMX6ULL;
}
static inline bool cpu_is_imx6q(void) static inline bool cpu_is_imx6q(void)
{ {
return __mxc_cpu_type == MXC_CPU_IMX6Q; return __mxc_cpu_type == MXC_CPU_IMX6Q;
......
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