Commit b6d45af7 authored by Russell King's avatar Russell King

[MMC] MMCI: Ensure that we read all data from FIFO.

When we are nearing the end of a transfer from the card, we may not
have sufficient data in the FIFO to trigger a "half FIFO full" IRQ.
Therefore, when we have less than MCI_FIFOSIZE bytes left, switch to
"FIFO contains data" IRQ mode instead.
parent af9fe629
......@@ -249,6 +249,13 @@ static int mmci_pio_read(struct mmci_host *host, struct request *req, u32 status
status = readl(base + MMCISTATUS);
} while (1);
/*
* If we're nearing the end of the read, switch to
* "any data available" mode.
*/
if (host->size < MCI_FIFOSIZE)
writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
return ret;
}
......
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