Commit b7aacd4a authored by Ralf Bächle's avatar Ralf Bächle Committed by Linus Torvalds

[PATCH] MIPS updates

 o General updates of MIPS to 2.6.10-rc2
 o Remove the Baget platform due to lack of maintenance over several years.
   Some of the drivers remain and will be removed in a separate patch.
 o Remove the HP Laserjet platform.  No user reports ever and no patches from
   the original submitters made this port a neat hack - and a directory full
   of clutter.
 o SMP support for the PMC-Sierra.
Signed-Off-By: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent d80f0ade
This diff is collapsed.
This diff is collapsed.
......@@ -45,7 +45,7 @@ static struct smatch mach_table[] = {
MACH_SGI_IP28,
PROM_FLAG_ARCS
}, { "SGI-IP32",
"SGI IP32",
"SGI O2",
MACH_GROUP_SGI,
MACH_SGI_IP32,
PROM_FLAG_ARCS
......
......@@ -104,5 +104,5 @@ ArcFlushAllCaches(VOID)
DISPLAY_STATUS * __init ArcGetDisplayStatus(ULONG FileID)
{
return ARC_CALL1(GetDisplayStatus, FileID);
return (DISPLAY_STATUS *) ARC_CALL1(GetDisplayStatus, FileID);
}
......@@ -7,14 +7,9 @@
#
obj-y += prom.o int-handler.o irq.o puts.o time.o reset.o \
au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o cputable.o
au1xxx_irqmap.o clocks.o platform.o power.o setup.o \
sleeper.o cputable.o dma.o dbdma.o
obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
obj-$(CONFIG_KGDB) += dbg_io.o
obj-$(CONFIG_PCI) += pci.o
ifdef CONFIG_SOC_AU1550
obj-y += dbdma.o
else
obj-y += dma.o
endif
......@@ -91,10 +91,10 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
#elif defined(CONFIG_SOC_AU1500)
{ AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
......@@ -117,16 +117,16 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
#elif defined(CONFIG_SOC_AU1100)
{ AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
{ 2/*AU1000_SD_INT*/, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
......@@ -151,9 +151,9 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
/*{ AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0},*/
/*{ AU1000_LCD_INT, INTC_INT_HIGH_LEVEL, 0 },*/
{ AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
#elif defined(CONFIG_SOC_AU1550)
......@@ -187,6 +187,32 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
{ AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
#elif defined(CONFIG_SOC_AU1200)
{ AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_SWT_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
{ AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
{ AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0},
#else
#error "Error: Unknown Alchemy SOC"
#endif
......
......@@ -39,6 +39,7 @@ struct cpu_spec cpu_specs[] = {
{ 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
{ 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
{ 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
{ 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
{ 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
};
......
......@@ -37,10 +37,13 @@
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1xxx_dbdma.h>
#include <asm/system.h>
#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
/*
* The Descriptor Based DMA supports up to 16 channels.
*
......@@ -63,6 +66,7 @@ static int dbdma_initialized;
static void au1xxx_dbdma_init(void);
typedef struct dbdma_device_table {
u32 dev_id;
u32 dev_flags;
u32 dev_tsize;
u32 dev_devwidth;
......@@ -89,64 +93,116 @@ typedef struct dbdma_chan_config {
#define DEV_FLAGS_IN (1 << 3)
static dbdev_tab_t dbdev_tab[] = {
#ifdef CONFIG_SOC_AU1550
/* UARTS */
{ DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 },
{ DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 },
{ DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 },
{ DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 },
{ DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 },
{ DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 },
{ DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 },
{ DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 },
/* EXT DMA */
{ 0, 0, 0, 0x00000000, 0, 0 },
{ 0, 0, 0, 0x00000000, 0, 0 },
{ 0, 0, 0, 0x00000000, 0, 0 },
{ 0, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 },
/* USB DEV */
{ DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 },
{ DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 },
{ DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 },
{ DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 },
{ DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 },
{ DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 },
{ DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 },
{ DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 },
{ DSCR_CMD0_USBDEV_TX1, DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 },
{ DSCR_CMD0_USBDEV_TX2, DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 },
{ DSCR_CMD0_USBDEV_RX3, DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 },
{ DSCR_CMD0_USBDEV_RX4, DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 },
/* PSC 0 */
{ DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
{ DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
{ DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
{ DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
/* PSC 1 */
{ DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 },
{ DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
{ DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 },
{ DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
/* PSC 2 */
{ DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 },
{ DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 },
{ DSCR_CMD0_PSC2_TX, DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 },
{ DSCR_CMD0_PSC2_RX, DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 },
/* PSC 3 */
{ DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 },
{ DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 },
{ DSCR_CMD0_PSC3_TX, DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 },
{ DSCR_CMD0_PSC3_RX, DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 },
{ 0, 0, 0, 0x00000000, 0, 0 }, /* PCI */
{ 0, 0, 0, 0x00000000, 0, 0 }, /* NAND */
{ DSCR_CMD0_PCI_WRITE, 0, 0, 0, 0x00000000, 0, 0 }, /* PCI */
{ DSCR_CMD0_NAND_FLASH, 0, 0, 0, 0x00000000, 0, 0 }, /* NAND */
/* MAC 0 */
{ DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_MAC0_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_MAC0_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
/* MAC 1 */
{ DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_MAC1_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_MAC1_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
#endif /* CONFIG_SOC_AU1550 */
#ifdef CONFIG_SOC_AU1200
{ DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 },
{ DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 },
{ DSCR_CMD0_UART1_TX, DEV_FLAGS_OUT, 0, 8, 0x11200004, 0, 0 },
{ DSCR_CMD0_UART1_RX, DEV_FLAGS_IN, 0, 8, 0x11200000, 0, 0 },
{ DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_MAE_BE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_MAE_FE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
{ DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
{ DSCR_CMD0_PSC0_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 },
{ DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
{ DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
/* reserved */
{ DEV_FLAGS_INUSE, 0, 0, 0x00000000, 0, 0 },
{ DEV_FLAGS_INUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
/* Memory */
{ DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, /* throttle */
{ DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, /* always */
#endif // CONFIG_SOC_AU1200
{ DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
{ DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
};
#define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
static dbdev_tab_t *
find_dbdev_id (u32 id)
{
int i;
dbdev_tab_t *p;
for (i = 0; i < DBDEV_TAB_SIZE; ++i) {
p = &dbdev_tab[i];
if (p->dev_id == id)
return p;
}
return NULL;
}
/* Allocate a channel and return a non-zero descriptor if successful.
*/
u32
......@@ -172,8 +228,9 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
return 0;
stp = &dbdev_tab[srcid];
dtp = &dbdev_tab[destid];
if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
used = 0;
rv = 0;
......@@ -212,7 +269,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
/* If kmalloc fails, it is caught below same
* as a channel not available.
*/
ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
chan_tab_ptr[i] = ctp;
ctp->chan_index = chan = i;
break;
......@@ -313,7 +370,7 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
* and if we try that first we are likely to not waste larger
* slabs of memory.
*/
desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
desc_base = kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
if (desc_base == 0)
return 0;
......@@ -324,7 +381,7 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
kfree((const void *)desc_base);
i = entries * sizeof(au1x_ddma_desc_t);
i += (sizeof(au1x_ddma_desc_t) - 1);
if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
if ((desc_base = kmalloc(i, GFP_KERNEL)) == 0)
return 0;
desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
......@@ -337,8 +394,8 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
/* Initialize the rings with as much information as we know.
*/
srcid = stp - dbdev_tab; /* Index is channel device ID */
destid = dtp - dbdev_tab;
srcid = stp->dev_id;
destid = dtp->dev_id;
cmd0 = cmd1 = src1 = dest1 = 0;
src0 = dest0 = 0;
......@@ -691,7 +748,7 @@ au1xxx_dbdma_chan_free(u32 chanid)
kfree(ctp);
}
static void
static irqreturn_t
dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
u32 intstat;
......@@ -718,6 +775,7 @@ dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
return IRQ_HANDLED;
}
static void
......@@ -773,3 +831,6 @@ au1xxx_dbdma_dump(u32 chanid)
dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
} while (dp != ctp->chan_desc_base);
}
#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
......@@ -30,6 +30,7 @@
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/sched.h>
......@@ -37,6 +38,7 @@
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <asm/system.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1000_dma.h>
......@@ -71,6 +73,7 @@ struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = {
{.dev_id = -1,},
{.dev_id = -1,}
};
EXPORT_SYMBOL(au1000_dma_table);
// Device FIFO addresses and default DMA modes
static const struct dma_dev {
......@@ -216,6 +219,7 @@ int request_au1000_dma(int dev_id, const char *dev_str,
return i;
}
EXPORT_SYMBOL(request_au1000_dma);
void free_au1000_dma(unsigned int dmanr)
{
......@@ -233,4 +237,6 @@ void free_au1000_dma(unsigned int dmanr)
chan->irq_dev = NULL;
chan->dev_id = -1;
}
EXPORT_SYMBOL(free_au1000_dma);
#endif // AU1000 AU1500 AU1100
......@@ -66,10 +66,6 @@
#define EXT_INTC1_REQ1 5 /* IP 5 */
#define MIPS_TIMER_IP 7 /* IP 7 */
#ifdef CONFIG_KGDB
extern void breakpoint(void);
#endif
extern asmlinkage void au1000_IRQ(void);
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
......@@ -84,7 +80,6 @@ static inline void mask_and_ack_either_edge_irq(unsigned int irq_nr);
inline void local_enable_irq(unsigned int irq_nr);
inline void local_disable_irq(unsigned int irq_nr);
extern void __init init_generic_irq(void);
void (*board_init_irq)(void);
#ifdef CONFIG_PM
......@@ -420,7 +415,7 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
}
void __init init_IRQ(void)
void __init arch_init_irq(void)
{
int i;
unsigned long cp0_status;
......@@ -434,8 +429,6 @@ void __init init_IRQ(void)
memset(irq_desc, 0, sizeof(irq_desc));
set_except_vector(0, au1000_IRQ);
init_generic_irq();
/* Initialize interrupt controllers to a safe state.
*/
au_writel(0xffffffff, IC0_CFG0CLR);
......@@ -482,13 +475,6 @@ void __init init_IRQ(void)
*/
if (board_init_irq)
(*board_init_irq)();
#ifdef CONFIG_KGDB
/* If local serial I/O used for debug port, enter kgdb at once */
puts("Waiting for kgdb to connect...");
set_debug_traps();
breakpoint();
#endif
}
......
......@@ -6,6 +6,8 @@
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* Support for all devices (greater than 16) added by David Gathright.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -35,7 +37,6 @@
#include <linux/init.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/pci_channel.h>
/* TBD */
static struct resource pci_io_resource = {
......@@ -67,15 +68,12 @@ static unsigned long virt_io_addr;
static int __init au1x_pci_setup(void)
{
#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
int i;
struct pci_dev *dev;
virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
if (!virt_io_addr) {
printk(KERN_ERR "Unable to ioremap pci space\n");
return;
return 1;
}
#ifdef CONFIG_DMA_NONCOHERENT
......
/*
* Platform device support for Au1x00 SoCs.
*
* Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/config.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/resource.h>
#include <asm/mach-au1x00/au1000.h>
static struct resource au1xxx_usb_ohci_resources[] = {
[0] = {
.start = USB_OHCI_BASE,
.end = USB_OHCI_BASE + USB_OHCI_LEN,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AU1000_USB_HOST_INT,
.end = AU1000_USB_HOST_INT,
.flags = IORESOURCE_IRQ,
},
};
/* The dmamask must be set for OHCI to work */
static u64 ohci_dmamask = ~(u32)0;
static struct platform_device au1xxx_usb_ohci_device = {
.name = "au1xxx-ohci",
.id = 0,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
.resource = au1xxx_usb_ohci_resources,
};
static struct platform_device *au1xxx_platform_devices[] __initdata = {
&au1xxx_usb_ohci_device,
};
int au1xxx_platform_init(void)
{
return platform_add_devices(au1xxx_platform_devices, ARRAY_SIZE(au1xxx_platform_devices));
}
arch_initcall(au1xxx_platform_init);
......@@ -92,7 +92,7 @@ puts(unsigned char *cp)
}
void
fputs(unsigned char *cp)
fputs(const char *cp)
{
unsigned char ch;
int i = 0;
......
......@@ -43,6 +43,7 @@ extern void (*flush_cache_all)(void);
void au1000_restart(char *command)
{
/* Set all integrated peripherals to disabled states */
extern void board_reset (void);
u32 prid = read_c0_prid();
printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
......@@ -154,18 +155,10 @@ void au1000_restart(char *command)
flush_cache_all();
write_c0_wired(0);
#if defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500)
/* Do a HW reset if the board can do it */
au_writel(0x00000000, 0xAE00001C);
#endif
#if defined(CONFIG_MIPS_PB1550)
/* reset entire system */
au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
au_sync();
#endif
/* Give board a chance to do a hardware reset */
board_reset();
/* Jump to the beggining in case board_reset() is empty */
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
}
......
......@@ -3,6 +3,8 @@
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
* Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
......@@ -40,11 +42,6 @@
#include <asm/mach-au1x00/au1000.h>
#include <asm/time.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
extern char * __init prom_getcmdline(void);
extern void __init board_setup(void);
extern void au1000_restart(char *);
......@@ -56,12 +53,9 @@ extern void (*board_time_init)(void);
extern void au1x_time_init(void);
extern void (*board_timer_setup)(struct irqaction *irq);
extern void au1x_timer_setup(struct irqaction *irq);
#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
#endif
extern void au1xxx_time_init(void);
extern void au1xxx_timer_setup(struct irqaction *irq);
extern void set_cpuspec(void);
static int __init au1x00_setup(void)
{
......@@ -76,7 +70,7 @@ static int __init au1x00_setup(void)
prid = read_c0_prid();
cpupll = (au_readl(0xB1900060) & 0x3F) * 12;
printk("(PRId %08X) @ %dMHZ\n", prid, cpupll);
printk("(PRId %08lx) @ %ldMHZ\n", prid, cpupll);
bclk = sp->cpu_bclk;
if (bclk)
......@@ -146,9 +140,6 @@ static int __init au1x00_setup(void)
_machine_power_off = au1000_power_off;
board_time_init = au1xxx_time_init;
board_timer_setup = au1xxx_timer_setup;
#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
fixup_bigphys_addr = au1500_fixup_bigphys_addr;
#endif
/* IO/MEM resources. */
set_io_port_base(0);
......@@ -157,62 +148,48 @@ static int __init au1x00_setup(void)
iomem_resource.start = IOMEM_RESOURCE_START;
iomem_resource.end = IOMEM_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
#ifdef CONFIG_USB_OHCI
if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
char usb_args[80];
argptr = prom_getcmdline();
memset(usb_args, 0, sizeof(usb_args));
sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
strcat(argptr, usb_args);
}
#endif
#ifdef CONFIG_USB_OHCI
/* enable host controller and wait for reset done */
au_writel(0x08, USB_HOST_CONFIG);
udelay(1000);
au_writel(0x0E, USB_HOST_CONFIG);
udelay(1000);
au_readl(USB_HOST_CONFIG); /* throw away first read */
while (!(au_readl(USB_HOST_CONFIG) & 0x10))
au_readl(USB_HOST_CONFIG);
#endif
#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
au_writel(0, SYS_TOYTRIM);
return 0;
}
early_initcall(au1x00_setup);
#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
/* This routine should be valid for all Au1500 based boards */
static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
#if defined(CONFIG_64BIT_PHYS_ADDR)
/* This routine should be valid for all Au1x based boards */
phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
{
u32 pci_start = (u32)Au1500_PCI_MEM_START;
u32 pci_end = (u32)Au1500_PCI_MEM_END;
u32 start, end;
/* Don't fixup 36 bit addresses */
if ((phys_addr >> 32) != 0) return phys_addr;
#ifdef CONFIG_PCI
start = (u32)Au1500_PCI_MEM_START;
end = (u32)Au1500_PCI_MEM_END;
/* check for pci memory window */
if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
return (phys_t)((phys_addr - pci_start) +
Au1500_PCI_MEM_START);
if ((phys_addr >= start) && ((phys_addr + size) < end)) {
return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START);
}
else
return phys_addr;
#endif
/* All Au1x SOCs have a pcmcia controller */
/* We setup our 32 bit pseudo addresses to be equal to the
* 36 bit addr >> 4, to make it easier to check the address
* and fix it.
* The Au1x socket 0 phys attribute address is 0xF 4000 0000.
* The pseudo address we use is 0xF400 0000. Any address over
* 0xF400 0000 is a pcmcia pseudo address.
*/
if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) {
return (phys_t)(phys_addr << 4);
}
/* default nop */
return phys_addr;
}
#endif
......@@ -40,6 +40,7 @@
#include <linux/spinlock.h>
#include <linux/hardirq.h>
#include <asm/compiler.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/time.h>
......@@ -351,9 +352,9 @@ static unsigned long do_fast_cp0_gettimeoffset(void)
__asm__("multu\t%1,%2\n\t"
"mfhi\t%0"
:"=r" (res)
:"r" (count),
"r" (quotient));
: "=r" (res)
: "r" (count), "r" (quotient)
: "hi", "lo", GCC_REG_ACCUM);
/*
* Due to possible jiffies inconsistencies, we need to check
......
......@@ -61,8 +61,6 @@
#define vdbg(fmt, arg...) do {} while (0)
#endif
#define MAX(a,b) (((a)>(b))?(a):(b))
#define ALLOC_FLAGS (in_interrupt () ? GFP_ATOMIC : GFP_KERNEL)
#define EP_FIFO_DEPTH 8
......@@ -211,9 +209,8 @@ dump_setup(struct usb_ctrlrequest* s)
static inline usbdev_pkt_t *
alloc_packet(endpoint_t * ep, int data_size, void* data)
{
usbdev_pkt_t* pkt =
(usbdev_pkt_t *)kmalloc(sizeof(usbdev_pkt_t) + data_size,
ALLOC_FLAGS);
usbdev_pkt_t* pkt = kmalloc(sizeof(usbdev_pkt_t) + data_size,
ALLOC_FLAGS);
if (!pkt)
return NULL;
pkt->ep_addr = ep->address;
......
......@@ -48,6 +48,12 @@
/* not correct for db1550 */
static BCSR * const bcsr = (BCSR *)0xAE000000;
void board_reset (void)
{
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
au_writel(0x00000000, 0xAE00001C);
}
void __init board_setup(void)
{
u32 pin_func;
......
......@@ -47,6 +47,10 @@
extern struct rtc_ops no_rtc_ops;
void board_reset (void)
{
}
void __init board_setup(void)
{
u32 pin_func;
......
......@@ -48,6 +48,10 @@
!!! I shall not define symbols starting with CONFIG_ !!!
#endif
void board_reset (void)
{
}
void __init board_setup(void)
{
u32 pin_func, static_cfg0;
......
......@@ -37,8 +37,8 @@
#include <asm/mipsregs.h>
#include <asm/reboot.h>
#include <asm/pgtable.h>
#include <asm/au1000.h>
#include <asm/pb1100.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-pb1x00/pb1100.h>
#ifdef CONFIG_USB_OHCI
// Enable the workaround for the OHCI DoneHead
......@@ -48,6 +48,12 @@
!!! I shall not define symbols starting with CONFIG_ !!!
#endif
void board_reset (void)
{
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
au_writel(0x00000000, 0xAE00001C);
}
void __init board_setup(void)
{
u32 pin_func;
......
......@@ -45,7 +45,7 @@
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/au1000.h>
#include <asm/mach-au1x00/au1000.h>
au1xxx_irq_map_t au1xxx_irq_map[] = {
{ AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted#
......
......@@ -48,6 +48,12 @@
!!! I shall not define symbols starting with CONFIG_ !!!
#endif
void board_reset (void)
{
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
au_writel(0x00000000, 0xAE00001C);
}
void __init board_setup(void)
{
u32 pin_func;
......
......@@ -45,6 +45,12 @@
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-pb1x00/pb1550.h>
void board_reset (void)
{
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
}
void __init board_setup(void)
{
u32 pin_func;
......
......@@ -40,6 +40,12 @@
#include <asm/pgtable.h>
#include <asm/au1000.h>
void board_reset (void)
{
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
au_writel(0x00000000, 0xAE00001C);
}
void __init board_setup(void)
{
u32 pin_func;
......
#
# Makefile for the Baget specific kernel interface routines
# under Linux.
#
obj-y := baget.o print.o setup.o time.o irq.o bagetIRQ.o \
reset.o
obj-$(CONFIG_VAC_RTC) += vacrtc.o
EXTRA_AFLAGS := $(CFLAGS)
bagetIRQ.o : bagetIRQ.S
$(CC) $(CFLAGS) -c -o $@ $<
##################### Baget Loader stuff ########################
image: ../../../vmlinux
cp -f $< $@
image.bin: image
$(OBJCOPY) -O binary $< $@
ramdisk.bin:
echo "Dummy ramdisk used. Provide your own if needed !" > $@
dummy.c:
touch $@
dummy.o: dummy.c image.bin ramdisk.bin
$(CC) $(CFLAGS) -c -o $@ $<
$(OBJCOPY) --add-section=.vmlinux=image.bin \
--add-section=.ramdisk=ramdisk.bin $@
balo.h: image
$(NM) $< | awk ' \
BEGIN { printf "/* DO NOT EDIT THIS FILE */\n" } \
/_ftext/ { printf "#define LOADADDR 0x%s\n", $$1 } \
/kernel_entry/ { printf "#define START 0x%s\n", $$1 } \
/balo_ramdisk_base/ { printf "#define RAMDISK_BASE 0x%s\n", $$1 } \
/balo_ramdisk_size/ { printf "#define RAMDISK_SIZE 0x%s\n", $$1 } \
' > $@
balo.o: balo.c balo.h
$(CC) $(CFLAGS) -c $<
balo_supp.o: balo_supp.S
$(CC) $(CFLAGS) -c $<
balo: balo.o dummy.o balo_supp.o print.o
$(LD) $(LDFLAGS) -T ld.script.balo -o $@ $^
clean:
rm -f balo balo.h dummy.c image image.bin
/*
* baget.c: Baget low level stuff
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*
*/
#include <stdarg.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/pgtable.h>
#include <asm/baget/baget.h>
/*
* Following code is based on routines from 'mm/vmalloc.c'
* Additional parameters ioaddr is needed to iterate across real I/O address.
*/
static inline int alloc_area_pte(pte_t * pte, unsigned long address,
unsigned long size, unsigned long ioaddr)
{
unsigned long end;
address &= ~PMD_MASK;
end = address + size;
if (end > PMD_SIZE)
end = PMD_SIZE;
while (address < end) {
unsigned long page;
if (!pte_none(*pte))
printk("kseg2_alloc_io: page already exists\n");
/*
* For MIPS looks pretty to have transparent mapping
* for KSEG2 areas -- user can't access one, and no
* problems with virtual <--> physical translation.
*/
page = ioaddr & PAGE_MASK;
set_pte(pte, __pte(page | pgprot_val(PAGE_USERIO) |
_PAGE_GLOBAL | __READABLE | __WRITEABLE));
address += PAGE_SIZE;
ioaddr += PAGE_SIZE;
pte++;
}
return 0;
}
static inline int alloc_area_pmd(pmd_t * pmd, unsigned long address,
unsigned long size, unsigned long ioaddr)
{
unsigned long end;
address &= ~PGDIR_MASK;
end = address + size;
if (end > PGDIR_SIZE)
end = PGDIR_SIZE;
while (address < end) {
pte_t * pte = pte_alloc_kernel(pmd, address);
if (!pte)
return -ENOMEM;
if (alloc_area_pte(pte, address, end - address, ioaddr))
return -ENOMEM;
address = (address + PMD_SIZE) & PMD_MASK;
ioaddr += PMD_SIZE;
pmd++;
}
return 0;
}
int kseg2_alloc_io (unsigned long address, unsigned long size)
{
pgd_t * dir;
unsigned long end = address + size;
dir = pgd_offset_k(address);
flush_cache_all();
while (address < end) {
pmd_t *pmd;
pgd_t olddir = *dir;
pmd = pmd_alloc_kernel(dir, address);
if (!pmd)
return -ENOMEM;
if (alloc_area_pmd(pmd, address, end - address, address))
return -ENOMEM;
if (pgd_val(olddir) != pgd_val(*dir))
set_pgdir(address, *dir);
address = (address + PGDIR_SIZE) & PGDIR_MASK;
dir++;
}
flush_tlb_all();
return 0;
}
/*
* bagetIRQ.S: Interrupt exception dispatch code for Baget/MIPS
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/addrspace.h>
.text
.set mips1
.set reorder
.set macro
.set noat
.align 5
NESTED(bagetIRQ, PT_SIZE, sp)
SAVE_ALL
CLI # Important: mark KERNEL mode !
la a1, baget_interrupt
.set push
.set noreorder
jal a1
.set pop
move a0, sp
la a1, ret_from_irq
jr a1
END(bagetIRQ)
#define DBE_HANDLER 0x1C
NESTED(try_read, PT_SIZE, sp)
mfc0 t3, CP0_STATUS # save flags and
CLI # disable interrupts
li t0, KSEG2
sltu t1, t0, a0 # Is it KSEG2 address ?
beqz t1, mapped # No - already mapped !
move t0, a0
ori t0, 0xfff
xori t0, 0xfff # round address to page
ori t1, t0, 0xf00 # prepare EntryLo (N,V,D,G)
mfc0 t2, CP0_ENTRYHI # save ASID value
mtc0 zero, CP0_INDEX
mtc0 t0, CP0_ENTRYHI # Load MMU values ...
mtc0 t1, CP0_ENTRYLO0
nop # let it understand
nop
tlbwi # ... and write ones
nop
nop
mtc0 t2, CP0_ENTRYHI
mapped:
la t0, exception_handlers
lw t1, DBE_HANDLER(t0) # save real handler
la t2, dbe_handler
sw t2, DBE_HANDLER(t0) # set temporary local handler
li v0, -1 # default (failure) value
li t2, 1
beq t2, a1, 1f
li t2, 2
beq t2, a1, 2f
li t2, 4
beq t2, a1, 4f
b out
1: lbu v0, (a0) # byte
b out
2: lhu v0, (a0) # short
b out
4: lw v0, (a0) # word
out:
sw t1, DBE_HANDLER(t0) # restore real handler
mtc0 t3, CP0_STATUS # restore CPU flags
jr ra
dbe_handler:
li v0, -1 # mark our failure
.set push
.set noreorder
b out # "no problems !"
rfe # return from trap
.set pop
END(try_read)
/*
* balo.c: BAget LOader
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <linux/kernel.h>
#include <asm/system.h>
#include <asm/ptrace.h>
#include <asm/addrspace.h>
#include <asm/baget/baget.h>
#include "balo.h" /* Includes some kernel symbol values */
static char *banner = "\nBaget Linux Loader v0.2\n";
static void mem_move (long *to, long *from, long size)
{
while (size > 0) {
*to++ = *from++;
size -= sizeof(long);
}
}
static volatile int *mem_limit = (volatile int*)KSEG1;
static volatile int *mem_limit_dbe = (volatile int*)KSEG1;
static int can_write (volatile int* p) {
return p < (int*)(KSEG1+BALO_OFFSET) ||
p >= (int*)(KSEG1+BALO_OFFSET+BALO_SIZE);
}
static volatile enum balo_state_enum {
BALO_INIT,
MEM_INIT,
MEM_PROBE,
START_KERNEL
} balo_state = BALO_INIT;
static __inline__ void reset_and_jump(int start, int mem_upper)
{
unsigned long tmp;
__asm__ __volatile__(
".set\tnoreorder\n\t"
".set\tnoat\n\t"
"mfc0\t$1, $12\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"ori\t$1, $1, 0xff00\n\t"
"xori\t$1, $1, 0xff00\n\t"
"mtc0\t$1, $12\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"move\t%0, %2\n\t"
"jr\t%1\n\t"
"nop\n\t"
".set\tat\n\t"
".set\treorder"
: "=&r" (tmp)
: "Ir" (start), "Ir" (mem_upper)
: "memory");
}
static void start_kernel(void)
{
extern char _vmlinux_start, _vmlinux_end;
extern char _ramdisk_start, _ramdisk_end;
outs( "Relocating Linux... " );
mem_move((long*)KSEG0, (long*)&_vmlinux_start,
&_vmlinux_end-&_vmlinux_start);
outs("done.\n");
if (&_ramdisk_start != &_ramdisk_end) {
outs("Setting up RAMDISK... ");
if (*(unsigned long*)RAMDISK_BASE != 0xBA) {
outs("Bad RAMDISK_BASE signature in system image.\n");
balo_hungup();
}
*(unsigned long*)RAMDISK_BASE = (unsigned long)&_ramdisk_start;
*(unsigned long*)RAMDISK_SIZE = &_ramdisk_end -&_ramdisk_start;
outs("done.\n");
}
{
extern void flush_cache_low(int isize, int dsize);
flush_cache_low(256*1024,256*1024);
}
balo_printf( "Kernel entry: %x\n\n", START);
balo_state = START_KERNEL;
reset_and_jump(START, (int)mem_limit-KSEG1+KSEG0);
}
static void mem_probe(void)
{
balo_state = MEM_PROBE;
outs("RAM: <");
while(mem_limit < mem_limit_dbe) {
if (can_write(mem_limit) && *mem_limit != 0)
break; /* cycle found */
outc('.');
if (can_write(mem_limit))
*mem_limit = -1; /* mark */
mem_limit += 0x40000;
}
outs(">\n");
start_kernel();
}
volatile unsigned int int_cause;
volatile unsigned int epc;
volatile unsigned int badvaddr;
static void print_regs(void)
{
balo_printf("CAUSE=%x EPC=%x BADVADDR=%x\n",
int_cause, epc, badvaddr);
}
void int_handler(struct pt_regs *regs)
{
switch (balo_state) {
case BALO_INIT:
balo_printf("\nBALO: trap in balo itself.\n");
print_regs();
balo_hungup();
break;
case MEM_INIT:
if ((int_cause & CAUSE_MASK) != CAUSE_DBE) {
balo_printf("\nBALO: unexpected trap during memory init.\n");
print_regs();
balo_hungup();
} else {
mem_probe();
}
break;
case MEM_PROBE:
balo_printf("\nBALO: unexpected trap during memory probe.\n");
print_regs();
balo_hungup();
break;
case START_KERNEL:
balo_printf("\nBALO: unexpected kernel trap.\n");
print_regs();
balo_hungup();
break;
}
balo_printf("\nBALO: unexpected return from handler.\n");
print_regs();
balo_hungup();
}
static void mem_init(void)
{
balo_state = MEM_INIT;
while(1) {
*mem_limit_dbe;
if (can_write(mem_limit_dbe))
*mem_limit_dbe = 0;
mem_limit_dbe += 0x40000; /* +1M */
}
/* no return: must go to int_handler */
}
void balo_entry(void)
{
extern void except_vec3_generic(void);
cli();
outs(banner);
memcpy((void *)(KSEG0 + 0x80), &except_vec3_generic, 0x80);
mem_init();
}
/* Needed for linking */
int vsprintf(char *buf, const char *fmt, va_list arg)
{
outs("BALO: vsprintf called.\n");
balo_hungup();
return 0;
}
/*
* balo_supp.S: BAget Loader supplement
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
.text
.set mips1
/* General exception vector. */
NESTED(except_vec3_generic, 0, sp)
.set noat
la k0, except_vec3_generic_code
jr k0
END(except_vec3_generic)
NESTED(except_vec3_generic_code, 0, sp)
SAVE_ALL
mfc0 k1, CP0_CAUSE
la k0, int_cause
sw k1, (k0)
mfc0 k1, CP0_EPC
la k0, epc
sw k1, (k0)
mfc0 k1, CP0_BADVADDR
la k0, badvaddr
sw k1, (k0)
la k0, int_handler
.set noreorder
jal k0
.set reorder
move a0, sp
RESTORE_ALL_AND_RET
END(except_vec3_generic_code)
.align 5
NESTED(flush_cache_low, PT_SIZE, sp)
.set at
.set macro
.set noreorder
move t1, a0 # ISIZE
move t2, a1 # DSIZE
mfc0 t3, CP0_STATUS # Save the status register.
mtc0 zero, CP0_STATUS # Disable interrupts.
la v0, 1f
or v0, KSEG1 # Run uncached.
j v0
nop
/*
* Flush the instruction cache.
*/
1:
li v0, ST0_DE | ST0_CE
mtc0 v0, CP0_STATUS # Isolate and swap caches.
li t0, KSEG1
subu t0, t0, t1
li t1, KSEG1
la v0, 1f # Run cached
j v0
nop
1:
addu t0, t0, 64
sb zero, -64(t0)
sb zero, -60(t0)
sb zero, -56(t0)
sb zero, -52(t0)
sb zero, -48(t0)
sb zero, -44(t0)
sb zero, -40(t0)
sb zero, -36(t0)
sb zero, -32(t0)
sb zero, -28(t0)
sb zero, -24(t0)
sb zero, -20(t0)
sb zero, -16(t0)
sb zero, -12(t0)
sb zero, -8(t0)
bne t0, t1, 1b
sb zero, -4(t0)
la v0, 1f
or v0, KSEG1
j v0 # Run uncached
nop
/*
* Flush the data cache.
*/
1:
li v0, ST0_DE
mtc0 v0, CP0_STATUS # Isolate and swap back caches
li t0, KSEG1
subu t0, t0, t2
la v0, 1f
j v0 # Back to cached mode
nop
1:
addu t0, t0, 64
sb zero, -64(t0)
sb zero, -60(t0)
sb zero, -56(t0)
sb zero, -52(t0)
sb zero, -48(t0)
sb zero, -44(t0)
sb zero, -40(t0)
sb zero, -36(t0)
sb zero, -32(t0)
sb zero, -28(t0)
sb zero, -24(t0)
sb zero, -20(t0)
sb zero, -16(t0)
sb zero, -12(t0)
sb zero, -8(t0)
bne t0, t1, 1b
sb zero, -4(t0)
nop # Insure isolated stores
nop # out of pipe.
nop
nop
mtc0 t3, CP0_STATUS # Restore status reg.
nop # Insure cache unisolated.
nop
nop
nop
j ra
nop
END(flush_cache_low)
/* To satisfy macros only */
EXPORT(kernelsp)
PTR 0x80001000
/*
* Code to handle Baget/MIPS IRQs plus some generic interrupt stuff.
*
* Copyright (C) 1998 Vladimir Roganov & Gleb Raiko
* Code (mostly sleleton and comments) derived from DECstation IRQ
* handling.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/baget/baget.h>
volatile unsigned long irq_err_count;
/*
* This table is a correspondence between IRQ numbers and CPU PILs
*/
static int irq_to_pil_map[BAGET_IRQ_NR] = {
7/*fixme: dma_err -1*/,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, /* 0x00 - 0x0f */
-1,-1,-1,-1, 3,-1,-1,-1, 2, 2, 2,-1, 3,-1,-1,3/*fixme: lance*/, /* 0x10 - 0x1f */
-1,-1,-1,-1,-1,-1, 5,-1,-1,-1,-1,-1, 7,-1,-1,-1, /* 0x20 - 0x2f */
-1, 3, 2/*fixme systimer:3*/, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 /* 0x30 - 0x3f */
};
static inline int irq_to_pil(int irq_nr)
{
int pil = -1;
if (irq_nr >= BAGET_IRQ_NR)
baget_printk("irq_to_pil: too large irq_nr = 0x%x\n", irq_nr);
else {
pil = irq_to_pil_map[irq_nr];
if (pil == -1)
baget_printk("irq_to_pil: unknown irq = 0x%x\n", irq_nr);
}
return pil;
}
/* Function for careful CP0 interrupt mask access */
static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
{
unsigned long status = read_c0_status();
status &= ~((clr_mask & 0xFF) << 8);
status |= (set_mask & 0xFF) << 8;
write_c0_status(status);
}
/*
* These two functions may be used for unconditional IRQ
* masking via their PIL protection.
*/
static inline void mask_irq(unsigned int irq_nr)
{
modify_cp0_intmask(irq_to_pil(irq_nr), 0);
}
static inline void unmask_irq(unsigned int irq_nr)
{
modify_cp0_intmask(0, irq_to_pil(irq_nr));
}
/*
* The following section is introduced for masking/unasking IRQ
* only while no more IRQs uses same CPU PIL.
*
* These functions are used in request_irq, free_irq, but it looks
* they cannot change something: CP0_STATUS is private for any
* process, and their action is invisible for system.
*/
static volatile unsigned int pil_in_use[BAGET_PIL_NR] = { 0, };
void mask_irq_count(int irq_nr)
{
unsigned long flags;
int pil = irq_to_pil(irq_nr);
local_irq_save(flags);
if (!--pil_in_use[pil])
mask_irq(irq_nr);
local_irq_restore(flags);
}
void unmask_irq_count(int irq_nr)
{
unsigned long flags;
int pil = irq_to_pil(irq_nr);
local_irq_save(flags);
if (!pil_in_use[pil]++)
unmask_irq(irq_nr);
local_irq_restore(flags);
}
/*
* Two functions below are exported versions of mask/unmask IRQ
*/
void disable_irq(unsigned int irq_nr)
{
unsigned long flags;
local_irq_save(flags);
mask_irq(irq_nr);
local_irq_restore(flags);
}
void enable_irq(unsigned int irq_nr)
{
unsigned long flags;
local_irq_save(flags);
unmask_irq(irq_nr);
local_irq_restore(flags);
}
/*
* Pointers to the low-level handlers: first the general ones, then the
* fast ones, then the bad ones.
*/
static struct irqaction *irq_action[BAGET_IRQ_NR] = { NULL, };
int get_irq_list(char *buf)
{
int i, len = 0;
struct irqaction * action;
unsigned long flags;
for (i = 0 ; i < BAGET_IRQ_NR ; i++) {
local_irq_save(flags);
action = irq_action[i];
if (!action)
gotos skip;
len += sprintf(buf+len, "%2d: %8d %c %s",
i, kstat_this_cpu.irqs[i],
(action->flags & SA_INTERRUPT) ? '+' : ' ',
action->name);
for (action=action->next; action; action = action->next) {
len += sprintf(buf+len, ",%s %s",
(action->flags & SA_INTERRUPT) ? " +" : "",
action->name);
}
len += sprintf(buf+len, "\n");
skip:
local_irq_restore(flags);
}
return len;
}
/*
* do_IRQ handles IRQ's that have been installed without the
* SA_INTERRUPT flag: it uses the full signal-handling return
* and runs with other interrupts enabled. All relatively slow
* IRQ's should use this format: notably the keyboard/timer
* routines.
*/
static void do_IRQ(int irq, struct pt_regs * regs)
{
struct irqaction *action;
int ret, do_random, cpu;
cpu = smp_processor_id();
irq_enter();
kstat_cpus(cpu).irqs[irq]++;
mask_irq(irq);
action = *(irq + irq_action);
if (action) {
if (!(action->flags & SA_INTERRUPT))
local_irq_enable();
action = *(irq + irq_action);
do_random = 0;
do {
ret = action->handler(irq, action->dev_id, regs);
if (ret == IRQ_HANDLED)
do_random |= action->flags;
action = action->next;
} while (action);
if (do_random & SA_SAMPLE_RANDOM)
add_interrupt_randomness(irq);
local_irq_disable();
} else {
printk("do_IRQ: Unregistered IRQ (0x%X) occurred\n", irq);
}
unmask_irq(irq);
irq_exit();
/* unmasking and bottom half handling is done magically for us. */
}
/*
* What to do in case of 'no VIC register available' for current interrupt
*/
static void vic_reg_error(unsigned long address, unsigned char active_pils)
{
printk("\nNo VIC register found: reg=%08lx active_pils=%02x\n"
"Current interrupt mask from CP0_CAUSE: %02x\n",
address, 0xff & active_pils,
0xff & (read_c0_cause()>>8));
{ int i; for (i=0; i<10000; i++) udelay(1000); }
}
static char baget_fpu_irq = BAGET_FPU_IRQ;
#define BAGET_INT_FPU {(unsigned long)&baget_fpu_irq, 1}
/*
* Main interrupt handler: interrupt demultiplexer
*/
asmlinkage void baget_interrupt(struct pt_regs *regs)
{
static struct baget_int_reg int_reg[BAGET_PIL_NR] = {
BAGET_INT_NONE, BAGET_INT_NONE, BAGET_INT0_ACK, BAGET_INT1_ACK,
BAGET_INT_NONE, BAGET_INT_FPU, BAGET_INT_NONE, BAGET_INT5_ACK
};
unsigned char active_pils;
while ((active_pils = read_c0_cause()>>8)) {
int pil;
struct baget_int_reg* reg;
for (pil = 0; pil < BAGET_PIL_NR; pil++) {
if (!(active_pils & (1<<pil))) continue;
reg = &int_reg[pil];
if (reg->address) {
extern int try_read(unsigned long,int);
int irq = try_read(reg->address, reg->size);
if (irq != -1)
do_IRQ(BAGET_IRQ_MASK(irq), regs);
else
vic_reg_error(reg->address, active_pils);
} else {
printk("baget_interrupt: unknown interrupt "
"(pil = %d)\n", pil);
}
}
}
}
/*
* Idea is to put all interrupts
* in a single table and differenciate them just by number.
*/
int setup_baget_irq(int irq, struct irqaction * new)
{
int shared = 0;
struct irqaction *old, **p;
unsigned long flags;
p = irq_action + irq;
if ((old = *p) != NULL) {
/* Can't share interrupts unless both agree to */
if (!(old->flags & new->flags & SA_SHIRQ))
return -EBUSY;
/* Can't share interrupts unless both are same type */
if ((old->flags ^ new->flags) & SA_INTERRUPT)
return -EBUSY;
/* add new interrupt at end of irq queue */
do {
p = &old->next;
old = *p;
} while (old);
shared = 1;
}
if (new->flags & SA_SAMPLE_RANDOM)
rand_initialize_irq(irq);
local_irq_save(flags);
*p = new;
local_irq_restore(flags);
if (!shared) {
unmask_irq_count(irq);
}
return 0;
}
int request_irq(unsigned int irq,
void (*handler)(int, void *, struct pt_regs *),
unsigned long irqflags,
const char * devname,
void *dev_id)
{
int retval;
struct irqaction * action;
if (irq >= BAGET_IRQ_NR)
return -EINVAL;
if (!handler)
return -EINVAL;
if (irq_to_pil_map[irq] < 0)
return -EINVAL;
action = (struct irqaction *)
kmalloc(sizeof(struct irqaction), GFP_KERNEL);
if (!action)
return -ENOMEM;
action->handler = handler;
action->flags = irqflags;
cpus_clear(action->mask);
action->name = devname;
action->next = NULL;
action->dev_id = dev_id;
retval = setup_baget_irq(irq, action);
if (retval)
kfree(action);
return retval;
}
EXPORT_SYMBOL(request_irq);
void free_irq(unsigned int irq, void *dev_id)
{
struct irqaction * action, **p;
unsigned long flags;
if (irq >= BAGET_IRQ_NR)
printk("Trying to free IRQ%d\n",irq);
for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) {
if (action->dev_id != dev_id)
continue;
/* Found it - now free it */
local_irq_save(flags);
*p = action->next;
if (!irq[irq_action])
unmask_irq_count(irq);
local_irq_restore(flags);
kfree(action);
return;
}
printk("Trying to free free IRQ%d\n",irq);
}
EXPORT_SYMBOL(free_irq);
unsigned long probe_irq_on (void)
{
/* TODO */
return 0;
}
EXPORT_SYMBOL(probe_irq_on);
int probe_irq_off (unsigned long irqs)
{
/* TODO */
return 0;
}
EXPORT_SYMBOL(probe_irq_off);
static void write_err_interrupt(int irq, void *dev_id, struct pt_regs * regs)
{
*(volatile char*) BAGET_WRERR_ACK = 0;
}
static struct irqaction irq0 =
{ write_err_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "bus write error", NULL, NULL};
void __init init_IRQ(void)
{
irq_setup();
/* Enable access to VIC interrupt registers */
vac_outw(0xacef | 0x8200, VAC_PIO_FUNC);
/* Enable interrupts for pils 2 and 3 (lines 0 and 1) */
modify_cp0_intmask(0, (1<<2)|(1<<3));
if (setup_baget_irq(0, &irq0) < 0)
printk("init_IRQ: unable to register write_err irq\n");
}
OUTPUT_FORMAT("elf32-tradbigmips")
OUTPUT_ARCH(mips)
ENTRY(balo_entry)
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = 0x80400000;
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.init : { *(.rel.init) }
.rela.init : { *(.rela.init) }
.rel.fini : { *(.rel.fini) }
.rela.fini : { *(.rela.fini) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) } =0
.text :
{
_ftext = . ;
*(.text)
*(.rodata)
*(.rodata.*)
*(.rodata1)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
_etext = .;
PROVIDE (etext = .);
/* Startup code */
. = ALIGN(4096);
__init_begin = .;
*(.text.init)
*(.data.init)
. = ALIGN(4096); /* Align double page for init_task_union */
__init_end = .;
*(.fini)
*(.reginfo)
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. It would
be more correct to do this:
. = .;
The current expression does not correctly handle the case of a
text segment ending precisely at the end of a page; it causes the
data segment to skip a page. The above expression does not have
this problem, but it will currently (2/95) cause BFD to allocate
a single segment, combining both text and data, for this case.
This will prevent the text segment from being shared among
multiple executions of the program; I think that is more
important than losing a page of the virtual address space (note
that no actual memory is lost; the page which is skipped can not
be referenced). */
. = .;
_fdata = . ;
*(.data)
CONSTRUCTORS
*(.data1)
_gp = . + 0x8000;
*(.lit8)
*(.lit4)
*(.ctors)
*(.dtors)
*(.got.plt) *(.got)
*(.dynamic)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata)
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
_fbss = .;
*(.dynbss)
*(.bss)
*(COMMON)
_end = . ;
PROVIDE (end = .);
*(.sbss)
*(.scommon)
/* These are needed for ELF backends which have not yet been
converted to the new style linker. */
*(.stab)
*(.stabstr)
/* DWARF debug sections.
Symbols in the .debug DWARF section are relative to the beginning of the
section so we begin .debug at 0. It's not clear yet what needs to happen
for the others. */
*(.debug)
*(.debug_srcinfo)
*(.debug_aranges)
*(.debug_pubnames)
*(.debug_sfnames)
*(.line)
/* These must appear regardless of . */
*(.gptab.data) *(.gptab.sdata)
*(.gptab.bss) *(.gptab.sbss)
_vmlinux_start = .;
*(.vmlinux)
_vmlinux_end = .;
_ramdisk_start = .;
*(.ramdisk)
_ramdisk_end = .;
} =0
}
/*
* print.c: Simple print fascility
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <stdarg.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/baget/baget.h>
/*
* Define this to see 'baget_printk' (debug) messages
*/
// #define BAGET_PRINTK
/*
* This function is same for BALO and Linux baget_printk,
* and normally prints characted to second (UART A) console.
*/
static void delay(void) {}
static void outc_low(char c)
{
int i;
vac_outb(c, VAC_UART_B_TX);
for (i=0; i<10000; i++)
delay();
}
void outc(char c)
{
if (c == '\n')
outc_low('\r');
outc_low(c);
}
void outs(char *s)
{
while(*s) outc(*s++);
}
void baget_write(char *s, int l)
{
while(l--)
outc(*s++);
}
int baget_printk(const char *fmt, ...)
{
#ifdef BAGET_PRINTK
va_list args;
int i;
static char buf[1024];
va_start(args, fmt);
i = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf)-4 */
va_end(args);
baget_write(buf, i);
return i;
#else
return 0;
#endif
}
static __inline__ void puthex( int a )
{
static char s[9];
static char e[] = "0123456789ABCDEF";
int i;
for( i = 7; i >= 0; i--, a >>= 4 ) s[i] = e[a & 0x0F];
s[8] = '\0';
outs( s );
}
void __init balo_printf( char *f, ... )
{
int *arg = (int*)&f + 1;
char c;
int format = 0;
while((c = *f++) != 0) {
switch(c) {
default:
if(format) {
outc('%');
format = 0;
}
outc( c );
break;
case '%':
if( format ){
format = 0;
outc(c);
} else format = 1;
break;
case 'x':
if(format) puthex( *arg++ );
else outc(c);
format = 0;
break;
case 's':
if( format ) outs((char *)*arg++);
else outc(c);
format = 0;
break;
}
}
}
void __init balo_hungup(void)
{
outs("Hunging up.\n");
while(1);
}
#
# Makefile for the Baget/MIPS prom emulator library routines.
#
lib-y := init.o
/*
* init.c: PROM library initialisation code.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <linux/init.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
const char *get_system_type(void)
{
/* Should probably return one of "BT23-201", "BT23-202" */
return "Baget";
}
void __init prom_init(void)
{
mem_upper = PHYSADDR(fw_arg0);
mips_machgroup = MACH_GROUP_UNKNOWN;
mips_machtype = MACH_UNKNOWN;
arcs_cmdline[0] = 0;
vac_memory_upper = mem_upper;
add_memory_region(0, mem_upper, BOOT_MEM_RAM);
}
unsigned long __init prom_free_prom_memory(void)
{
return 0;
}
#include <linux/kernel.h>
#include <asm/system.h>
#include <asm/baget/baget.h>
#define R3000_RESET_VEC 0xbfc00000
typedef void vector(void);
static void baget_reboot(char *from_fun)
{
cli();
baget_printk("\n%s: jumping to RESET code...\n", from_fun);
(*(vector*)R3000_RESET_VEC)();
}
/* fixme: proper functionality */
void baget_machine_restart(char *command)
{
baget_reboot("restart");
}
void baget_machine_halt(void)
{
baget_reboot("halt");
}
void baget_machine_power_off(void)
{
baget_reboot("power off");
}
This diff is collapsed.
/*
* time.c: Baget/MIPS specific time handling details
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/time.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/spinlock.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/baget/baget.h>
/*
* To have precision clock, we need to fix available clock frequency
*/
#define FREQ_NOM 79125 /* Baget frequency ratio */
#define FREQ_DEN 10000
static inline int timer_intr_valid(void)
{
static unsigned long long ticks, valid_ticks;
if (ticks++ * FREQ_DEN >= valid_ticks * FREQ_NOM) {
/*
* We need no overflow checks,
* due baget unable to work 3000 years...
* At least without reboot...
*/
valid_ticks++;
return 1;
}
return 0;
}
void static timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
{
if (timer_intr_valid()) {
sti();
do_timer(regs);
#ifndef CONFIG_SMP
update_process_times(user_mode(regs));
#endif
}
}
static void __init timer_enable(void)
{
unsigned char ss0cr0 = vic_inb(VIC_SS0CR0);
ss0cr0 &= ~VIC_SS0CR0_TIMER_FREQ_MASK;
ss0cr0 |= VIC_SS0CR0_TIMER_FREQ_1000HZ;
vic_outb(ss0cr0, VIC_SS0CR0);
vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
VIC_INT_LOW|VIC_INT_ENABLE, VIC_LINT2);
}
static struct irqaction timer_irq =
{ timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
void __init time_init(void)
{
if (setup_baget_irq(BAGET_VIC_TIMER_IRQ, &timer_irq) < 0)
printk("time_init: unable request irq for system timer\n");
timer_enable();
/* We don't call sti() here, because it is too early for baget */
}
void do_gettimeofday(struct timeval *tv)
{
unsigned long seq;
do {
seq = read_seqbegin(&xtime_lock);
tv->tv_sec = xtime.tv_sec;
tv->tv_usec = xtime.tv_nsec / 1000;
} while (read_seqretry(&xtime_lock, seq));
}
EXPORT_SYMBOL(do_gettimeofday);
void do_settimeofday(struct timeval *tv)
{
write_seqlock_irq(&xtime_lock);
xtime.tv_usec = tv->tv_sec;
xtime.tv_nsec = tv->tv_usec;
time_adjust = 0; /* stop active adjtime() */
time_status |= STA_UNSYNC;
time_maxerror = NTP_PHASE_LIMIT;
time_esterror = NTP_PHASE_LIMIT;
write_sequnlock_irq(&xtime_lock);
}
EXPORT_SYMBOL(do_settimeofday);
......@@ -4,6 +4,7 @@
# for more details.
#
# Copyright (C) 1995, 1998, 2001, 2002 by Ralf Baechle
# Copyright (C) 2004 Maciej W. Rozycki
#
#
......@@ -19,29 +20,30 @@ endif
# Drop some uninteresting sections in the kernel.
# This is only relevant for ELF kernels but doesn't hurt a.out
#
drop-sections = .reginfo .mdebug .comment .note .pdr
drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options
strip-flags = $(addprefix --remove-section=,$(drop-sections))
VMLINUX = vmlinux
all: vmlinux.ecoff vmlinux.srec addinitrd
vmlinux.ecoff: $(obj)/elf2ecoff vmlinux
$(obj)/elf2ecoff vmlinux vmlinux.ecoff $(E2EFLAGS)
vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
$(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
$(obj)/elf2ecoff: $(obj)/elf2ecoff.c
$(HOSTCC) -o $@ $^
vmlinux.srec: vmlinux
$(OBJCOPY) -S -O srec $(strip-flags) vmlinux $(obj)/vmlinux.srec
vmlinux.srec: $(VMLINUX)
$(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec
$(obj)/addinitrd: $(obj)/addinitrd.c
$(HOSTCC) -o $@ $^
archhelp:
@echo '* vmlinux.ecoff - ECOFF boot image'
@echo '* vmlinux.srec - SREC boot image'
clean-files += addinitrd \
elf2ecoff \
vmlinux.ecoff \
vmlinux.srec \
zImage.tmp \
zImage
vmlinux.srec
......@@ -2,6 +2,8 @@
* addinitrd - program to add a initrd image to an ecoff kernel
*
* (C) 1999 Thomas Bogendoerfer
* minor modifications, cleanup: Guido Guenther <agx@sigxcpu.org>
* further cleanup: Maciej W. Rozycki
*/
#include <sys/types.h>
......@@ -54,7 +56,7 @@ int main (int argc, char *argv[])
exit (1);
}
if ((fd_vmlinux = open (argv[1],O_RDWR)) < 0)
if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0)
die ("open vmlinux");
if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
die ("read file header");
......@@ -78,6 +80,11 @@ int main (int argc, char *argv[])
swab = 1;
}
/* make sure we have an empty data segment for the initrd */
if (eaout.dsize || esecs[1].s_size) {
fprintf (stderr, "Data segment not empty. Giving up!\n");
exit (1);
}
if ((fd_initrd = open (argv[2], O_RDONLY)) < 0)
die ("open initrd");
if (fstat (fd_initrd, &st) < 0)
......
......@@ -87,7 +87,7 @@ asmlinkage void cobalt_irq(struct pt_regs *regs)
}
}
void __init init_IRQ(void)
void __init arch_init_irq(void)
{
set_except_vector(0, cobalt_handle_int);
......
......@@ -5,7 +5,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1996, 1997 by Ralf Baechle
* Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*
*/
......@@ -15,7 +15,6 @@
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/pci_channel.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/irq.h>
......
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.10-rc2
# Sun Nov 21 14:11:55 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
......@@ -11,12 +13,12 @@ CONFIG_MIPS32=y
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
......@@ -25,17 +27,20 @@ CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
......@@ -46,7 +51,6 @@ CONFIG_IOSCHED_CFQ=y
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
......@@ -62,6 +66,7 @@ CONFIG_MIPS_ATLAS=y
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
......@@ -69,7 +74,6 @@ CONFIG_MIPS_ATLAS=y
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
......@@ -118,7 +122,6 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
......@@ -135,7 +138,6 @@ CONFIG_MMU=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
......@@ -144,6 +146,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
......@@ -175,7 +178,19 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
CONFIG_CDROM_PKTCDVD=y
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
......@@ -221,7 +236,8 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
......@@ -230,12 +246,14 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLOGIC_1280_1040 is not set
CONFIG_SCSI_QLA2XXX=y
# CONFIG_SCSI_QLA21XX is not set
# CONFIG_SCSI_QLA22XX is not set
......@@ -295,10 +313,13 @@ CONFIG_IP_PNP=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
CONFIG_INET_TUNNEL=y
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
......@@ -316,7 +337,6 @@ CONFIG_XFRM=y
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
......@@ -439,6 +459,7 @@ CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_RAW=y
#
# Input Device Drivers
......@@ -473,7 +494,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_QIC02_TAPE is not set
#
# IPMI
......@@ -493,7 +513,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
......@@ -503,6 +522,11 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_I2C is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Misc devices
#
......@@ -525,7 +549,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
......@@ -537,6 +560,8 @@ CONFIG_DUMMY_CONSOLE=y
# USB support
#
# CONFIG_USB is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
......@@ -556,6 +581,7 @@ CONFIG_EXT2_FS=y
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
......@@ -568,7 +594,8 @@ CONFIG_EXT2_FS=y
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
......@@ -615,6 +642,7 @@ CONFIG_LOCKD_V4=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
......@@ -635,13 +663,15 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
......@@ -652,6 +682,8 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
This diff is collapsed.
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.10-rc2
# Sun Nov 21 14:11:55 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
......@@ -11,12 +13,12 @@ CONFIG_MIPS32=y
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
......@@ -25,17 +27,20 @@ CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
......@@ -45,13 +50,13 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
# CONFIG_BAGET_MIPS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
......@@ -75,6 +80,7 @@ CONFIG_VRC4173=y
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
......@@ -82,7 +88,6 @@ CONFIG_VRC4173=y
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
......@@ -122,7 +127,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
......@@ -147,6 +151,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
......@@ -175,7 +180,19 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
CONFIG_CDROM_PKTCDVD=m
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
......@@ -193,7 +210,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
......@@ -257,10 +273,13 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
CONFIG_INET_TUNNEL=m
CONFIG_IP_TCPDIAG=m
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
......@@ -278,7 +297,6 @@ CONFIG_XFRM=y
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
......@@ -400,6 +418,7 @@ CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_RAW=m
#
# Input Device Drivers
......@@ -434,7 +453,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_QIC02_TAPE is not set
#
# IPMI
......@@ -466,7 +484,6 @@ CONFIG_WATCHDOG=y
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
......@@ -476,6 +493,11 @@ CONFIG_WATCHDOG=y
#
# CONFIG_I2C is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Misc devices
#
......@@ -498,7 +520,6 @@ CONFIG_WATCHDOG=y
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
......@@ -510,6 +531,8 @@ CONFIG_DUMMY_CONSOLE=y
# USB support
#
# CONFIG_USB is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
......@@ -529,6 +552,7 @@ CONFIG_EXT2_FS=y
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
......@@ -541,7 +565,8 @@ CONFIG_AUTOFS4_FS=y
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
......@@ -589,6 +614,7 @@ CONFIG_LOCKD=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
......@@ -609,13 +635,15 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
......@@ -626,6 +654,8 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
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......@@ -2,4 +2,4 @@
# Makefile for the common code of NEC DDB-Vrc5xxx board
#
obj-y += irq.o nile4.o prom.o rtc_ds1386.o
obj-y += nile4.o prom.o rtc_ds1386.o
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......@@ -222,7 +222,6 @@ static hw_irq_controller nile4_irq_controller = {
void nile4_irq_setup(u32 base) {
int i;
extern irq_desc_t irq_desc[];
irq_base=base;
......@@ -258,7 +257,6 @@ void nile4_irq_setup(u32 base) {
irq_desc[i].depth = 1;
irq_desc[i].handler = &nile4_irq_controller;
}
}
#if defined(CONFIG_RUNTIME_DEBUG)
......
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