Commit bdb5d8ec authored by Alexander Lobakin's avatar Alexander Lobakin Committed by David S. Miller

qed, qede, qedf: convert link mode from u32 to ETHTOOL_LINK_MODE

Currently qed driver already ran out of 32 bits to store link modes,
and this doesn't allow to add and support more speeds.
Convert custom link mode to generic Ethtool bitmap and definitions
(convenient Phylink shorthands are used for elegance and readability).
This allowed us to drop all conversions/mappings between the driver
and Ethtool.

This involves changes in qede and qedf as well, as they used definitions
from shared "qed_if.h".
Suggested-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarAlexander Lobakin <alobakin@marvell.com>
Signed-off-by: default avatarIgor Russkikh <irusskikh@marvell.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e812916d
This diff is collapsed.
......@@ -13,6 +13,7 @@
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/kthread.h>
#include <linux/phylink.h>
#include <scsi/libfc.h>
#include <scsi/scsi_host.h>
#include <scsi/fc_frame.h>
......@@ -440,6 +441,7 @@ static void qedf_link_recovery(struct work_struct *work)
static void qedf_update_link_speed(struct qedf_ctx *qedf,
struct qed_link_output *link)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(sup_caps);
struct fc_lport *lport = qedf->lport;
lport->link_speed = FC_PORTSPEED_UNKNOWN;
......@@ -474,40 +476,60 @@ static void qedf_update_link_speed(struct qedf_ctx *qedf,
* Set supported link speed by querying the supported
* capabilities of the link.
*/
if ((link->supported_caps & QED_LM_10000baseT_Full_BIT) ||
(link->supported_caps & QED_LM_10000baseKX4_Full_BIT) ||
(link->supported_caps & QED_LM_10000baseR_FEC_BIT) ||
(link->supported_caps & QED_LM_10000baseCR_Full_BIT) ||
(link->supported_caps & QED_LM_10000baseSR_Full_BIT) ||
(link->supported_caps & QED_LM_10000baseLR_Full_BIT) ||
(link->supported_caps & QED_LM_10000baseLRM_Full_BIT) ||
(link->supported_caps & QED_LM_10000baseKR_Full_BIT)) {
phylink_zero(sup_caps);
phylink_set(sup_caps, 10000baseT_Full);
phylink_set(sup_caps, 10000baseKX4_Full);
phylink_set(sup_caps, 10000baseR_FEC);
phylink_set(sup_caps, 10000baseCR_Full);
phylink_set(sup_caps, 10000baseSR_Full);
phylink_set(sup_caps, 10000baseLR_Full);
phylink_set(sup_caps, 10000baseLRM_Full);
phylink_set(sup_caps, 10000baseKR_Full);
if (linkmode_intersects(link->supported_caps, sup_caps))
lport->link_supported_speeds |= FC_PORTSPEED_10GBIT;
}
if ((link->supported_caps & QED_LM_25000baseKR_Full_BIT) ||
(link->supported_caps & QED_LM_25000baseCR_Full_BIT) ||
(link->supported_caps & QED_LM_25000baseSR_Full_BIT)) {
phylink_zero(sup_caps);
phylink_set(sup_caps, 25000baseKR_Full);
phylink_set(sup_caps, 25000baseCR_Full);
phylink_set(sup_caps, 25000baseSR_Full);
if (linkmode_intersects(link->supported_caps, sup_caps))
lport->link_supported_speeds |= FC_PORTSPEED_25GBIT;
}
if ((link->supported_caps & QED_LM_40000baseLR4_Full_BIT) ||
(link->supported_caps & QED_LM_40000baseKR4_Full_BIT) ||
(link->supported_caps & QED_LM_40000baseCR4_Full_BIT) ||
(link->supported_caps & QED_LM_40000baseSR4_Full_BIT)) {
phylink_zero(sup_caps);
phylink_set(sup_caps, 40000baseLR4_Full);
phylink_set(sup_caps, 40000baseKR4_Full);
phylink_set(sup_caps, 40000baseCR4_Full);
phylink_set(sup_caps, 40000baseSR4_Full);
if (linkmode_intersects(link->supported_caps, sup_caps))
lport->link_supported_speeds |= FC_PORTSPEED_40GBIT;
}
if ((link->supported_caps & QED_LM_50000baseKR2_Full_BIT) ||
(link->supported_caps & QED_LM_50000baseCR2_Full_BIT) ||
(link->supported_caps & QED_LM_50000baseSR2_Full_BIT)) {
phylink_zero(sup_caps);
phylink_set(sup_caps, 50000baseKR2_Full);
phylink_set(sup_caps, 50000baseCR2_Full);
phylink_set(sup_caps, 50000baseSR2_Full);
if (linkmode_intersects(link->supported_caps, sup_caps))
lport->link_supported_speeds |= FC_PORTSPEED_50GBIT;
}
if ((link->supported_caps & QED_LM_100000baseKR4_Full_BIT) ||
(link->supported_caps & QED_LM_100000baseSR4_Full_BIT) ||
(link->supported_caps & QED_LM_100000baseCR4_Full_BIT) ||
(link->supported_caps & QED_LM_100000baseLR4_ER4_Full_BIT)) {
phylink_zero(sup_caps);
phylink_set(sup_caps, 100000baseKR4_Full);
phylink_set(sup_caps, 100000baseSR4_Full);
phylink_set(sup_caps, 100000baseCR4_Full);
phylink_set(sup_caps, 100000baseLR4_ER4_Full);
if (linkmode_intersects(link->supported_caps, sup_caps))
lport->link_supported_speeds |= FC_PORTSPEED_100GBIT;
}
if (link->supported_caps & QED_LM_20000baseKR2_Full_BIT)
phylink_zero(sup_caps);
phylink_set(sup_caps, 20000baseKR2_Full);
if (linkmode_intersects(link->supported_caps, sup_caps))
lport->link_supported_speeds |= FC_PORTSPEED_20GBIT;
fc_host_supported_speeds(lport->host) = lport->link_supported_speeds;
}
......
......@@ -661,42 +661,6 @@ enum qed_protocol {
QED_PROTOCOL_FCOE,
};
enum qed_link_mode_bits {
QED_LM_FIBRE_BIT = BIT(0),
QED_LM_Autoneg_BIT = BIT(1),
QED_LM_Asym_Pause_BIT = BIT(2),
QED_LM_Pause_BIT = BIT(3),
QED_LM_1000baseT_Full_BIT = BIT(4),
QED_LM_10000baseT_Full_BIT = BIT(5),
QED_LM_10000baseKR_Full_BIT = BIT(6),
QED_LM_20000baseKR2_Full_BIT = BIT(7),
QED_LM_25000baseKR_Full_BIT = BIT(8),
QED_LM_40000baseLR4_Full_BIT = BIT(9),
QED_LM_50000baseKR2_Full_BIT = BIT(10),
QED_LM_100000baseKR4_Full_BIT = BIT(11),
QED_LM_TP_BIT = BIT(12),
QED_LM_Backplane_BIT = BIT(13),
QED_LM_1000baseKX_Full_BIT = BIT(14),
QED_LM_10000baseKX4_Full_BIT = BIT(15),
QED_LM_10000baseR_FEC_BIT = BIT(16),
QED_LM_40000baseKR4_Full_BIT = BIT(17),
QED_LM_40000baseCR4_Full_BIT = BIT(18),
QED_LM_40000baseSR4_Full_BIT = BIT(19),
QED_LM_25000baseCR_Full_BIT = BIT(20),
QED_LM_25000baseSR_Full_BIT = BIT(21),
QED_LM_50000baseCR2_Full_BIT = BIT(22),
QED_LM_100000baseSR4_Full_BIT = BIT(23),
QED_LM_100000baseCR4_Full_BIT = BIT(24),
QED_LM_100000baseLR4_ER4_Full_BIT = BIT(25),
QED_LM_50000baseSR2_Full_BIT = BIT(26),
QED_LM_1000baseX_Full_BIT = BIT(27),
QED_LM_10000baseCR_Full_BIT = BIT(28),
QED_LM_10000baseSR_Full_BIT = BIT(29),
QED_LM_10000baseLR_Full_BIT = BIT(30),
QED_LM_10000baseLRM_Full_BIT = BIT(31),
QED_LM_COUNT = 32
};
struct qed_link_params {
bool link_up;
......@@ -708,7 +672,9 @@ struct qed_link_params {
#define QED_LINK_OVERRIDE_EEE_CONFIG BIT(5)
u32 override_flags;
bool autoneg;
u32 adv_speeds;
__ETHTOOL_DECLARE_LINK_MODE_MASK(adv_speeds);
u32 forced_speed;
#define QED_LINK_PAUSE_AUTONEG_ENABLE BIT(0)
#define QED_LINK_PAUSE_RX_ENABLE BIT(1)
......@@ -726,10 +692,9 @@ struct qed_link_params {
struct qed_link_output {
bool link_up;
/* In QED_LM_* defs */
u32 supported_caps;
u32 advertised_caps;
u32 lp_caps;
__ETHTOOL_DECLARE_LINK_MODE_MASK(supported_caps);
__ETHTOOL_DECLARE_LINK_MODE_MASK(advertised_caps);
__ETHTOOL_DECLARE_LINK_MODE_MASK(lp_caps);
u32 speed; /* In Mb/s */
u8 duplex; /* In DUPLEX defs */
......
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