Commit c3ec8ba5 authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher

drm/amd/display: Return UPDATE_TYPE_FULL on writeback update

Should do full update when display writeback is updated.
Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Reviewed-by: default avatarDuke Du <Duke.Du@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ba32c50f
......@@ -1516,6 +1516,11 @@ static enum surface_update_type check_update_surfaces_for_stream(
if (stream_update->dpms_off)
return UPDATE_TYPE_FULL;
#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
if (stream_update->wb_update)
return UPDATE_TYPE_FULL;
#endif
}
for (i = 0 ; i < surface_count; i++) {
......
......@@ -373,6 +373,7 @@ bool dc_stream_add_writeback(struct dc *dc,
{
bool isDrc = false;
int i = 0;
struct dwbc *dwb;
if (stream == NULL) {
dm_error("DC: dc_stream is NULL!\n");
......@@ -391,7 +392,8 @@ bool dc_stream_add_writeback(struct dc *dc,
wb_info->dwb_params.out_transfer_func = stream->out_transfer_func;
dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
dwb->dwb_is_drc = false;
/* recalculate and apply DML parameters */
......
......@@ -127,6 +127,7 @@ struct dwbc {
enum dc_transfer_func_predefined tf;
enum dc_color_space output_color_space;
bool dwb_is_efc_transition;
bool dwb_is_drc;
int wb_src_plane_inst;/*hubp, mpcc, inst*/
bool update_privacymask;
uint32_t mask_id;
......
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