Commit c4781a8d authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Here are a couple last-minute fixes for ARM SoCs.  Most of them are
  for the OMAP platforms, the rest are all for different platforms.

  OMAP:
     All dts fixes, mostly affecting voltages and pinctrl for various
     device drivers:

      - Regulator minimum voltage fixes for omap5
      - ISP syscon register offset fix for omap3
      - Fix regulator initial modes for n900
      - Fix omap5 pinctrl wkup instance size

  Allwinner:
     Remove incorrect constraints from a dcdc1 regulator

  Alltera SoCFPGA:
     Fix compilation in thumb2 mode

  Samsung exynos:
     Fix a potential oops in the pm-domain error handling

  Davinci:
     Avoid a link error if NVMEM is disabled

  Renesas:
     Do not mark an external uart clock as disabled, to allow probing
     the uarts"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: davinci: only use NVMEM when available
  ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel
  ARM: dts: omap5: fix range of permitted wakeup pinmux registers
  ARM: dts: omap3-n900: Specify peripherals LDO regulators initial mode
  ARM: dts: omap3: Fix ISP syscon register offset
  ARM: dts: omap5-cm-t54: fix ldo1_reg and ldo4_reg ranges
  ARM: dts: omap5-board-common: fix ldo1_reg and ldo4_reg ranges
  arm64: dts: r8a7795: Don't disable referenced optional scif clock
  ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
  ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
parents 54176cc6 ed19ca7f
...@@ -329,6 +329,7 @@ &vaux1 { ...@@ -329,6 +329,7 @@ &vaux1 {
regulator-name = "V28"; regulator-name = "V28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
regulator-always-on; /* due to battery cover sensor */ regulator-always-on; /* due to battery cover sensor */
}; };
...@@ -336,30 +337,35 @@ &vaux2 { ...@@ -336,30 +337,35 @@ &vaux2 {
regulator-name = "VCSI"; regulator-name = "VCSI";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
}; };
&vaux3 { &vaux3 {
regulator-name = "VMMC2_30"; regulator-name = "VMMC2_30";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <3000000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
}; };
&vaux4 { &vaux4 {
regulator-name = "VCAM_ANA_28"; regulator-name = "VCAM_ANA_28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
}; };
&vmmc1 { &vmmc1 {
regulator-name = "VMMC1"; regulator-name = "VMMC1";
regulator-min-microvolt = <1850000>; regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <3150000>; regulator-max-microvolt = <3150000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
}; };
&vmmc2 { &vmmc2 {
regulator-name = "V28_A"; regulator-name = "V28_A";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <3000000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
regulator-always-on; /* due VIO leak to AIC34 VDDs */ regulator-always-on; /* due VIO leak to AIC34 VDDs */
}; };
...@@ -367,6 +373,7 @@ &vpll1 { ...@@ -367,6 +373,7 @@ &vpll1 {
regulator-name = "VPLL"; regulator-name = "VPLL";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
regulator-always-on; regulator-always-on;
}; };
...@@ -374,6 +381,7 @@ &vpll2 { ...@@ -374,6 +381,7 @@ &vpll2 {
regulator-name = "VSDI_CSI"; regulator-name = "VSDI_CSI";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
regulator-always-on; regulator-always-on;
}; };
...@@ -381,6 +389,7 @@ &vsim { ...@@ -381,6 +389,7 @@ &vsim {
regulator-name = "VMMC2_IO_18"; regulator-name = "VMMC2_IO_18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
}; };
&vio { &vio {
......
...@@ -46,7 +46,7 @@ isp: isp@480bc000 { ...@@ -46,7 +46,7 @@ isp: isp@480bc000 {
0x480bd800 0x017c>; 0x480bd800 0x017c>;
interrupts = <24>; interrupts = <24>;
iommus = <&mmu_isp>; iommus = <&mmu_isp>;
syscon = <&scm_conf 0xdc>; syscon = <&scm_conf 0x6c>;
ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>; ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
#clock-cells = <1>; #clock-cells = <1>;
ports { ports {
......
...@@ -472,7 +472,7 @@ smps10_out1_reg: smps10_out1 { ...@@ -472,7 +472,7 @@ smps10_out1_reg: smps10_out1 {
ldo1_reg: ldo1 { ldo1_reg: ldo1 {
/* VDDAPHY_CAM: vdda_csiport */ /* VDDAPHY_CAM: vdda_csiport */
regulator-name = "ldo1"; regulator-name = "ldo1";
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
}; };
...@@ -498,7 +498,7 @@ ldo3_reg: ldo3 { ...@@ -498,7 +498,7 @@ ldo3_reg: ldo3 {
ldo4_reg: ldo4 { ldo4_reg: ldo4 {
/* VDDAPHY_DISP: vdda_dsiport/hdmi */ /* VDDAPHY_DISP: vdda_dsiport/hdmi */
regulator-name = "ldo4"; regulator-name = "ldo4";
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
}; };
......
...@@ -513,7 +513,7 @@ smps10_out1_reg: smps10_out1 { ...@@ -513,7 +513,7 @@ smps10_out1_reg: smps10_out1 {
ldo1_reg: ldo1 { ldo1_reg: ldo1 {
/* VDDAPHY_CAM: vdda_csiport */ /* VDDAPHY_CAM: vdda_csiport */
regulator-name = "ldo1"; regulator-name = "ldo1";
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
}; };
...@@ -537,7 +537,7 @@ ldo3_reg: ldo3 { ...@@ -537,7 +537,7 @@ ldo3_reg: ldo3 {
ldo4_reg: ldo4 { ldo4_reg: ldo4 {
/* VDDAPHY_DISP: vdda_dsiport/hdmi */ /* VDDAPHY_DISP: vdda_dsiport/hdmi */
regulator-name = "ldo4"; regulator-name = "ldo4";
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
}; };
......
...@@ -269,7 +269,7 @@ scrm_clockdomains: clockdomains { ...@@ -269,7 +269,7 @@ scrm_clockdomains: clockdomains {
omap5_pmx_wkup: pinmux@c840 { omap5_pmx_wkup: pinmux@c840 {
compatible = "ti,omap5-padconf", compatible = "ti,omap5-padconf",
"pinctrl-single"; "pinctrl-single";
reg = <0xc840 0x0038>; reg = <0xc840 0x003c>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
......
...@@ -125,8 +125,6 @@ &reg_aldo3 { ...@@ -125,8 +125,6 @@ &reg_aldo3 {
}; };
&reg_dc1sw { &reg_dc1sw {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-lcd"; regulator-name = "vcc-lcd";
}; };
......
...@@ -121,6 +121,11 @@ static void read_factory_config(struct nvmem_device *nvmem, void *context) ...@@ -121,6 +121,11 @@ static void read_factory_config(struct nvmem_device *nvmem, void *context)
const char *partnum = NULL; const char *partnum = NULL;
struct davinci_soc_info *soc_info = &davinci_soc_info; struct davinci_soc_info *soc_info = &davinci_soc_info;
if (!IS_BUILTIN(CONFIG_NVMEM)) {
pr_warn("Factory Config not available without CONFIG_NVMEM\n");
goto bad_config;
}
ret = nvmem_device_read(nvmem, 0, sizeof(factory_config), ret = nvmem_device_read(nvmem, 0, sizeof(factory_config),
&factory_config); &factory_config);
if (ret != sizeof(struct factory_config)) { if (ret != sizeof(struct factory_config)) {
......
...@@ -33,6 +33,11 @@ void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context) ...@@ -33,6 +33,11 @@ void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context)
char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
off_t offset = (off_t)context; off_t offset = (off_t)context;
if (!IS_BUILTIN(CONFIG_NVMEM)) {
pr_warn("Cannot read MAC addr from EEPROM without CONFIG_NVMEM\n");
return;
}
/* Read MAC addr from EEPROM */ /* Read MAC addr from EEPROM */
if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN) if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN)
pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr); pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);
......
...@@ -92,7 +92,7 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) ...@@ -92,7 +92,7 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
if (IS_ERR(pd->clk[i])) if (IS_ERR(pd->clk[i]))
break; break;
if (IS_ERR(pd->clk[i])) if (IS_ERR(pd->pclk[i]))
continue; /* Skip on first power up */ continue; /* Skip on first power up */
if (clk_set_parent(pd->clk[i], pd->pclk[i])) if (clk_set_parent(pd->clk[i], pd->pclk[i]))
pr_err("%s: error setting parent to clock%d\n", pr_err("%s: error setting parent to clock%d\n",
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
.arch armv7-a .arch armv7-a
.arm
ENTRY(secondary_trampoline) ENTRY(secondary_trampoline)
/* CPU1 will always fetch from 0x0 when it is brought out of reset. /* CPU1 will always fetch from 0x0 when it is brought out of reset.
......
...@@ -120,7 +120,6 @@ scif_clk: scif { ...@@ -120,7 +120,6 @@ scif_clk: scif {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
status = "disabled";
}; };
soc { soc {
......
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