Commit c6e9dd0e authored by Boyuan Zhang's avatar Boyuan Zhang Committed by Alex Deucher

drm/amdgpu: enable VCN3.0 DPG for navy_flounder

Enable VCN3.0 DPG for navy_flounder by setting up the flag to the ASIC
Signed-off-by: default avatarBoyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ebb06097
......@@ -776,7 +776,8 @@ static int nv_common_early_init(void *handle)
break;
case CHIP_NAVY_FLOUNDER:
adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG;
adev->pg_flags = AMD_PG_SUPPORT_VCN;
adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_VCN_DPG;
adev->external_rev_id = adev->rev_id + 0x32;
break;
......
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