Commit c8486eef authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher

drm/amdgpu: add GFX_PIPELINE capacity check for updating gfx cgpg

Before disable gfx pipeline power gating need check the flag AMD_PG_SUPPORT_GFX_PIPELINE.
Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ed476602
...@@ -4296,7 +4296,8 @@ static void gfx_v9_0_update_gfx_cg_power_gating(struct amdgpu_device *adev, ...@@ -4296,7 +4296,8 @@ static void gfx_v9_0_update_gfx_cg_power_gating(struct amdgpu_device *adev,
gfx_v9_0_enable_gfx_pipeline_powergating(adev, true); gfx_v9_0_enable_gfx_pipeline_powergating(adev, true);
} else { } else {
gfx_v9_0_enable_gfx_cg_power_gating(adev, false); gfx_v9_0_enable_gfx_cg_power_gating(adev, false);
gfx_v9_0_enable_gfx_pipeline_powergating(adev, false); if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PIPELINE)
gfx_v9_0_enable_gfx_pipeline_powergating(adev, false);
} }
amdgpu_gfx_rlc_exit_safe_mode(adev); amdgpu_gfx_rlc_exit_safe_mode(adev);
......
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