Commit d0e61a0f authored by Gabor Juhos's avatar Gabor Juhos Committed by Kalle Valo

rt2x00: add RT3883 support

Patch add support for RT3883 chip. Code was taken direclty
from openwrt project and merge into one patch.
Signed-off-by: default avatarGabor Juhos <juhosg@openwrt.org>
Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent b1a0ba8f
...@@ -48,7 +48,8 @@ ...@@ -48,7 +48,8 @@
* RF2853 2.4G/5G 3T3R * RF2853 2.4G/5G 3T3R
* RF3320 2.4G 1T1R(RT3350/RT3370/RT3390) * RF3320 2.4G 1T1R(RT3350/RT3370/RT3390)
* RF3322 2.4G 2T2R(RT3352/RT3371/RT3372/RT3391/RT3392) * RF3322 2.4G 2T2R(RT3352/RT3371/RT3372/RT3391/RT3392)
* RF3053 2.4G/5G 3T3R(RT3883/RT3563/RT3573/RT3593/RT3662) * RF3053 2.4G/5G 3T3R(RT3563/RT3573/RT3593)
* RF3853 2.4G/5G 3T3R(RT3883/RT3662)
* RF5592 2.4G/5G 2T2R * RF5592 2.4G/5G 2T2R
* RF3070 2.4G 1T1R * RF3070 2.4G 1T1R
* RF5360 2.4G 1T1R * RF5360 2.4G 1T1R
...@@ -72,6 +73,7 @@ ...@@ -72,6 +73,7 @@
#define RF5592 0x000f #define RF5592 0x000f
#define RF3070 0x3070 #define RF3070 0x3070
#define RF3290 0x3290 #define RF3290 0x3290
#define RF3853 0x3853
#define RF5350 0x5350 #define RF5350 0x5350
#define RF5360 0x5360 #define RF5360 0x5360
#define RF5362 0x5362 #define RF5362 0x5362
...@@ -1725,6 +1727,20 @@ ...@@ -1725,6 +1727,20 @@
/* bits for new 2T devices */ /* bits for new 2T devices */
#define TX_PWR_CFG_9B_STBC_MCS7 FIELD32(0x000000ff) #define TX_PWR_CFG_9B_STBC_MCS7 FIELD32(0x000000ff)
/*
* TX_TXBF_CFG:
*/
#define TX_TXBF_CFG_0 0x138c
#define TX_TXBF_CFG_1 0x13a4
#define TX_TXBF_CFG_2 0x13a8
#define TX_TXBF_CFG_3 0x13ac
/*
* TX_FBK_CFG_3S:
*/
#define TX_FBK_CFG_3S_0 0x13c4
#define TX_FBK_CFG_3S_1 0x13c8
/* /*
* RX_FILTER_CFG: RX configuration register. * RX_FILTER_CFG: RX configuration register.
*/ */
...@@ -2296,6 +2312,7 @@ struct mac_iveiv_entry { ...@@ -2296,6 +2312,7 @@ struct mac_iveiv_entry {
/* /*
* RFCSR 2: * RFCSR 2:
*/ */
#define RFCSR2_RESCAL_BP FIELD8(0x40)
#define RFCSR2_RESCAL_EN FIELD8(0x80) #define RFCSR2_RESCAL_EN FIELD8(0x80)
#define RFCSR2_RX2_EN_MT7620 FIELD8(0x02) #define RFCSR2_RX2_EN_MT7620 FIELD8(0x02)
#define RFCSR2_TX2_EN_MT7620 FIELD8(0x20) #define RFCSR2_TX2_EN_MT7620 FIELD8(0x20)
......
...@@ -51,9 +51,16 @@ static bool rt2800soc_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev) ...@@ -51,9 +51,16 @@ static bool rt2800soc_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
static void rt2800soc_disable_radio(struct rt2x00_dev *rt2x00dev) static void rt2800soc_disable_radio(struct rt2x00_dev *rt2x00dev)
{ {
u32 reg;
rt2800_disable_radio(rt2x00dev); rt2800_disable_radio(rt2x00dev);
rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0); rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0);
rt2x00mmio_register_write(rt2x00dev, TX_PIN_CFG, 0);
reg = 0;
if (rt2x00_rt(rt2x00dev, RT3883))
rt2x00_set_field32(&reg, TX_PIN_CFG_RFTR_EN, 1);
rt2x00mmio_register_write(rt2x00dev, TX_PIN_CFG, reg);
} }
static int rt2800soc_set_device_state(struct rt2x00_dev *rt2x00dev, static int rt2800soc_set_device_state(struct rt2x00_dev *rt2x00dev,
......
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