Commit d186a394 authored by Yingjoe Chen's avatar Yingjoe Chen Committed by Matthias Brugger

ARM: dts: mt8135: enable basic SMP bringup for mt8135

Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.

This also set cpu enable-method to enable SMP.
Signed-off-by: default avatarYingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 4562c910
......@@ -46,6 +46,7 @@ core1 {
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "mediatek,mt81xx-tz-smp";
cpu0: cpu@0 {
device_type = "cpu";
......@@ -72,6 +73,17 @@ cpu3: cpu@101 {
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
trustzone-bootinfo@80002000 {
compatible = "mediatek,trustzone-bootinfo";
reg = <0 0x80002000 0 0x1000>;
};
};
clocks {
#address-cells = <2>;
#size-cells = <2>;
......@@ -97,6 +109,21 @@ clk26m: clk26m {
};
};
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <13000000>;
arm,cpu-registers-not-fw-configured;
};
soc {
#address-cells = <2>;
#size-cells = <2>;
......
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