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Commit d1ede064 authored by Jack Yu's avatar Jack Yu Committed by Mark Brown
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ASoC: rt715: add RT715 codec driver 

Signed-off-by: default avatarJack Yu <jack.yu@realtek.com>
Link: https://lore.kernel.org/r/20200110021821.17843-1-jack.yu@realtek.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent ec0f6a4c
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sound/soc/codecs/Kconfig
View file @ d1ede064
......@@ -167,6 +167,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_RT5682 if I2C
select SND_SOC_RT700_SDW if SOUNDWIRE
select SND_SOC_RT711_SDW if SOUNDWIRE
select SND_SOC_RT715_SDW if SOUNDWIRE
select SND_SOC_SGTL5000 if I2C
select SND_SOC_SI476X if MFD_SI476X_CORE
select SND_SOC_SIMPLE_AMPLIFIER
......@@ -1079,6 +1080,15 @@ config SND_SOC_RT711_SDW
select SND_SOC_RT711
select REGMAP_SOUNDWIRE
config SND_SOC_RT715
tristate
config SND_SOC_RT715_SDW
tristate "Realtek RT715 Codec - SDW"
depends on SOUNDWIRE
select SND_SOC_RT715
select REGMAP_SOUNDWIRE
#Freescale sgtl5000 codec
config SND_SOC_SGTL5000
tristate "Freescale SGTL5000 CODEC"
......
sound/soc/codecs/Makefile
View file @ d1ede064
......@@ -175,6 +175,7 @@ snd-soc-rt5677-spi-objs := rt5677-spi.o
snd-soc-rt5682-objs := rt5682.o
snd-soc-rt700-objs := rt700.o rt700-sdw.o
snd-soc-rt711-objs := rt711.o rt711-sdw.o
snd-soc-rt715-objs := rt715.o rt715-sdw.o
snd-soc-sgtl5000-objs := sgtl5000.o
snd-soc-alc5623-objs := alc5623.o
snd-soc-alc5632-objs := alc5632.o
......@@ -469,6 +470,7 @@ obj-$(CONFIG_SND_SOC_RT5677_SPI) += snd-soc-rt5677-spi.o
obj-$(CONFIG_SND_SOC_RT5682) += snd-soc-rt5682.o
obj-$(CONFIG_SND_SOC_RT700) += snd-soc-rt700.o
obj-$(CONFIG_SND_SOC_RT711) += snd-soc-rt711.o
obj-$(CONFIG_SND_SOC_RT715) += snd-soc-rt715.o
obj-$(CONFIG_SND_SOC_SGTL5000) += snd-soc-sgtl5000.o
obj-$(CONFIG_SND_SOC_SIGMADSP) += snd-soc-sigmadsp.o
obj-$(CONFIG_SND_SOC_SIGMADSP_I2C) += snd-soc-sigmadsp-i2c.o
......
sound/soc/codecs/rt715-sdw.c 0 → 100644
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This diff is collapsed.
sound/soc/codecs/rt715-sdw.h 0 → 100644
View file @ d1ede064
/* SPDX-License-Identifier: GPL-2.0 */
/*
* rt715-sdw.h -- RT715 ALSA SoC audio driver header
*
* Copyright(c) 2019 Realtek Semiconductor Corp.
*/
#ifndef __RT715_SDW_H__
#define __RT715_SDW_H__
static const struct reg_default rt715_reg_defaults[] = {
{ 0x0000, 0x00 },
{ 0x0001, 0x00 },
{ 0x0002, 0x00 },
{ 0x0003, 0x00 },
{ 0x0004, 0x00 },
{ 0x0005, 0x01 },
{ 0x0020, 0x00 },
{ 0x0022, 0x00 },
{ 0x0023, 0x00 },
{ 0x0024, 0x00 },
{ 0x0025, 0x00 },
{ 0x0026, 0x00 },
{ 0x0030, 0x00 },
{ 0x0032, 0x00 },
{ 0x0033, 0x00 },
{ 0x0034, 0x00 },
{ 0x0035, 0x00 },
{ 0x0036, 0x00 },
{ 0x0040, 0x00 },
{ 0x0041, 0x00 },
{ 0x0042, 0x00 },
{ 0x0043, 0x00 },
{ 0x0044, 0x20 },
{ 0x0045, 0x01 },
{ 0x0046, 0x00 },
{ 0x0050, 0x20 },
{ 0x0051, 0x02 },
{ 0x0052, 0x5d },
{ 0x0053, 0x07 },
{ 0x0054, 0x15 },
{ 0x0055, 0x00 },
{ 0x0060, 0x00 },
{ 0x0070, 0x00 },
{ 0x0080, 0x00 },
{ 0x0088, 0x10 },
{ 0x00e0, 0x00 },
{ 0x00e1, 0x00 },
{ 0x00e2, 0x00 },
{ 0x00e3, 0x00 },
{ 0x00e4, 0x00 },
{ 0x00e5, 0x00 },
{ 0x00ee, 0x00 },
{ 0x00ef, 0x00 },
{ 0x00f0, 0x00 },
{ 0x00f1, 0x00 },
{ 0x00f2, 0x00 },
{ 0x00f3, 0x00 },
{ 0x00f4, 0x00 },
{ 0x00f5, 0x00 },
{ 0x00fe, 0x00 },
{ 0x00ff, 0x00 },
{ 0x0200, 0x00 },
{ 0x0201, 0x00 },
{ 0x0202, 0x20 },
{ 0x0203, 0x00 },
{ 0x0204, 0x00 },
{ 0x0205, 0x03 },
{ 0x0220, 0x00 },
{ 0x0221, 0x00 },
{ 0x0222, 0x00 },
{ 0x0223, 0x00 },
{ 0x0224, 0x00 },
{ 0x0225, 0x00 },
{ 0x0226, 0x00 },
{ 0x0227, 0x00 },
{ 0x0230, 0x00 },
{ 0x0231, 0x00 },
{ 0x0232, 0x00 },
{ 0x0233, 0x00 },
{ 0x0234, 0x00 },
{ 0x0235, 0x00 },
{ 0x0236, 0x00 },
{ 0x0237, 0x00 },
{ 0x02e0, 0x00 },
{ 0x02f0, 0x00 },
{ 0x0400, 0x00 },
{ 0x0401, 0x00 },
{ 0x0402, 0x20 },
{ 0x0403, 0x00 },
{ 0x0404, 0x00 },
{ 0x0405, 0x0f },
{ 0x0420, 0x00 },
{ 0x0421, 0x00 },
{ 0x0422, 0x00 },
{ 0x0423, 0x00 },
{ 0x0424, 0x00 },
{ 0x0425, 0x00 },
{ 0x0426, 0x00 },
{ 0x0427, 0x00 },
{ 0x0430, 0x00 },
{ 0x0431, 0x00 },
{ 0x0432, 0x00 },
{ 0x0433, 0x00 },
{ 0x0434, 0x00 },
{ 0x0435, 0x00 },
{ 0x0436, 0x00 },
{ 0x0437, 0x00 },
{ 0x04e0, 0x00 },
{ 0x04f0, 0x00 },
{ 0x0600, 0x00 },
{ 0x0601, 0x00 },
{ 0x0602, 0x20 },
{ 0x0603, 0x00 },
{ 0x0604, 0x00 },
{ 0x0605, 0xff },
{ 0x0620, 0x00 },
{ 0x0621, 0x00 },
{ 0x0622, 0x00 },
{ 0x0623, 0x00 },
{ 0x0624, 0x00 },
{ 0x0625, 0x00 },
{ 0x0626, 0x00 },
{ 0x0627, 0x00 },
{ 0x0630, 0x00 },
{ 0x0631, 0x00 },
{ 0x0632, 0x00 },
{ 0x0633, 0x00 },
{ 0x0634, 0x00 },
{ 0x0635, 0x00 },
{ 0x0636, 0x00 },
{ 0x0637, 0x00 },
{ 0x06e0, 0x00 },
{ 0x06f0, 0x00 },
{ 0x0f00, 0x00 },
{ 0x0f01, 0x00 },
{ 0x0f02, 0x00 },
{ 0x0f03, 0x00 },
{ 0x0f04, 0x00 },
{ 0x0f05, 0xff },
{ 0x0f06, 0x00 },
{ 0x0f07, 0x00 },
{ 0x0f08, 0x00 },
{ 0x0f09, 0x00 },
{ 0x0f0a, 0x00 },
{ 0x0f0b, 0x00 },
{ 0x0f0c, 0x00 },
{ 0x0f0d, 0x00 },
{ 0x0f0e, 0x00 },
{ 0x0f0f, 0x00 },
{ 0x0f10, 0x00 },
{ 0x0f11, 0x00 },
{ 0x0f12, 0x00 },
{ 0x0f13, 0x00 },
{ 0x0f14, 0x00 },
{ 0x0f15, 0x00 },
{ 0x0f16, 0x00 },
{ 0x0f17, 0x00 },
{ 0x0f18, 0x00 },
{ 0x0f19, 0x00 },
{ 0x0f1a, 0x00 },
{ 0x0f1b, 0x00 },
{ 0x0f1c, 0x00 },
{ 0x0f1d, 0x00 },
{ 0x0f1e, 0x00 },
{ 0x0f1f, 0x00 },
{ 0x0f20, 0x00 },
{ 0x0f21, 0x00 },
{ 0x0f22, 0x00 },
{ 0x0f23, 0x00 },
{ 0x0f24, 0x00 },
{ 0x0f25, 0x00 },
{ 0x0f26, 0x00 },
{ 0x0f27, 0x00 },
{ 0x0f30, 0x00 },
{ 0x0f31, 0x00 },
{ 0x0f32, 0x00 },
{ 0x0f33, 0x00 },
{ 0x0f34, 0x00 },
{ 0x0f35, 0x00 },
{ 0x0f36, 0x00 },
{ 0x0f37, 0x00 },
{ 0x2000, 0x00 },
{ 0x2001, 0x00 },
{ 0x2002, 0x00 },
{ 0x2003, 0x00 },
{ 0x2004, 0x00 },
{ 0x2005, 0x00 },
{ 0x2006, 0x00 },
{ 0x2007, 0x00 },
{ 0x2008, 0x00 },
{ 0x2009, 0x03 },
{ 0x200a, 0x00 },
{ 0x200b, 0x00 },
{ 0x200c, 0x00 },
{ 0x200d, 0x00 },
{ 0x200e, 0x00 },
{ 0x200f, 0x10 },
{ 0x2010, 0x00 },
{ 0x2011, 0x00 },
{ 0x2012, 0x00 },
{ 0x2013, 0x00 },
{ 0x2014, 0x00 },
{ 0x2015, 0x00 },
{ 0x2016, 0x00 },
{ 0x201a, 0x00 },
{ 0x201b, 0x00 },
{ 0x201c, 0x00 },
{ 0x201d, 0x00 },
{ 0x201e, 0x00 },
{ 0x201f, 0x00 },
{ 0x2020, 0x00 },
{ 0x2021, 0x00 },
{ 0x2022, 0x00 },
{ 0x2023, 0x00 },
{ 0x2024, 0x00 },
{ 0x2025, 0x01 },
{ 0x2026, 0x00 },
{ 0x2027, 0x00 },
{ 0x2029, 0x00 },
{ 0x202a, 0x00 },
{ 0x202d, 0x00 },
{ 0x202e, 0x00 },
{ 0x202f, 0x00 },
{ 0x2030, 0x00 },
{ 0x2031, 0x00 },
{ 0x2032, 0x00 },
{ 0x2033, 0x00 },
{ 0x2034, 0x00 },
{ 0x2200, 0x00 },
{ 0x2201, 0x00 },
{ 0x2202, 0x00 },
{ 0x2203, 0x00 },
{ 0x2204, 0x00 },
{ 0x2206, 0x00 },
{ 0x2207, 0x00 },
{ 0x2208, 0x00 },
{ 0x2209, 0x00 },
{ 0x220a, 0x00 },
{ 0x220b, 0x00 },
{ 0x220c, 0x00 },
{ 0x220d, 0x00 },
{ 0x220e, 0x00 },
{ 0x220f, 0x00 },
{ 0x2210, 0x00 },
{ 0x2211, 0x00 },
{ 0x2212, 0x00 },
{ 0x2220, 0x00 },
{ 0x2221, 0x00 },
{ 0x2222, 0x00 },
{ 0x2223, 0x00 },
{ 0x2230, 0x00 },
{ 0x2231, 0x0f },
{ 0x2232, 0x00 },
{ 0x2233, 0x00 },
{ 0x2234, 0x00 },
{ 0x2235, 0x00 },
{ 0x2236, 0x00 },
{ 0x2237, 0x00 },
{ 0x2238, 0x00 },
{ 0x2239, 0x00 },
{ 0x22f0, 0x00 },
{ 0x22f1, 0x00 },
{ 0x22f2, 0x00 },
{ 0x22f3, 0x00 },
{ 0x3122, 0x02 },
{ 0x3123, 0x03 },
{ 0x3124, 0x00 },
{ 0x3125, 0x01 },
{ 0x3607, 0x00 },
{ 0x3608, 0x00 },
{ 0x3609, 0x00 },
{ 0x3610, 0x00 },
{ 0x3611, 0x00 },
{ 0x3627, 0x00 },
{ 0x3712, 0x00 },
{ 0x3713, 0x00 },
{ 0x3718, 0x00 },
{ 0x3719, 0x00 },
{ 0x371a, 0x00 },
{ 0x371b, 0x00 },
{ 0x371d, 0x00 },
{ 0x3729, 0x00 },
{ 0x385e, 0x00 },
{ 0x3859, 0x00 },
{ 0x4c12, 0x411111f0 },
{ 0x4c13, 0x411111f0 },
{ 0x4c1d, 0x411111f0 },
{ 0x4c29, 0x411111f0 },
{ 0x4d12, 0x411111f0 },
{ 0x4d13, 0x411111f0 },
{ 0x4d1d, 0x411111f0 },
{ 0x4d29, 0x411111f0 },
{ 0x4e12, 0x411111f0 },
{ 0x4e13, 0x411111f0 },
{ 0x4e1d, 0x411111f0 },
{ 0x4e29, 0x411111f0 },
{ 0x4f12, 0x411111f0 },
{ 0x4f13, 0x411111f0 },
{ 0x4f1d, 0x411111f0 },
{ 0x4f29, 0x411111f0 },
{ 0x7207, 0x00 },
{ 0x8287, 0x00 },
{ 0x7208, 0x00 },
{ 0x8288, 0x00 },
{ 0x7209, 0x00 },
{ 0x8289, 0x00 },
{ 0x7227, 0x00 },
{ 0x82a7, 0x00 },
{ 0x7307, 0x97 },
{ 0x8387, 0x97 },
{ 0x7308, 0x97 },
{ 0x8388, 0x97 },
{ 0x7309, 0x97 },
{ 0x8389, 0x97 },
{ 0x7312, 0x00 },
{ 0x8392, 0x00 },
{ 0x7313, 0x00 },
{ 0x8393, 0x00 },
{ 0x7318, 0x00 },
{ 0x8398, 0x00 },
{ 0x7319, 0x00 },
{ 0x8399, 0x00 },
{ 0x731a, 0x00 },
{ 0x839a, 0x00 },
{ 0x731b, 0x00 },
{ 0x839b, 0x00 },
{ 0x731d, 0x00 },
{ 0x839d, 0x00 },
{ 0x7327, 0x97 },
{ 0x83a7, 0x97 },
{ 0x7329, 0x00 },
{ 0x83a9, 0x00 },
{ 0x752039, 0xa500 },
};
#endif /* __RT715_H__ */
sound/soc/codecs/rt715.c 0 → 100644
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sound/soc/codecs/rt715.h 0 → 100644
View file @ d1ede064
/* SPDX-License-Identifier: GPL-2.0 */
/*
* rt715.h -- RT715 ALSA SoC audio driver header
*
* Copyright(c) 2019 Realtek Semiconductor Corp.
*/
#ifndef __RT715_H__
#define __RT715_H__
#include <linux/regulator/consumer.h>
struct rt715_priv {
struct regmap *regmap;
struct regmap *sdw_regmap;
struct snd_soc_codec *codec;
struct sdw_slave *slave;
int dbg_nid;
int dbg_vid;
int dbg_payload;
enum sdw_slave_status status;
struct sdw_bus_params params;
bool hw_init;
bool first_hw_init;
};
struct sdw_stream_data {
struct sdw_stream_runtime *sdw_stream;
};
/* NID */
#define RT715_AUDIO_FUNCTION_GROUP 0x01
#define RT715_MIC_ADC 0x07
#define RT715_LINE_ADC 0x08
#define RT715_MIX_ADC 0x09
#define RT715_DMIC1 0x12
#define RT715_DMIC2 0x13
#define RT715_MIC1 0x18
#define RT715_MIC2 0x19
#define RT715_LINE1 0x1a
#define RT715_LINE2 0x1b
#define RT715_DMIC3 0x1d
#define RT715_DMIC4 0x29
#define RT715_VENDOR_REGISTERS 0x20
#define RT715_MUX_IN1 0x22
#define RT715_MUX_IN2 0x23
#define RT715_MUX_IN3 0x24
#define RT715_MUX_IN4 0x25
#define RT715_MIX_ADC2 0x27
#define RT715_INLINE_CMD 0x55
/* Index (NID:20h) */
#define RT715_SDW_INPUT_SEL 0x39
#define RT715_EXT_DMIC_CLK_CTRL2 0x54
/* Verb */
#define RT715_VERB_SET_CONNECT_SEL 0x3100
#define RT715_VERB_GET_CONNECT_SEL 0xb100
#define RT715_VERB_SET_EAPD_BTLENABLE 0x3c00
#define RT715_VERB_SET_POWER_STATE 0x3500
#define RT715_VERB_SET_CHANNEL_STREAMID 0x3600
#define RT715_VERB_SET_PIN_WIDGET_CONTROL 0x3700
#define RT715_VERB_SET_CONFIG_DEFAULT1 0x4c00
#define RT715_VERB_SET_CONFIG_DEFAULT2 0x4d00
#define RT715_VERB_SET_CONFIG_DEFAULT3 0x4e00
#define RT715_VERB_SET_CONFIG_DEFAULT4 0x4f00
#define RT715_VERB_SET_UNSOLICITED_ENABLE 0x3800
#define RT715_SET_AMP_GAIN_MUTE_H 0x7300
#define RT715_SET_AMP_GAIN_MUTE_L 0x8380
#define RT715_READ_HDA_3 0x2012
#define RT715_READ_HDA_2 0x2013
#define RT715_READ_HDA_1 0x2014
#define RT715_READ_HDA_0 0x2015
#define RT715_PRIV_INDEX_W_H 0x7520
#define RT715_PRIV_INDEX_W_L 0x85a0
#define RT715_PRIV_DATA_W_H 0x7420
#define RT715_PRIV_DATA_W_L 0x84a0
#define RT715_PRIV_INDEX_R_H 0x9d20
#define RT715_PRIV_INDEX_R_L 0xada0
#define RT715_PRIV_DATA_R_H 0x9c20
#define RT715_PRIV_DATA_R_L 0xaca0
#define RT715_MIC_ADC_FORMAT_H 0x7207
#define RT715_MIC_ADC_FORMAT_L 0x8287
#define RT715_MIC_LINE_FORMAT_H 0x7208
#define RT715_MIC_LINE_FORMAT_L 0x8288
#define RT715_MIX_ADC_FORMAT_H 0x7209
#define RT715_MIX_ADC_FORMAT_L 0x8289
#define RT715_MIX_ADC2_FORMAT_H 0x7227
#define RT715_MIX_ADC2_FORMAT_L 0x82a7
#define RT715_FUNC_RESET 0xff01
#define RT715_SET_AUDIO_POWER_STATE\
(RT715_VERB_SET_POWER_STATE | RT715_AUDIO_FUNCTION_GROUP)
#define RT715_SET_PIN_DMIC1\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC1)
#define RT715_SET_PIN_DMIC2\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC2)
#define RT715_SET_PIN_DMIC3\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC3)
#define RT715_SET_PIN_DMIC4\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC4)
#define RT715_SET_PIN_MIC1\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC1)
#define RT715_SET_PIN_MIC2\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC2)
#define RT715_SET_PIN_LINE1\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE1)
#define RT715_SET_PIN_LINE2\
(RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE2)
#define RT715_SET_MIC1_UNSOLICITED_ENABLE\
(RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC1)
#define RT715_SET_MIC2_UNSOLICITED_ENABLE\
(RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC2)
#define RT715_SET_STREAMID_MIC_ADC\
(RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIC_ADC)
#define RT715_SET_STREAMID_LINE_ADC\
(RT715_VERB_SET_CHANNEL_STREAMID | RT715_LINE_ADC)
#define RT715_SET_STREAMID_MIX_ADC\
(RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC)
#define RT715_SET_STREAMID_MIX_ADC2\
(RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC2)
#define RT715_SET_GAIN_MIC_ADC_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC_ADC)
#define RT715_SET_GAIN_MIC_ADC_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC_ADC)
#define RT715_SET_GAIN_LINE_ADC_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE_ADC)
#define RT715_SET_GAIN_LINE_ADC_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE_ADC)
#define RT715_SET_GAIN_MIX_ADC_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC)
#define RT715_SET_GAIN_MIX_ADC_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC)
#define RT715_SET_GAIN_MIX_ADC2_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC2)
#define RT715_SET_GAIN_MIX_ADC2_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC2)
#define RT715_SET_GAIN_DMIC1_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC1)
#define RT715_SET_GAIN_DMIC1_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC1)
#define RT715_SET_GAIN_DMIC2_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC2)
#define RT715_SET_GAIN_DMIC2_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC2)
#define RT715_SET_GAIN_DMIC3_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC3)
#define RT715_SET_GAIN_DMIC3_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC3)
#define RT715_SET_GAIN_DMIC4_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC4)
#define RT715_SET_GAIN_DMIC4_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC4)
#define RT715_SET_GAIN_MIC1_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC1)
#define RT715_SET_GAIN_MIC1_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC1)
#define RT715_SET_GAIN_MIC2_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC2)
#define RT715_SET_GAIN_MIC2_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC2)
#define RT715_SET_GAIN_LINE1_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE1)
#define RT715_SET_GAIN_LINE1_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE1)
#define RT715_SET_GAIN_LINE2_L\
(RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE2)
#define RT715_SET_GAIN_LINE2_H\
(RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE2)
#define RT715_SET_DMIC1_CONFIG_DEFAULT1\
(RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC1)
#define RT715_SET_DMIC2_CONFIG_DEFAULT1\
(RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC2)
#define RT715_SET_DMIC1_CONFIG_DEFAULT2\
(RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC1)
#define RT715_SET_DMIC2_CONFIG_DEFAULT2\
(RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC2)
#define RT715_SET_DMIC1_CONFIG_DEFAULT3\
(RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC1)
#define RT715_SET_DMIC2_CONFIG_DEFAULT3\
(RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC2)
#define RT715_SET_DMIC1_CONFIG_DEFAULT4\
(RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC1)
#define RT715_SET_DMIC2_CONFIG_DEFAULT4\
(RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC2)
#define RT715_SET_DMIC3_CONFIG_DEFAULT1\
(RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC3)
#define RT715_SET_DMIC4_CONFIG_DEFAULT1\
(RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC4)
#define RT715_SET_DMIC3_CONFIG_DEFAULT2\
(RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC3)
#define RT715_SET_DMIC4_CONFIG_DEFAULT2\
(RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC4)
#define RT715_SET_DMIC3_CONFIG_DEFAULT3\
(RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC3)
#define RT715_SET_DMIC4_CONFIG_DEFAULT3\
(RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC4)
#define RT715_SET_DMIC3_CONFIG_DEFAULT4\
(RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC3)
#define RT715_SET_DMIC4_CONFIG_DEFAULT4\
(RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC4)
#define RT715_MUTE_SFT 7
#define RT715_DIR_IN_SFT 6
#define RT715_DIR_OUT_SFT 7
enum {
RT715_AIF1,
RT715_AIF2,
RT715_AIFS,
};
int rt715_io_init(struct device *dev, struct sdw_slave *slave);
int rt715_init(struct device *dev, struct regmap *sdw_regmap,
struct regmap *regmap, struct sdw_slave *slave);
int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload,
unsigned int *sdw_addr_h, unsigned int *sdw_data_h,
unsigned int *sdw_addr_l, unsigned int *sdw_data_l);
int rt715_clock_config(struct device *dev);
#endif /* __RT715_H__ */
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