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Commit d4a31680 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'zte-dt64-4.14' of... 

Merge tag 'zte-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

Pull "ZTE arm64 device tree updates for 4.14" from Shawn Guo:

 - A clean up patch from Shawn Lin to remove the deprecated dwmmc
   property 'num-slots' from ZX296718 device tree.
 - Enable various devices for ZX296718 SoC support, VGA display, I2S
   audio, pinctrl, GPIO, PWM and IRDEC.
 - Update zx296718-evb support to use audio-graph-card for HDMI audio
   and add I2S sound card.
 - Add initial zx296718-pcbox board support with storage, audio,
   display devices enabled.

* tag 'zte-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: zte: add initial zx296718-pcbox board support
  arm64: dts: zx296718-evb: add I2S sound card support
  arm64: dts: zx296718-evb: use audio-graph-card for HDMI audio
  arm64: dts: zx296718: add irdec device for remote control
  arm64: dts: zx296718: add PWM device support
  arm64: dts: zx296718: add voltage data into OPP table
  arm64: dts: zx296718: set a better parent clock for I2S0
  arm64: dts: zx296718: add pinctrl and gpio devices
  arm64: dts: zx296718: add I2S and I2C audio codec
  arm64: dts: zx296718: add VGA device support
  arm64: dts: zte: remove num-slots from zx296718
parents bda8f04d 5470964f
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arch/arm64/boot/dts/zte/Makefile
View file @ d4a31680
dtb-$(CONFIG_ARCH_ZX) += zx296718-evb.dtb
dtb-$(CONFIG_ARCH_ZX) += zx296718-pcbox.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
......
arch/arm64/boot/dts/zte/zx296718-evb.dts
View file @ d4a31680
......@@ -57,16 +57,28 @@ memory@40000000 {
reg = <0x40000000 0x40000000>;
};
sound0 {
compatible = "simple-audio-card";
simple-audio-card,name = "zx_snd_spdif0";
sound-spdif0 {
compatible = "audio-graph-card";
dais = <&spdif0_port>;
};
simple-audio-card,cpu {
sound-dai = <&spdif0>;
};
sound-i2s0 {
compatible = "audio-graph-card";
dais = <&i2s0_port>;
pinctrl-names = "default";
pinctrl-0 = <&amplifier_pins>;
pa-gpios = <&bgpio4 0 GPIO_ACTIVE_HIGH>;
widgets = "Line", "Line Out Jack";
routing = "Amplifier", "LINEOUTL",
"Amplifier", "LINEOUTR",
"Line Out Jack", "Amplifier";
};
};
simple-audio-card,codec {
sound-dai = <&hdmi>;
&aud96p22 {
port {
aud96p22_endpoint: endpoint {
remote-endpoint = <&i2s0_endpoint>;
};
};
};
......@@ -77,6 +89,36 @@ &emmc {
&hdmi {
status = "okay";
port {
hdmi_endpoint: endpoint {
remote-endpoint = <&spdif0_endpoint>;
};
};
};
&i2c0 {
status = "okay";
};
&i2s0 {
status = "okay";
i2s0_port: port {
i2s0_endpoint: endpoint {
remote-endpoint = <&aud96p22_endpoint>;
dai-format = "i2s";
frame-master;
bitclock-master;
};
};
};
&pmm {
amplifier_pins: amplifier {
pins = "TSI3_DATA";
function = "BGPIO";
};
};
&sd1 {
......@@ -85,6 +127,16 @@ &sd1 {
&spdif0 {
status = "okay";
spdif0_port: port {
spdif0_endpoint: endpoint {
remote-endpoint = <&hdmi_endpoint>;
};
};
};
&tvenc {
status = "okay";
};
&uart0 {
......
arch/arm64/boot/dts/zte/zx296718-pcbox.dts 0 → 100644
View file @ d4a31680
/*
* Copyright (C) 2017 Sanechips Technology Co., Ltd.
* Copyright 2017 Linaro Ltd.
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
#include "zx296718.dtsi"
#include <dt-bindings/pwm/pwm.h>
/ {
model = "ZTE ZX296718 PCBOX Board";
compatible = "zte,zx296718-pcbox", "zte,zx296718";
chosen {
stdout-path = "serial0:115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
a53_vdd0v9: regulator-a53 {
compatible = "pwm-regulator";
pwms = <&pwm 3 1250 PWM_POLARITY_INVERTED>;
regulator-name = "A53_VDD0V9";
regulator-min-microvolt = <855000>;
regulator-max-microvolt = <1183000>;
pwm-dutycycle-unit = <100>;
pwm-dutycycle-range = <0 100>;
regulator-always-on;
regulator-boot-on;
};
sound-spdif0 {
compatible = "audio-graph-card";
dais = <&spdif0_port>;
};
sound-i2s0 {
compatible = "audio-graph-card";
dais = <&i2s0_port>;
};
};
&aud96p22 {
port {
aud96p22_endpoint: endpoint {
remote-endpoint = <&i2s0_endpoint>;
};
};
};
&cpu0 {
cpu-supply = <&a53_vdd0v9>;
};
&emmc {
status = "okay";
};
&hdmi {
status = "disabled";
port {
hdmi_endpoint: endpoint {
remote-endpoint = <&spdif0_endpoint>;
};
};
};
&i2c0 {
status = "okay";
};
&i2s0 {
status = "okay";
i2s0_port: port {
i2s0_endpoint: endpoint {
remote-endpoint = <&aud96p22_endpoint>;
dai-format = "i2s";
frame-master;
bitclock-master;
};
};
};
&irdec {
status = "okay";
};
&pmm {
pwm3_pins: pwm3 {
pins = "KEY_ROW2";
function = "PWM";
};
vga_pins: vga {
pins = "KEY_COL1", "KEY_COL2", "VGA_HS", "VGA_VS";
function = "VGA";
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pins>;
status = "okay";
};
&sd0 {
status = "okay";
};
&sd1 {
status = "okay";
};
&spdif0 {
status = "okay";
spdif0_port: port {
spdif0_endpoint: endpoint {
remote-endpoint = <&hdmi_endpoint>;
};
};
};
&tvenc {
status = "disabled";
};
&uart0 {
status = "okay";
};
&vga {
pinctrl-names = "default";
pinctrl-0 = <&vga_pins>;
status = "okay";
};
arch/arm64/boot/dts/zte/zx296718.dtsi
View file @ d4a31680
......@@ -53,6 +53,13 @@ / {
interrupt-parent = <&gic>;
aliases {
gpio0 = &bgpio0;
gpio1 = &bgpio1;
gpio2 = &bgpio2;
gpio3 = &bgpio3;
gpio4 = &bgpio4;
gpio5 = &bgpio5;
gpio6 = &bgpio6;
serial0 = &uart0;
};
......@@ -120,26 +127,31 @@ cluster0_opp: opp-table0 {
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <866000>;
clock-latency-ns = <500000>;
};
opp-648000000 {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <866000>;
clock-latency-ns = <500000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <888000>;
clock-latency-ns = <500000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <898000>;
clock-latency-ns = <500000>;
};
opp-1188000000 {
opp-hz = /bits/ 64 <1188000000>;
opp-microvolt = <1015000>;
clock-latency-ns = <500000>;
};
};
......@@ -283,11 +295,23 @@ soc {
compatible = "simple-bus";
ranges;
irdec: ir-decoder@111000 {
compatible = "zte,zx296718-irdec";
reg = <0x111000 0x1000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
aon_sysctrl: aon-sysctrl@116000 {
compatible = "zte,zx296718-aon-sysctrl", "syscon";
reg = <0x116000 0x1000>;
};
iocfg: pin-controller@119000 {
compatible = "zte,zx296718-iocfg";
reg = <0x119000 0x1000>;
};
uart0: uart@11f000 {
compatible = "arm,pl011", "arm,primecell";
arm,primecell-periphid = <0x001feffe>;
......@@ -311,7 +335,6 @@ sd0: mmc@1110000 {
clock-frequency = <50000000>;
clocks = <&topcrm SD0_AHB>, <&topcrm SD0_WCLK>;
clock-names = "biu", "ciu";
num-slots = <1>;
max-frequency = <50000000>;
cap-sdio-irq;
cap-sd-highspeed;
......@@ -336,7 +359,6 @@ sd1: mmc@1111000 {
clock-frequency = <167000000>;
clocks = <&topcrm SD1_AHB>, <&topcrm SD1_WCLK>;
clock-names = "biu", "ciu";
num-slots = <1>;
max-frequency = <167000000>;
cap-sdio-irq;
cap-sd-highspeed;
......@@ -360,12 +382,109 @@ lsp0crm: clock-controller@1420000 {
#clock-cells = <1>;
};
bgpio0: gpio@142d000 {
compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
reg = <0x142d000 0x40>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmm 0 48 16>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
};
bgpio1: gpio@142d040 {
compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
reg = <0x142d040 0x40>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmm 0 80 16>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
};
bgpio2: gpio@142d080 {
compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
reg = <0x142d080 0x40>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmm 0 80 3
&pmm 3 32 4
&pmm 7 83 9>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
};
bgpio3: gpio@142d0c0 {
compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
reg = <0x142d0c0 0x40>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmm 0 92 16>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
};
bgpio4: gpio@142d100 {
compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
reg = <0x142d100 0x40>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmm 0 108 12
&pmm 12 121 4>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
};
bgpio5: gpio@142d140 {
compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
reg = <0x142d140 0x40>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmm 0 125 16>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
};
bgpio6: gpio@142d180 {
compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
reg = <0x142d180 0x40>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmm 0 141 2>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
};
lsp1crm: clock-controller@1430000 {
compatible = "zte,zx296718-lsp1crm";
reg = <0x01430000 0x1000>;
#clock-cells = <1>;
};
pwm: pwm@1439000 {
compatible = "zte,zx296718-pwm";
reg = <0x1439000 0x1000>;
clocks = <&lsp1crm LSP1_PWM_PCLK>,
<&lsp1crm LSP1_PWM_WCLK>;
clock-names = "pclk", "wclk";
#pwm-cells = <3>;
status = "disabled";
};
vou: vou@1440000 {
compatible = "zte,zx296718-vou";
#address-cells = <1>;
......@@ -387,6 +506,16 @@ dpc: dpc@0 {
"main_wclk", "aux_wclk";
};
vga: vga@8000 {
compatible = "zte,zx296718-vga";
reg = <0x8000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&topcrm VGA_I2C_WCLK>;
clock-names = "i2c_wclk";
zte,vga-power-control = <&sysctrl 0x170 0xe0>;
status = "disabled";
};
hdmi: hdmi@c000 {
compatible = "zte,zx296718-hdmi";
reg = <0xc000 0x4000>;
......@@ -413,6 +542,12 @@ topcrm: clock-controller@1461000 {
#clock-cells = <1>;
};
pmm: pin-controller@1462000 {
compatible = "zte,zx296718-pmm";
reg = <0x1462000 0x1000>;
zte,auxiliary-controller = <&iocfg>;
};
sysctrl: sysctrl@1463000 {
compatible = "zte,zx296718-sysctrl", "syscon";
reg = <0x1463000 0x1000>;
......@@ -445,6 +580,38 @@ audiocrm: clock-controller@1480000 {
#clock-cells = <1>;
};
i2s0: i2s@1482000 {
compatible = "zte,zx296718-i2s", "zte,zx296702-i2s";
reg = <0x01482000 0x1000>;
clocks = <&audiocrm AUDIO_I2S0_WCLK>,
<&audiocrm AUDIO_I2S0_PCLK>;
clock-names = "wclk", "pclk";
assigned-clocks = <&audiocrm I2S0_WCLK_MUX>;
assigned-clock-parents = <&topcrm AUDIO_99M>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma 22>, <&dma 23>;
dma-names = "tx", "rx";
#sound-dai-cells = <0>;
status = "disabled";
};
i2c0: i2c@1486000 {
compatible = "zte,zx296718-i2c";
reg = <0x01486000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&audiocrm AUDIO_I2C0_WCLK>;
clock-frequency = <1600000>;
status = "disabled";
aud96p22: codec@22 {
compatible = "zte,zx-aud96p22";
#sound-dai-cells = <0>;
reg = <0x22>;
};
};
spdif0: spdif@1488000 {
compatible = "zte,zx296702-spdif";
reg = <0x1488000 0x1000>;
......
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